Remove stray white spaces.

10 files changed, 127 insertions, 127 deletions

diff --git a/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c b/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c
index 5548e3a8ef..96abdd3f46 100644
--- a/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c
+++ b/c/src/lib/libcpu/sh/sh7032/clock/ckinit.c
@@ -9,7 +9,7 @@
  *  This program is distributed in the hope that it will be useful,
  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * 
+ *
  *
  *  COPYRIGHT (c) 1998.
  *  On-Line Applications Research Corporation (OAR).
@@ -40,11 +40,11 @@
 #define I_CLK_PHI_4	2
 #define I_CLK_PHI_8	3
 
-/* 
+/*
  * Set I_CLK_PHI to one of the I_CLK_PHI_X values from above to choose
  * a PHI/X clock rate.
  */
- 
+
 #define I_CLK_PHI 	I_CLK_PHI_4
 #define CLOCK_SCALE	(1<<I_CLK_PHI)
 
@@ -62,12 +62,12 @@
  * clicks_per_tick := clicks_per_sec * usec_per_tick
  *
  * This is a very expensive function ;-)
- * 
+ *
  * Below are two variants:
  * 1. A variant applying integer arithmetics, only.
  * 2. A variant applying floating point arithmetics
  *
- * The floating point variant pulls in the fmath routines when linking, 
+ * The floating point variant pulls in the fmath routines when linking,
  * resulting in slightly larger executables for applications that do not
  * apply fmath otherwise. However, the imath variant is significantly slower
  * than the fmath variant and more complex.
@@ -78,13 +78,13 @@
  * To the sake of simplicity, we might abandon one of both variants in
  * future.
  */
-static unsigned int sh_clicks_per_tick( 
+static unsigned int sh_clicks_per_tick(
   unsigned int clicks_per_sec,
   unsigned int usec_per_tick )
 {
 #if 1
   unsigned int clicks_per_tick = 0 ;
-  
+
   unsigned int b = clicks_per_sec ;
   unsigned int c = 1000000 ;
   unsigned int d = 1 ;
@@ -98,10 +98,10 @@ static unsigned int sh_clicks_per_tick(
     d *= 10 ;
     a = ( ( b / c ) * usec_per_tick ) / d ;
     clicks_per_tick += a ;
-  } 
+  }
   return clicks_per_tick ;
 #else
-  double fclicks_per_tick = 
+  double fclicks_per_tick =
     ((double) clicks_per_sec * (double) usec_per_tick) / 1000000.0 ;
   return (uint32_t) fclicks_per_tick ;
 #endif
@@ -138,7 +138,7 @@ static uint32_t   Clock_isrs_const;        /* only calculated once */
 /*
  * These are set by clock driver during its init
  */
- 
+
 rtems_device_major_number rtems_clock_major = ~0;
 rtems_device_minor_number rtems_clock_minor;
 
@@ -198,26 +198,26 @@ void Install_clock(
   uint32_t   microseconds_per_tick ;
   uint32_t   cclicks_per_tick ;
   uint16_t   Clock_limit ;
-  
+
   /*
    *  Initialize the clock tick device driver variables
    */
 
   Clock_driver_ticks = 0;
-    
+
   if ( rtems_configuration_get_microseconds_per_tick() != 0 )
     microseconds_per_tick = rtems_configuration_get_microseconds_per_tick() ;
   else
     microseconds_per_tick = 10000 ; /* 10000 us */
 
   /* clock clicks per tick */
-  cclicks_per_tick = 
+  cclicks_per_tick =
     sh_clicks_per_tick(
       rtems_cpu_configuration_get_clicks_per_second() / CLOCK_SCALE,
       microseconds_per_tick );
 
   Clock_isrs_const = cclicks_per_tick >> 16 ;
-  if ( ( cclicks_per_tick | 0xffff ) > 0 ) 
+  if ( ( cclicks_per_tick | 0xffff ) > 0 )
     Clock_isrs_const++ ;
   Clock_limit = cclicks_per_tick / Clock_isrs_const ;
   Clock_isrs = Clock_isrs_const;
@@ -226,7 +226,7 @@ void Install_clock(
   /*
    *  Hardware specific initialize goes here
    */
-  
+
   /* stop Timer 0 */
   temp8 = read8( ITU_TSTR) & ITU0_STARTMASK;
   write8( temp8, ITU_TSTR);
@@ -246,8 +246,8 @@ void Install_clock(
   write8( ITU0_TCRMASK , ITU_TCR0);
 
   /* use GRA without I/O - pins  */
-  write8( ITU0_TIORVAL, ITU_TIOR0); 
-    
+  write8( ITU0_TIORVAL, ITU_TIOR0);
+
   /* reset flags of the status register */
   temp8 = read8( ITU_TSR0) & ITU_STAT_MASK;
   write8( temp8, ITU_TSR0);
@@ -262,7 +262,7 @@ void Install_clock(
 
   /* set counter limits */
   write16( Clock_limit, ITU_GRA0);
-   
+
   /* start counter */
   temp8 = read8( ITU_TSTR) |~ITU0_STARTMASK;
   write8( temp8, ITU_TSTR);
@@ -312,14 +312,14 @@ rtems_device_driver Clock_initialize(
 )
 {
   Install_clock( Clock_isr );
- 
+
   /*
    * make major/minor avail to others such as shared memory driver
    */
- 
+
   rtems_clock_major = major;
   rtems_clock_minor = minor;
- 
+
   return RTEMS_SUCCESSFUL;
 }
 
@@ -331,14 +331,14 @@ rtems_device_driver Clock_control(
 {
   uint32_t   isrlevel;
   rtems_libio_ioctl_args_t *args = pargp;
-  
+
   if (args != 0)
     {
       /*
        * This is hokey, but until we get a defined interface
        * to do this, it will just be this simple...
        */
-      
+
       if (args->command == rtems_build_name('I', 'S', 'R', ' '))
 	{
 	  Clock_isr(CLOCK_VECTOR);
@@ -348,7 +348,7 @@ rtems_device_driver Clock_control(
 	  rtems_isr_entry	ignored ;
 	  rtems_interrupt_disable( isrlevel );
 	  rtems_interrupt_catch( args->buffer, CLOCK_VECTOR, &ignored );
-	  
+
 	  rtems_interrupt_enable( isrlevel );
 	}
     }
diff --git a/c/src/lib/libcpu/sh/sh7032/delay/delay.c b/c/src/lib/libcpu/sh/sh7032/delay/delay.c
index 3f00e8a388..41d4753908 100644
--- a/c/src/lib/libcpu/sh/sh7032/delay/delay.c
+++ b/c/src/lib/libcpu/sh/sh7032/delay/delay.c
@@ -1,4 +1,4 @@
-/*  
+/*
  *  This routine is a simple spin delay
  *
  *  Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de)
@@ -37,10 +37,10 @@
  */
 
 void CPU_delay( uint32_t   microseconds )
-{ 
-  register uint32_t   clicks_per_usec = 
+{
+  register uint32_t   clicks_per_usec =
     rtems_cpu_configuration_get_clicks_per_second() / 1000000 ;
-  register uint32_t   _delay = 
+  register uint32_t   _delay =
     (microseconds) * (clicks_per_usec);
   asm volatile (
 "0:	add  #-4,%0\n\
diff --git a/c/src/lib/libcpu/sh/sh7032/include/iosh7032.h b/c/src/lib/libcpu/sh/sh7032/include/iosh7032.h
index 04751ccdb4..f1cb23da5f 100644
--- a/c/src/lib/libcpu/sh/sh7032/include/iosh7032.h
+++ b/c/src/lib/libcpu/sh/sh7032/include/iosh7032.h
@@ -7,7 +7,7 @@
  *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
  *           Bernd Becker (becker@faw.uni-ulm.de)
  *
- *  Based on "iosh7030.h" distributed with Hitachi's EVB's tutorials, which 
+ *  Based on "iosh7030.h" distributed with Hitachi's EVB's tutorials, which
  *  contained no copyright notice.
  *
  *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
@@ -15,7 +15,7 @@
  *  This program is distributed in the hope that it will be useful,
  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * 
+ *
  *
  *  COPYRIGHT (c) 1998.
  *  On-Line Applications Research Corporation (OAR).
@@ -32,7 +32,7 @@
 
 /*
  * After each line is explained whether the access is char short or long.
- * The functions read/writeb, w, l, 8, 16, 32 can be found 
+ * The functions read/writeb, w, l, 8, 16, 32 can be found
  * in exec/score/cpu/sh/sh_io.h
  *
  * 8 bit  == char     ( readb, writeb, read8, write8)
diff --git a/c/src/lib/libcpu/sh/sh7032/include/ispsh7032.h b/c/src/lib/libcpu/sh/sh7032/include/ispsh7032.h
index 9093b6ded5..426670158b 100644
--- a/c/src/lib/libcpu/sh/sh7032/include/ispsh7032.h
+++ b/c/src/lib/libcpu/sh/sh7032/include/ispsh7032.h
@@ -10,7 +10,7 @@
  *  This program is distributed in the hope that it will be useful,
  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * 
+ *
  *
  *  COPYRIGHT (c) 1998.
  *  On-Line Applications Research Corporation (OAR).
diff --git a/c/src/lib/libcpu/sh/sh7032/include/sci.h b/c/src/lib/libcpu/sh/sh7032/include/sci.h
index aa3d8151a1..a42e8e7145 100644
--- a/c/src/lib/libcpu/sh/sh7032/include/sci.h
+++ b/c/src/lib/libcpu/sh/sh7032/include/sci.h
@@ -9,7 +9,7 @@
  *  This program is distributed in the hope that it will be useful,
  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * 
+ *
  *
  *  COPYRIGHT (c) 1998.
  *  On-Line Applications Research Corporation (OAR).
@@ -30,12 +30,12 @@ extern "C" {
 
 /*
  * Devices are set to 9600 bps, 8 databits, 1 stopbit, no
- * parity and asynchronous mode by default. 
+ * parity and asynchronous mode by default.
  *
  * NOTE:
- *       The onboard serial devices of the SH do not support hardware 
+ *       The onboard serial devices of the SH do not support hardware
  *       handshake.
- */ 
+ */
 
 #define DEVSCI_DRIVER_TABLE_ENTRY \
   { sh_sci_initialize, sh_sci_open, sh_sci_close, sh_sci_read, \
diff --git a/c/src/lib/libcpu/sh/sh7032/include/sh7_pfc.h b/c/src/lib/libcpu/sh/sh7032/include/sh7_pfc.h
index b2fddfd9f9..89f76c7e20 100644
--- a/c/src/lib/libcpu/sh/sh7032/include/sh7_pfc.h
+++ b/c/src/lib/libcpu/sh/sh7032/include/sh7_pfc.h
@@ -104,7 +104,7 @@
 #define PB1MD0  0x0004
 #define PB0MD1  0x0002
 #define PB0MD0  0x0001
-	
+
 #define PB7MD   PB7MD1|PB7MD0
 #define PB6MD   PB6MD1|PB6MD0
 #define PB5MD   PB5MD1|PB5MD0
diff --git a/c/src/lib/libcpu/sh/sh7032/sci/sci.c b/c/src/lib/libcpu/sh/sh7032/sci/sci.c
index bd23038941..d5de4f4f43 100644
--- a/c/src/lib/libcpu/sh/sh7032/sci/sci.c
+++ b/c/src/lib/libcpu/sh/sh7032/sci/sci.c
@@ -8,7 +8,7 @@
  *  This program is distributed in the hope that it will be useful,
  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * 
+ *
  *
  *  COPYRIGHT (c) 1998.
  *  On-Line Applications Research Corporation (OAR).
@@ -36,9 +36,9 @@
 /*
  * NOTE: Some SH variants have 3 sci devices
  */
-  
+
 #define SCI_MINOR_DEVICES       2
-  
+
 #define SH_SCI_BASE_0   SCI0_SMR
 #define SH_SCI_BASE_1   SCI1_SMR
 
@@ -67,13 +67,13 @@ static int _sci_set_cflags(
 {
   uint8_t  	smr ;
   uint8_t  	brr ;
-  
+
   if ( c_cflag & CBAUD )
   {
     if ( _sci_get_brparms( c_cflag, &smr, &brr ) != 0 )
       return -1 ;
   }
-                    
+
   if ( c_cflag & CSIZE )
   {
     if ( c_cflag & CS8 )
@@ -98,26 +98,26 @@ static int _sci_set_cflags(
     smr |= SCI_ODD_PARITY ;
   else
     smr &= ~SCI_ODD_PARITY;
-    
+
   write8( smr, sci_dev->addr + SCI_SMR );
   write8( brr, sci_dev->addr + SCI_BRR );
-  
+
   return 0 ;
 }
 
-static void _sci_init( 
+static void _sci_init(
   rtems_device_minor_number minor )
 {
   uint16_t  	temp16 ;
 
-  /* Pin function controller initialisation for asynchronous mode */  
+  /* Pin function controller initialisation for asynchronous mode */
   if( minor == 0)
     {
       temp16 = read16( PFC_PBCR1);
       temp16 &= ~( PB8MD | PB9MD );
       temp16 |= (PB_TXD0 | PB_RXD0);
       write16( temp16, PFC_PBCR1);
-    } 
+    }
   else
     {
       temp16 = read16( PFC_PBCR1);
@@ -147,7 +147,7 @@ static void _sci_tx_polled(
 {
   struct scidev_t *scidev = &sci_device[minor] ;
   int8_t           ssr ;
-                
+
   while ( !inb((scidev->addr + SCI_SSR) & SCI_TDRE ))
       ;
   write8(buf,scidev->addr+SCI_TDR);
@@ -155,13 +155,13 @@ static void _sci_tx_polled(
   ssr = inb(scidev->addr+SCI_SSR);
   ssr &= ~SCI_TDRE ;
   write8(ssr,scidev->addr+SCI_SSR);
-} 
+}
 
 static int _sci_rx_polled (
   int minor)
 {
   struct scidev_t *scidev = &sci_device[minor] ;
-	
+
   unsigned char c;
   char ssr ;
   ssr = read8(scidev->addr + SCI_SSR) ;
@@ -171,9 +171,9 @@ static int _sci_rx_polled (
 
   if ( !(ssr & SCI_RDRF) )
     return -1;
-		
+
   c = read8(scidev->addr + SCI_RDR) ;
-  
+
   write8(ssr & ~SCI_RDRF,scidev->addr + SCI_SSR);
   return c;
 }
@@ -189,7 +189,7 @@ rtems_device_driver sh_sci_initialize(
 {
   rtems_device_driver status ;
   rtems_device_minor_number     i;
-  
+
   /*
    * register all possible devices.
    * the initialization of the hardware is done by sci_open
@@ -206,7 +206,7 @@ rtems_device_driver sh_sci_initialize(
   }
 
   /* default hardware setup */
-  
+
   return RTEMS_SUCCESSFUL;
 }
 
@@ -221,20 +221,20 @@ rtems_device_driver sh_sci_open(
   void                    * arg )
 {
   uint8_t   temp8;
-  
+
  /* check for valid minor number */
    if(( minor > ( SCI_MINOR_DEVICES -1 )) || ( minor < 0 ))
    {
      return RTEMS_INVALID_NUMBER;
    }
- 
+
  /* device already opened */
   if ( sci_device[minor].opened > 0 )
   {
     sci_device[minor].opened++ ;
     return RTEMS_SUCCESSFUL ;
   }
-  
+
   _sci_init( minor );
 
   if (minor == 0) {
@@ -256,16 +256,16 @@ rtems_device_driver sh_sci_open(
 
 /* FIXME: Should be one bit delay */
     CPU_delay(50000); /* microseconds */
-    
+
     temp8 |= SCI_RE | SCI_TE;
     write8(temp8, sci_device[minor].addr + SCI_SCR);	/* Enable clock output */
-  }  
+  }
 
   sci_device[minor].opened++ ;
 
   return RTEMS_SUCCESSFUL ;
 }
- 
+
 /*
  *  Close entry point
  */
@@ -282,7 +282,7 @@ rtems_device_driver sh_sci_close(
     }
 
   sci_device[minor].opened-- ;
-    
+
   return RTEMS_SUCCESSFUL ;
 }
 
@@ -297,7 +297,7 @@ rtems_device_driver sh_sci_read(
 )
 {
   int count = 0;
- 
+
   rtems_libio_rw_args_t *rw_args = (rtems_libio_rw_args_t *) arg;
   char * buffer = rw_args->buffer;
   int maximum = rw_args->count;
diff --git a/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c b/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c
index 94bcb30518..621dff415d 100644
--- a/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c
+++ b/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c
@@ -13,7 +13,7 @@
  *  This program is distributed in the hope that it will be useful,
  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * 
+ *
  *
  *  COPYRIGHT (c) 1998.
  *  On-Line Applications Research Corporation (OAR).
@@ -49,23 +49,23 @@ extern proc_ptr         _Hardware_isr_Table[];
   unsigned long    *_old_stack_ptr;
 #endif
 
-register unsigned long  *stack_ptr asm("r15"); 
+register unsigned long  *stack_ptr asm("r15");
 
-/* 
+/*
  * sh_set_irq_priority
- * 
+ *
  * this function sets the interrupt level of the specified interrupt
  *
  * parameters:
- *             - irq : interrupt number 
+ *             - irq : interrupt number
  *             - prio: priority to set for this interrupt number
  *
  * returns:    0 if ok
  *             -1 on error
  */
 
-unsigned int sh_set_irq_priority( 
-  unsigned int irq, 
+unsigned int sh_set_irq_priority(
+  unsigned int irq,
   unsigned int prio )
 {
   uint32_t   shiftcount;
@@ -91,7 +91,7 @@ unsigned int sh_set_irq_priority(
     {
       irq = irq - 72;
       shiftcount = 12 - ((irq & ~0x03) % 16);
-      
+
       switch( irq / 16)
 	{
 	case 0: { prioreg = INTC_IPRC; break;}
@@ -183,7 +183,7 @@ void _CPU_Context_restore_fp(
  */
 
 /*
- * FIXME: This is an ugly hack, but we wanted to avoid recalculating 
+ * FIXME: This is an ugly hack, but we wanted to avoid recalculating
  *        the offset each time Context_Control is changed
  */
 void __CPU_Context_switch(
@@ -197,7 +197,7 @@ asm volatile(
 "__CPU_Context_switch:\n"
 
 "	add	%0,r4\n"
-  
+
 "	stc.l   sr,@-r4\n"
 "	stc.l	gbr,@-r4\n"
 "	mov.l   r0,@-r4\n"
@@ -251,10 +251,10 @@ asm volatile(
 "	nop\n" );
 }
 
-/*  
+/*
  *  This routine provides the RTEMS interrupt management.
  */
- 
+
 void __ISR_Handler( uint32_t   vector)
 {
   register uint32_t   level;
@@ -291,7 +291,7 @@ void __ISR_Handler( uint32_t   vector)
 
   if( _ISR_Nest_level == 0 )
     /* restore old stack pointer */
-    stack_ptr = _old_stack_ptr;  
+    stack_ptr = _old_stack_ptr;
 #endif
 
   _CPU_ISR_Enable( level );
diff --git a/c/src/lib/libcpu/sh/sh7032/score/ispsh7032.c b/c/src/lib/libcpu/sh/sh7032/score/ispsh7032.c
index 96739f0acc..83ab10081f 100644
--- a/c/src/lib/libcpu/sh/sh7032/score/ispsh7032.c
+++ b/c/src/lib/libcpu/sh/sh7032/score/ispsh7032.c
@@ -3,8 +3,8 @@
  * From these procedures __ISR_Handler is called with the vector number
  * as argument.
  *
- * __ISR_Handler is kept in a separate file (cpu_asm.c), because a bug in 
- * some releases of gcc doesn't properly handle #pragma interrupt, if a 
+ * __ISR_Handler is kept in a separate file (cpu_asm.c), because a bug in
+ * some releases of gcc doesn't properly handle #pragma interrupt, if a
  * file contains both isrs and normal functions.
  *
  *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
@@ -15,7 +15,7 @@
  *  This program is distributed in the hope that it will be useful,
  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE
- * 
+ *
  *
  *  COPYRIGHT (c) 1998.
  *  On-Line Applications Research Corporation (OAR).
@@ -38,37 +38,37 @@
  */
 proc_ptr _Hardware_isr_Table[256]={
 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
-_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
+_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
+_dummy_isp, _dummy_isp, _dummy_isp,
+_nmi_isp, _usb_isp,
+_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
+_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
+_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
+_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
 _dummy_isp, _dummy_isp, _dummy_isp,
-_nmi_isp, _usb_isp, 
-_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
-_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
-_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
-_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
-_dummy_isp, _dummy_isp, _dummy_isp, 
 /* trapa 0 -31 */
-_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
-_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
-_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
-_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
 _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
-_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
-_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
-_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, 
+_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
+_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
+_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
+_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
+_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
+_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
+_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
 /* irq 64 ... */
-_irq0_isp, _irq1_isp, _irq2_isp, _irq3_isp, 
+_irq0_isp, _irq1_isp, _irq2_isp, _irq3_isp,
 _irq4_isp, _irq5_isp, _irq6_isp, _irq7_isp,
-_dma0_isp, _dummy_isp, _dma1_isp, _dummy_isp, 
-_dma2_isp, _dummy_isp, _dma3_isp, _dummy_isp, 
-_imia0_isp, _imib0_isp, _ovi0_isp, _dummy_isp, 
-_imia1_isp, _imib1_isp, _ovi1_isp, _dummy_isp, 
-_imia2_isp, _imib2_isp, _ovi2_isp, _dummy_isp, 
-_imia3_isp, _imib3_isp, _ovi3_isp, _dummy_isp, 
-_imia4_isp, _imib4_isp, _ovi4_isp, _dummy_isp, 
+_dma0_isp, _dummy_isp, _dma1_isp, _dummy_isp,
+_dma2_isp, _dummy_isp, _dma3_isp, _dummy_isp,
+_imia0_isp, _imib0_isp, _ovi0_isp, _dummy_isp,
+_imia1_isp, _imib1_isp, _ovi1_isp, _dummy_isp,
+_imia2_isp, _imib2_isp, _ovi2_isp, _dummy_isp,
+_imia3_isp, _imib3_isp, _ovi3_isp, _dummy_isp,
+_imia4_isp, _imib4_isp, _ovi4_isp, _dummy_isp,
 _eri0_isp, _rxi0_isp, _txi0_isp, _tei0_isp,
 _eri1_isp, _rxi1_isp, _txi1_isp, _tei1_isp,
-_prt_isp, _adu_isp, _dummy_isp, _dummy_isp, 
-_wdt_isp, 
+_prt_isp, _adu_isp, _dummy_isp, _dummy_isp,
+_wdt_isp,
 /* 113 */ _dref_isp
 };
 
@@ -76,7 +76,7 @@ _wdt_isp,
 
 /*
  * Some versions of gcc and all version of egcs at least until egcs-1.1b
- * are not able to handle #pragma interrupt correctly if more than 1 isr is 
+ * are not able to handle #pragma interrupt correctly if more than 1 isr is
  * contained in a file and when optimizing.
  * We try to work around this problem by using the macro below.
  */
@@ -119,8 +119,8 @@ asm (".global _"Str(name)"\n\t" \
      ".long "Str(func));
 
 /************************************************
- * Dummy interrupt service procedure for 
- * interrupts being not allowed --> Trap 34 
+ * Dummy interrupt service procedure for
+ * interrupts being not allowed --> Trap 34
  ************************************************/
 asm(" .section .text\n\
 .global __dummy_isp\n\
@@ -133,17 +133,17 @@ __dummy_isp:\n\
       nop");
 
 /*****************************
- * Non maskable interrupt 
+ * Non maskable interrupt
  *****************************/
 isp( _nmi_isp, NMI_ISP_V, ___ISR_Handler);
 
-/***************************** 
- * User break controller 
+/*****************************
+ * User break controller
  *****************************/
 isp( _usb_isp, USB_ISP_V, ___ISR_Handler);
 
 /*****************************
- *  External interrupts 0-7 
+ *  External interrupts 0-7
  *****************************/
 isp( _irq0_isp, IRQ0_ISP_V, ___ISR_Handler);
 isp( _irq1_isp, IRQ1_ISP_V, ___ISR_Handler);
@@ -155,7 +155,7 @@ isp( _irq6_isp, IRQ6_ISP_V, ___ISR_Handler);
 isp( _irq7_isp, IRQ7_ISP_V, ___ISR_Handler);
 
 /*****************************
- * DMA - controller 
+ * DMA - controller
  *****************************/
 isp( _dma0_isp, DMA0_ISP_V, ___ISR_Handler);
 isp( _dma1_isp, DMA1_ISP_V, ___ISR_Handler);
@@ -163,12 +163,12 @@ isp( _dma2_isp, DMA2_ISP_V, ___ISR_Handler);
 isp( _dma3_isp, DMA3_ISP_V, ___ISR_Handler);
 
 
-/***************************** 
- * Interrupt timer unit 
+/*****************************
+ * Interrupt timer unit
  *****************************/
 
 /*****************************
- * Timer 0 
+ * Timer 0
  *****************************/
 isp( _imia0_isp, IMIA0_ISP_V, ___ISR_Handler);
 isp( _imib0_isp, IMIB0_ISP_V, ___ISR_Handler);
@@ -204,7 +204,7 @@ isp( _ovi4_isp,  OVI4_ISP_V, ___ISR_Handler);
 
 
 /*****************************
- * Serial interfaces 
+ * Serial interfaces
  *****************************/
 
 /*****************************
@@ -225,27 +225,27 @@ isp( _tei1_isp,  TEI1_ISP_V, ___ISR_Handler);
 
 
 /*****************************
- * Parity control unit of 
- * the bus state controller 
+ * Parity control unit of
+ * the bus state controller
  *****************************/
 isp( _prt_isp,  PRT_ISP_V, ___ISR_Handler);
 
 
-/****************************** 
+/******************************
  * Analog digital converter
- * ADC 
+ * ADC
  ******************************/
 isp( _adu_isp,  ADU_ISP_V, ___ISR_Handler);
 
 
 /******************************
- *  Watchdog timer 
+ *  Watchdog timer
  ******************************/
 isp( _wdt_isp,  WDT_ISP_V, ___ISR_Handler);
 
 
 /******************************
- * DRAM refresh control unit 
- * of bus state controller 
+ * DRAM refresh control unit
+ * of bus state controller
  ******************************/
 isp( _dref_isp,  DREF_ISP_V, ___ISR_Handler);
diff --git a/c/src/lib/libcpu/sh/sh7032/timer/timer.c b/c/src/lib/libcpu/sh/sh7032/timer/timer.c
index 895bcea5da..0a757a32a1 100644
--- a/c/src/lib/libcpu/sh/sh7032/timer/timer.c
+++ b/c/src/lib/libcpu/sh/sh7032/timer/timer.c
@@ -1,5 +1,5 @@
 /*
- *  timer for the Hitachi SH 703X 
+ *  timer for the Hitachi SH 703X
  *
  *  This file manages the benchmark timer used by the RTEMS Timing Test
  *  Suite.  Each measured time period is demarcated by calls to
@@ -41,9 +41,9 @@
 
 /*
  * Set I_CLK_PHI to one of the I_CLK_PHI_X values from above to choose
- * a PHI/X clock rate.  
+ * a PHI/X clock rate.
  */
-   
+
 #define I_CLK_PHI       I_CLK_PHI_4
 #define CLOCK_SCALE     (1<<I_CLK_PHI)
 
@@ -154,10 +154,10 @@ int Read_timer( void )
   /*
    *  Read the timer and see how many clicks it has been since we started.
    */
-  
+
 
   cclicks = read16( ITU_TCNT1);   /* XXX: read some HW here */
-  
+
   /*
    *  Total is calculated by taking into account the number of timer overflow
    *  interrupts since the timer was initialized and clicks since the last
@@ -168,7 +168,7 @@ int Read_timer( void )
 
   if ( Timer_driver_Find_average_overhead )
     return total / CLOCK_SCALE;          /* in XXX microsecond units */
-  else 
+  else
   {
     if ( total < LEAST_VALID )
       return 0;            /* below timer resolution */