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authorJoel Sherrill <joel.sherrill@OARcorp.com>2008-09-25 19:32:15 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2008-09-25 19:32:15 +0000
commitbe7ca346fd7771e8fb7483d86877eb480b1a0c69 (patch)
tree4dd5720611eec83dfac8abc2b3433ecbb57bcf1b /c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c
parent2008-09-25 Joel Sherrill <joel.sherrill@oarcorp.com> (diff)
downloadrtems-be7ca346fd7771e8fb7483d86877eb480b1a0c69.tar.bz2
2008-09-25 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, configure.ac, sh7032/score/cpu_asm.c, sh7045/score/cpu_asm.c, sh7750/score/cpu_asm.c: Move duplicated context switch code to score/cpu and provide an interrupt handling stub for the GDB SuperH simulator since it does not support interrupts or devices. This has been used to run tests on the simulator BSP as SH1, SH2, and SH4. * shgdb/score/cpu_asm.c, shgdb/score/ispshgdb.c: New files.
Diffstat (limited to '')
-rw-r--r--c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c127
1 files changed, 0 insertions, 127 deletions
diff --git a/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c b/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c
index 6c16cfa733..b9f8a4358b 100644
--- a/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c
+++ b/c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c
@@ -125,133 +125,6 @@ unsigned int sh_set_irq_priority(
}
/*
- * _CPU_Context_save_fp_context
- *
- * This routine is responsible for saving the FP context
- * at *fp_context_ptr. If the point to load the FP context
- * from is changed then the pointer is modified by this routine.
- *
- * Sometimes a macro implementation of this is in cpu.h which dereferences
- * the ** and a similarly named routine in this file is passed something
- * like a (Context_Control_fp *). The general rule on making this decision
- * is to avoid writing assembly language.
- */
-
-void _CPU_Context_save_fp(
- Context_Control_fp **fp_context_ptr
-)
-{
-}
-
-/*
- * _CPU_Context_restore_fp_context
- *
- * This routine is responsible for restoring the FP context
- * at *fp_context_ptr. If the point to load the FP context
- * from is changed then the pointer is modified by this routine.
- *
- * Sometimes a macro implementation of this is in cpu.h which dereferences
- * the ** and a similarly named routine in this file is passed something
- * like a (Context_Control_fp *). The general rule on making this decision
- * is to avoid writing assembly language.
- */
-
-void _CPU_Context_restore_fp(
- Context_Control_fp **fp_context_ptr
-)
-{
-}
-
-/* _CPU_Context_switch
- *
- * This routine performs a normal non-FP context switch.
- */
-
-/* within __CPU_Context_switch:
- * _CPU_Context_switch
- * _CPU_Context_restore
- *
- * This routine is generally used only to restart self in an
- * efficient manner. It may simply be a label in _CPU_Context_switch.
- *
- * NOTE: It should be safe not to store r4, r5
- *
- * NOTE: It is doubtful if r0 is really needed to be stored
- *
- * NOTE: gbr is added, but should not be necessary, as it is
- * only used globally in this port.
- */
-
-/*
- * FIXME: This is an ugly hack, but we wanted to avoid recalculating
- * the offset each time Context_Control is changed
- */
-void __CPU_Context_switch(
- Context_Control *run, /* r4 */
- Context_Control *heir /* r5 */
-)
-{
-
-asm volatile(
- ".global __CPU_Context_switch\n"
-"__CPU_Context_switch:\n"
-
-" add %0,r4\n"
-
-" stc.l sr,@-r4\n"
-" stc.l gbr,@-r4\n"
-" mov.l r0,@-r4\n"
-" mov.l r1,@-r4\n"
-" mov.l r2,@-r4\n"
-" mov.l r3,@-r4\n"
-
-" mov.l r6,@-r4\n"
-" mov.l r7,@-r4\n"
-" mov.l r8,@-r4\n"
-" mov.l r9,@-r4\n"
-" mov.l r10,@-r4\n"
-" mov.l r11,@-r4\n"
-" mov.l r12,@-r4\n"
-" mov.l r13,@-r4\n"
-" mov.l r14,@-r4\n"
-" sts.l pr,@-r4\n"
-" sts.l mach,@-r4\n"
-" sts.l macl,@-r4\n"
-" mov.l r15,@-r4\n"
-
-" mov r5, r4\n"
- :: "i" (sizeof(Context_Control))
- );
-
- asm volatile(
- ".global __CPU_Context_restore\n"
-"__CPU_Context_restore:\n"
-" mov.l @r4+,r15\n"
-" lds.l @r4+,macl\n"
-" lds.l @r4+,mach\n"
-" lds.l @r4+,pr\n"
-" mov.l @r4+,r14\n"
-" mov.l @r4+,r13\n"
-" mov.l @r4+,r12\n"
-" mov.l @r4+,r11\n"
-" mov.l @r4+,r10\n"
-" mov.l @r4+,r9\n"
-" mov.l @r4+,r8\n"
-" mov.l @r4+,r7\n"
-" mov.l @r4+,r6\n"
-
-" mov.l @r4+,r3\n"
-" mov.l @r4+,r2\n"
-" mov.l @r4+,r1\n"
-" mov.l @r4+,r0\n"
-" ldc.l @r4+,gbr\n"
-" ldc.l @r4+,sr\n"
-
-" rts\n"
-" nop\n" );
-}
-
-/*
* This routine provides the RTEMS interrupt management.
*/