diff options
| author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2011-02-11 09:46:53 +0000 |
|---|---|---|
| committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2011-02-11 09:46:53 +0000 |
| commit | f9acc339fe66dce682d124d98956dd65af467676 (patch) | |
| tree | 8af3a889cbb103d58797db6eff866511e4d36d4d /c/src/lib/libcpu/powerpc/shared/src/cache.c | |
| parent | 2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org> (diff) | |
| download | rtems-f9acc339fe66dce682d124d98956dd65af467676.tar.bz2 | |
2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
* e500/mmu/mmu.c, mpc505/ictrl/ictrl.c, mpc505/timer/timer.c,
mpc5xx/ictrl/ictrl.c, mpc5xx/timer/timer.c,
mpc6xx/altivec/vec_sup.c, mpc6xx/clock/c_clock.c,
mpc6xx/mmu/bat.c, mpc6xx/mmu/bat.h, mpc6xx/mmu/pte121.c,
mpc8260/timer/timer.c, mpc8xx/timer/timer.c, new-exceptions/cpu.c,
new-exceptions/bspsupport/ppc_exc_initialize.c,
ppc403/clock/clock.c, ppc403/console/console.c,
ppc403/console/console.c.polled, ppc403/console/console405.c,
ppc403/irq/ictrl.c, ppc403/tty_drv/tty_drv.c,
rtems/powerpc/cache.h, shared/include/powerpc-utility.h, shared/src/cache.c:
Use "__asm__" instead of "asm" for improved c99-compliance.
Diffstat (limited to '')
| -rw-r--r-- | c/src/lib/libcpu/powerpc/shared/src/cache.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/c/src/lib/libcpu/powerpc/shared/src/cache.c b/c/src/lib/libcpu/powerpc/shared/src/cache.c index d40e7d0f39..00d16924a9 100644 --- a/c/src/lib/libcpu/powerpc/shared/src/cache.c +++ b/c/src/lib/libcpu/powerpc/shared/src/cache.c @@ -33,7 +33,7 @@ #define PPC_Get_HID0( _value ) \ do { \ _value = 0; /* to avoid warnings */ \ - asm volatile( \ + __asm__ volatile( \ "mfspr %0, 0x3f0;" /* get HID0 */ \ "isync" \ : "=r" (_value) \ @@ -43,7 +43,7 @@ #define PPC_Set_HID0( _value ) \ do { \ - asm volatile( \ + __asm__ volatile( \ "isync;" \ "mtspr 0x3f0, %0;" /* load HID0 */ \ "isync" \ @@ -269,14 +269,14 @@ void _CPU_cache_invalidate_1_data_line( const void * _address ) { register const void *__address = _address; - asm volatile ( "dcbi 0,%0" :: "r"(__address) : "memory" ); + __asm__ volatile ( "dcbi 0,%0" :: "r"(__address) : "memory" ); } void _CPU_cache_flush_1_data_line( const void * _address ) { register const void *__address = _address; - asm volatile ( "dcbf 0,%0" :: "r" (__address) : "memory" ); + __asm__ volatile ( "dcbf 0,%0" :: "r" (__address) : "memory" ); } @@ -284,7 +284,7 @@ void _CPU_cache_invalidate_1_instruction_line( const void * _address ) { register const void *__address = _address; - asm volatile ( "icbi 0,%0" :: "r" (__address) : "memory"); + __asm__ volatile ( "icbi 0,%0" :: "r" (__address) : "memory"); } /* end of file */ |