2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>

	* e500/mmu/mmu.c, mpc505/ictrl/ictrl.c, mpc505/timer/timer.c,
	mpc5xx/ictrl/ictrl.c, mpc5xx/timer/timer.c,
	mpc6xx/altivec/vec_sup.c, mpc6xx/clock/c_clock.c,
	mpc6xx/mmu/bat.c, mpc6xx/mmu/bat.h, mpc6xx/mmu/pte121.c,
	mpc8260/timer/timer.c, mpc8xx/timer/timer.c, new-exceptions/cpu.c,
	new-exceptions/bspsupport/ppc_exc_initialize.c,
	ppc403/clock/clock.c, ppc403/console/console.c,
	ppc403/console/console.c.polled, ppc403/console/console405.c,
	ppc403/irq/ictrl.c, ppc403/tty_drv/tty_drv.c,
	rtems/powerpc/cache.h, shared/include/powerpc-utility.h, shared/src/cache.c:
	Use "__asm__" instead of "asm" for improved c99-compliance.

6 files changed, 31 insertions, 31 deletions

diff --git a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
index 513049e1f8..e121dfbb3a 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
@@ -73,9 +73,9 @@ static inline uint32_t   get_itimer(void)
     register uint32_t   rc;
 
 #ifndef ppc405 /* this is a ppc403 */
-    asm volatile ("mfspr %0, 0x3dd" : "=r" ((rc))); /* TBLO */
+    __asm__ volatile ("mfspr %0, 0x3dd" : "=r" ((rc))); /* TBLO */
 #else /* ppc405 */
-    asm volatile ("mfspr %0, 0x10c" : "=r" ((rc))); /* 405GP TBL */
+    __asm__ volatile ("mfspr %0, 0x10c" : "=r" ((rc))); /* 405GP TBL */
 #endif /* ppc405 */
 
     return rc;
@@ -135,11 +135,11 @@ void Clock_isr(void* handle)
         /* XXX: count these! this should never happen :-) */
       }
 
-      asm volatile ("mtspr 0x3db, %0" :: "r"
+      __asm__ volatile ("mtspr 0x3db, %0" :: "r"
                          (clicks_til_next_interrupt)); /* PIT */
   }
 
-    asm volatile ( "mtspr 0x3d8, %0" :: "r" (0x08000000)); /* TSR */
+    __asm__ volatile ( "mtspr 0x3d8, %0" :: "r" (0x08000000)); /* TSR */
 
     Clock_driver_ticks++;
 
@@ -160,7 +160,7 @@ int ClockIsOn(const rtems_irq_connect_data* unused)
 {
     register uint32_t   tcr;
 
-    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
+    __asm__ volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
 
     return (tcr & 0x04000000) != 0;
 }
@@ -171,11 +171,11 @@ void ClockOff(
 {
     register uint32_t   tcr;
 
-    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
+    __asm__ volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
 
     tcr &= ~ 0x04400000;
 
-    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
+    __asm__ volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
 }
 
 void ClockOn(
@@ -191,16 +191,16 @@ void ClockOn(
     Clock_driver_ticks = 0;
 
 #ifndef ppc405 /* this is a ppc403 */
-    asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
+    __asm__ volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
     if (bsp_timer_internal_clock) {
 	iocr &= ~4; /* timer clocked from system clock */
     }
     else {
 	iocr |= 4; /* select external timer clock */
     }
-    asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
+    __asm__ volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
 
-    asm volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */
+    __asm__ volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */
     if (((pvr & 0xffff0000) >> 16) != 0x0020)
       return; /* Not a ppc403 */
 
@@ -215,14 +215,14 @@ void ClockOn(
       auto_restart = true;
 
 #else /* ppc405 */
-    asm volatile ("mfdcr %0, 0x0b2" : "=r" (iocr));  /*405GP CPC0_CR1 */
+    __asm__ volatile ("mfdcr %0, 0x0b2" : "=r" (iocr));  /*405GP CPC0_CR1 */
     if (bsp_timer_internal_clock) {
 	iocr &=~0x800000	;/* timer clocked from system clock CETE*/
     }
     else {
 	iocr |= 0x800000; /* select external timer clock CETE*/
     }
-    asm volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */
+    __asm__ volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */
 
      /*
       * Enable auto restart
@@ -238,7 +238,7 @@ void ClockOn(
       * Set PIT value
       */
 
-    asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
+    __asm__ volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
 
      /*
       * Set timer to autoreload, bit TCR->ARE = 1  0x0400000
@@ -246,10 +246,10 @@ void ClockOn(
       */
     tick_time = get_itimer() + pit_value;
 
-    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
+    __asm__ volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
     tcr = (tcr & ~0x04400000) | (auto_restart ? 0x04400000 : 0x04000000);
 #if 1
-    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
+    __asm__ volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
 #endif
 
 }
diff --git a/c/src/lib/libcpu/powerpc/ppc403/console/console.c b/c/src/lib/libcpu/powerpc/ppc403/console/console.c
index a7bb3dec51..fdba1ec751 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/console/console.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/console/console.c
@@ -351,12 +351,12 @@ spiInitialize(void)
    * select RTS/CTS hardware handshake lines,
    * select clock source
    */
-  asm volatile ("mfdcr %0, 0xa0" : "=r" (tmp)); /* IOCR */
+  __asm__ volatile ("mfdcr %0, 0xa0" : "=r" (tmp)); /* IOCR */
 
   tmp &= ~3;
   tmp |= (bsp_serial_external_clock ? 2 : 0) | 1;
 
-  asm volatile ("mtdcr 0xa0, %0" : "=r" (tmp) : "0" (tmp)); /* IOCR */
+  __asm__ volatile ("mtdcr 0xa0, %0" : "=r" (tmp) : "0" (tmp)); /* IOCR */
 
   /* clear any receive (error) status */
   port->SPLS = (LSRDataReady   | LSRFramingError | LSROverrunError |
diff --git a/c/src/lib/libcpu/powerpc/ppc403/console/console.c.polled b/c/src/lib/libcpu/powerpc/ppc403/console/console.c.polled
index eaf0975091..363db68c19 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/console/console.c.polled
+++ b/c/src/lib/libcpu/powerpc/ppc403/console/console.c.polled
@@ -146,11 +146,11 @@ rtems_device_driver console_initialize(
   extern uint32_t bsp_serial_rate;
 
   /* Initialise the serial port */
-  asm volatile ("mfdcr %0, 0xa0" : "=r" (tmp)); /* IOCR */
+  __asm__ volatile ("mfdcr %0, 0xa0" : "=r" (tmp)); /* IOCR */
   tmp &= ~3;
   tmp |= (bsp_serial_external_clock ? 2 : 0) |
       (bsp_serial_cts_rts ? 1 : 0);
-  asm volatile ("mtdcr 0xa0, %0" : "=r" (tmp) : "0" (tmp)); /* IOCR */
+  __asm__ volatile ("mtdcr 0xa0, %0" : "=r" (tmp) : "0" (tmp)); /* IOCR */
   port->SPLS = (LSRDataReady | LSRFramingError | LSROverrunError |
          LSRParityError | LSRBreakInterrupt);
   tmp = bsp_serial_per_sec / bsp_get_serial_rate;
diff --git a/c/src/lib/libcpu/powerpc/ppc403/console/console405.c b/c/src/lib/libcpu/powerpc/ppc403/console/console405.c
index 5e8a3b25eb..ef8ff2db15 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/console/console405.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/console/console405.c
@@ -367,14 +367,14 @@ spiInitialize(void)
    * Select clock source and set uart internal clock divisor
    */
 
-  asm volatile ("mfdcr %0, 0x0b1" : "=r" (tmp)); /* CPC_CR0 0x0b1 */
+  __asm__ volatile ("mfdcr %0, 0x0b1" : "=r" (tmp)); /* CPC_CR0 0x0b1 */
 
   /* UART0 bit 24 0x80, UART1 bit 25 0x40 */
   tmp |= (bsp_serial_external_clock ?  (USE_UART ? 0x40 : 0x80) : 0);
 
   tmp |= (bsp_serial_external_clock ?  0: ((UART_INTERNAL_CLOCK_DIVISOR -1) << 1));
 
-  asm volatile ("mtdcr 0x0b1, %0" : "=r" (tmp) : "0" (tmp)); /* CPC_CR0 0x0b1*/
+  __asm__ volatile ("mtdcr 0x0b1, %0" : "=r" (tmp) : "0" (tmp)); /* CPC_CR0 0x0b1*/
 
   /* Disable port interrupts while changing hardware */
   _ier = port->IER;
diff --git a/c/src/lib/libcpu/powerpc/ppc403/irq/ictrl.c b/c/src/lib/libcpu/powerpc/ppc403/irq/ictrl.c
index 86558485e4..eacfbb8e06 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/irq/ictrl.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/irq/ictrl.c
@@ -47,7 +47,7 @@ rtems_isr_entry ictrl_vector_table[PPC_IRQ_EXT_MAX];
 RTEMS_INLINE_ROUTINE void
 clr_exisr(uint32_t   mask)
 {
-    asm volatile ("mtdcr 0xC0,%0"::"r" (mask));/*EXISR*/
+    __asm__ volatile ("mtdcr 0xC0,%0"::"r" (mask));/*EXISR*/
 }
 
 /*
@@ -58,7 +58,7 @@ get_exisr(void)
 {
     uint32_t   val;
 
-    asm volatile ("mfdcr %0,0xC0":"=r" (val));/*EXISR*/
+    __asm__ volatile ("mfdcr %0,0xC0":"=r" (val));/*EXISR*/
     return val;
 }
 
@@ -69,7 +69,7 @@ RTEMS_INLINE_ROUTINE uint32_t
 get_exier(void)
 {
     uint32_t   val;
-    asm volatile ("mfdcr %0,0xC2":"=r" (val));/*EXIER*/
+    __asm__ volatile ("mfdcr %0,0xC2":"=r" (val));/*EXIER*/
     return val;
 }
 
@@ -79,7 +79,7 @@ get_exier(void)
 RTEMS_INLINE_ROUTINE void
 set_exier(uint32_t   val)
 {
-    asm volatile ("mtdcr 0xC2,%0"::"r" (val));/*EXIER*/
+    __asm__ volatile ("mtdcr 0xC2,%0"::"r" (val));/*EXIER*/
 }
 
 #else /* not ppc405 */
@@ -87,7 +87,7 @@ set_exier(uint32_t   val)
 RTEMS_INLINE_ROUTINE void
 clr_exisr(uint32_t   mask)
 {
-    asm volatile ("mtdcr 0x40,%0"::"r" (mask));/*EXISR*/
+    __asm__ volatile ("mtdcr 0x40,%0"::"r" (mask));/*EXISR*/
 }
 
 /*
@@ -98,7 +98,7 @@ get_exisr(void)
 {
     uint32_t   val;
 
-    asm volatile ("mfdcr %0,0x40":"=r" (val));/*EXISR*/
+    __asm__ volatile ("mfdcr %0,0x40":"=r" (val));/*EXISR*/
     return val;
 }
 
@@ -109,7 +109,7 @@ RTEMS_INLINE_ROUTINE uint32_t
 get_exier(void)
 {
     uint32_t   val;
-    asm volatile ("mfdcr %0,0x42":"=r" (val));/*EXIER*/
+    __asm__ volatile ("mfdcr %0,0x42":"=r" (val));/*EXIER*/
     return val;
 }
 
@@ -119,7 +119,7 @@ get_exier(void)
 RTEMS_INLINE_ROUTINE void
 set_exier(uint32_t   val)
 {
-    asm volatile ("mtdcr 0x42,%0"::"r" (val));/*EXIER*/
+    __asm__ volatile ("mtdcr 0x42,%0"::"r" (val));/*EXIER*/
 }
 #endif /* ppc405 */
 /*
diff --git a/c/src/lib/libcpu/powerpc/ppc403/tty_drv/tty_drv.c b/c/src/lib/libcpu/powerpc/ppc403/tty_drv/tty_drv.c
index 5bcfc2ac77..7a52950285 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/tty_drv/tty_drv.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/tty_drv/tty_drv.c
@@ -359,14 +359,14 @@ tty0Initialize(void)
    * Select clock source and set uart internal clock divisor
    */
 
-  asm volatile ("mfdcr %0, 0x0b1" : "=r" (tmp)); /* CPC_CR0 0x0b1 */
+  __asm__ volatile ("mfdcr %0, 0x0b1" : "=r" (tmp)); /* CPC_CR0 0x0b1 */
 
   /* UART0 bit 24 0x80, UART1 bit 25 0x40 */
   tmp |= (bsp_serial_external_clock ?  (TTY0_USE_UART ? 0x40 : 0x80) : 0);
 
   tmp |= (bsp_serial_external_clock ?  0: ((TTY0_UART_INTERNAL_CLOCK_DIVISOR -1) << 1));
 
-  asm volatile ("mtdcr 0x0b1, %0" : "=r" (tmp) : "0" (tmp)); /* CPC_CR0 0x0b1*/
+  __asm__ volatile ("mtdcr 0x0b1, %0" : "=r" (tmp) : "0" (tmp)); /* CPC_CR0 0x0b1*/
 
   /* Disable tty0port interrupts while changing hardware */
   _ier = tty0port->IER;