Whitespace removal.

9 files changed, 245 insertions, 245 deletions

diff --git a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
index afd282acdb..c9d9243b52 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
@@ -67,7 +67,7 @@ static uint32_t   pit_value, tick_time;
 static bool auto_restart;
 
 void Clock_exit( void );
- 
+
 rtems_isr_entry set_vector(                    /* returns old vector */
   rtems_isr_entry     handler,                  /* isr routine        */
   rtems_vector_number vector,                   /* vector number      */
@@ -77,10 +77,10 @@ rtems_isr_entry set_vector(                    /* returns old vector */
 /*
  * These are set by clock driver during its init
  */
- 
+
 rtems_device_major_number rtems_clock_major = ~0;
 rtems_device_minor_number rtems_clock_minor;
- 
+
 static inline uint32_t   get_itimer(void)
 {
     register uint32_t   rc;
@@ -117,10 +117,10 @@ void Clock_isr(void* handle)
        * setup for next interrupt; making sure the new value is reasonably
        * in the future.... in case we lost out on an interrupt somehow
        */
- 
+
       itimer_value = get_itimer();
       tick_time += pit_value;
- 
+
       /*
        * how far away is next interrupt *really*
        * It may be a long time; this subtraction works even if
@@ -128,42 +128,42 @@ void Clock_isr(void* handle)
        * the miracle of unsigned math.
        */
       clicks_til_next_interrupt = tick_time - itimer_value;
- 
+
       /*
        * If it is too soon then bump it up.
        * This should only happen if CPU_HPPA_CLICKS_PER_TICK is too small.
        * But setting it low is useful for debug, so...
        */
- 
+
       if (clicks_til_next_interrupt < 400)
       {
         tick_time = itimer_value + 1000;
         clicks_til_next_interrupt = 1000;
         /* XXX: count these! this should be rare */
       }
- 
+
       /*
        * If it is too late, that means we missed the interrupt somehow.
        * Rather than wait 35-50s for a wrap, we just fudge it here.
        */
- 
+
       if (clicks_til_next_interrupt > pit_value)
       {
         tick_time = itimer_value + 1000;
         clicks_til_next_interrupt = 1000;
         /* XXX: count these! this should never happen :-) */
       }
- 
-      asm volatile ("mtspr 0x3db, %0" :: "r" 
+
+      asm volatile ("mtspr 0x3db, %0" :: "r"
                          (clicks_til_next_interrupt)); /* PIT */
   }
- 
+
     asm volatile ( "mtspr 0x3d8, %0" :: "r" (0x08000000)); /* TSR */
- 
+
     Clock_driver_ticks++;
 
 	/* Give BSP a chance to say if they want to re-enable interrupts */
- 
+
 #if defined(BSP_PPC403_CLOCK_ISR_IRQ_LEVEL)
 	_ISR_Set_level(BSP_PPC403_CLOCK_ISR_IRQ_LEVEL);
 #endif
@@ -183,9 +183,9 @@ void Clock_isr(void* handle)
 int ClockIsOn(const rtems_irq_connect_data* unused)
 {
     register uint32_t   tcr;
- 
+
     asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
- 
+
     return (tcr & 0x04000000) != 0;
 }
 #endif
@@ -199,12 +199,12 @@ void ClockOff(
 	      )
 {
     register uint32_t   tcr;
- 
+
     asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
- 
+
     tcr &= ~ 0x04400000;
- 
-    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */ 
+
+    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
 }
 
 void ClockOn(
@@ -222,9 +222,9 @@ void ClockOn(
 #ifdef ppc403
     uint32_t   pvr;
 #endif /* ppc403 */
- 
+
     Clock_driver_ticks = 0;
- 
+
 #ifndef ppc405 /* this is a ppc403 */
     asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
     if (bsp_timer_internal_clock) {
@@ -234,21 +234,21 @@ void ClockOn(
 	iocr |= 4; /* select external timer clock */
     }
     asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
- 
+
     asm volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */
     if (((pvr & 0xffff0000) >> 16) != 0x0020)
       return; /* Not a ppc403 */
- 
+
     if ((pvr & 0xff00) == 0x0000) /* 403GA */
 #if 0 /* FIXME: in which processor versions will "autoload" work properly? */
       auto_restart = (pvr & 0x00f0) > 0x0000 ? true : false;
-#else 
+#else
     /* no known chip version supports auto restart of timer... */
     auto_restart = false;
 #endif
     else if ((pvr & 0xff00) == 0x0100) /* 403GB */
       auto_restart = true;
- 
+
 #else /* ppc405 */
     asm volatile ("mfdcr %0, 0x0b2" : "=r" (iocr));  /*405GP CPC0_CR1 */
     if (bsp_timer_internal_clock) {
@@ -268,20 +268,20 @@ void ClockOn(
 #endif /* ppc405 */
     pit_value = rtems_configuration_get_microseconds_per_tick() *
       bsp_clicks_per_usec;
- 
+
      /*
       * Set PIT value
       */
 
     asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
- 
-     /*     
+
+     /*
       * Set timer to autoreload, bit TCR->ARE = 1  0x0400000
       * Enable PIT interrupt, bit TCR->PIE = 1     0x4000000
       */
     tick_time = get_itimer() + pit_value;
 
-    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ 
+    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
     tcr = (tcr & ~0x04400000) | (auto_restart ? 0x04400000 : 0x04000000);
 #if 1
     asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
@@ -304,9 +304,9 @@ void Install_clock(
 #ifdef ppc403
     uint32_t   pvr;
 #endif /* ppc403 */
- 
+
     Clock_driver_ticks = 0;
- 
+
     /*
      * initialize the interval here
      * First tick is set to right amount of time in the future
@@ -355,9 +355,9 @@ ReInstall_clock(
 )
 {
   uint32_t   isrlevel = 0;
-  
+
   rtems_interrupt_disable(isrlevel);
-  
+
 #if PPC_HAS_CLASSIC_EXCEPTIONS
  {
    rtems_isr_entry previous_isr;
@@ -372,15 +372,15 @@ ReInstall_clock(
 #else
   {
     rtems_irq_connect_data clockIrqConnData;
-    
+
     clockIrqConnData.name = BSP_PIT;
     if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) {
       printk("Unable to stop system clock\n");
       rtems_fatal_error_occurred(1);
     }
-    
+
     BSP_remove_rtems_irq_handler (&clockIrqConnData);
-    
+
     clockIrqConnData.on   = ClockOn;
     clockIrqConnData.off  = ClockOff;
     clockIrqConnData.isOn = ClockIsOn;
@@ -402,15 +402,15 @@ ReInstall_clock(
  * Called via atexit()
  * Remove the clock interrupt handler by setting handler to NULL
  *
- * This will not work on the 405GP because 
- * when bit's are set in TCR they can only be unset by a reset 
+ * This will not work on the 405GP because
+ * when bit's are set in TCR they can only be unset by a reset
  */
 
 void Clock_exit(void)
 {
 #if PPC_HAS_CLASSIC_EXCEPTIONS
   ClockOff();
- 
+
   (void) set_vector(0, PPC_IRQ_PIT, 1);
 #elif defined(BSP_PPC403_CLOCK_HOOK_EXCEPTION)
   ClockOff();
@@ -418,13 +418,13 @@ void Clock_exit(void)
 #else
  {
     rtems_irq_connect_data clockIrqConnData;
-    
+
     clockIrqConnData.name = BSP_PIT;
     if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) {
       printk("Unable to stop system clock\n");
       rtems_fatal_error_occurred(1);
     }
-    
+
     BSP_remove_rtems_irq_handler (&clockIrqConnData);
  }
 #endif
@@ -437,13 +437,13 @@ rtems_device_driver Clock_initialize(
 )
 {
   Install_clock( Clock_isr );
- 
+
   /*
    * make major/minor avail to others such as shared memory driver
    */
- 
+
   rtems_clock_major = major;
   rtems_clock_minor = minor;
- 
+
   return RTEMS_SUCCESSFUL;
 }
diff --git a/c/src/lib/libcpu/powerpc/ppc403/clock/clock_4xx.c b/c/src/lib/libcpu/powerpc/ppc403/clock/clock_4xx.c
index 041e6f9aa9..73f629c4d0 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/clock/clock_4xx.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/clock/clock_4xx.c
@@ -62,7 +62,7 @@ volatile uint32_t   Clock_driver_ticks;
 static uint32_t   pit_value, tick_time;
 
 void Clock_exit( void );
- 
+
 rtems_isr_entry set_vector(                    /* returns old vector */
   rtems_isr_entry     handler,                  /* isr routine        */
   rtems_vector_number vector,                   /* vector number      */
@@ -76,10 +76,10 @@ extern bool bsp_timer_internal_clock;
 /*
  * These are set by clock driver during its init
  */
- 
+
 rtems_device_major_number rtems_clock_major = ~0;
 rtems_device_minor_number rtems_clock_minor;
- 
+
 /*
  *  ISR Handler
  */
@@ -99,7 +99,7 @@ int ClockIsOn(const rtems_irq_connect_data* unused)
 void ClockOff(const rtems_irq_connect_data* unused)
 {
     register uint32_t   r;
- 
+
 	r = mfspr(TCR);
 	mtspr(TCR, r & ~(PIE | ARE) );
 }
@@ -109,7 +109,7 @@ void ClockOn(const rtems_irq_connect_data* unused)
     uint32_t   iocr, r;
 	ppc_cpu_id_t cpu;
     Clock_driver_ticks = 0;
- 
+
  	cpu = get_ppc_cpu_type();
 	if (cpu==PPC_405GP) {
 		iocr = mfdcr(CPC0_CR1);
@@ -138,7 +138,7 @@ void ClockOn(const rtems_irq_connect_data* unused)
 
 void Install_clock(void (*clock_isr)(void *))
 {
-  
+
     /*
      * initialize the interval here
      * First tick is set to right amount of time in the future
@@ -193,14 +193,14 @@ ReInstall_clock(void (*new_clock_isr)(void *))
  * Called via atexit()
  * Remove the clock interrupt handler by setting handler to NULL
  *
- * This will not work on the 405GP because 
- * when bit's are set in TCR they can only be unset by a reset 
+ * This will not work on the 405GP because
+ * when bit's are set in TCR they can only be unset by a reset
  */
 
 void Clock_exit(void)
 {
     rtems_irq_connect_data clockIrqConnData;
-    
+
     clockIrqConnData.name = BSP_PIT;
     if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) {
       printk("Unable to stop system clock\n");
@@ -217,12 +217,12 @@ rtems_device_driver Clock_initialize(
 )
 {
   Install_clock( Clock_isr );
- 
+
   /*
    * make major/minor avail to others such as shared memory driver
    */
   rtems_clock_major = major;
   rtems_clock_minor = minor;
- 
+
   return RTEMS_SUCCESSFUL;
 }
diff --git a/c/src/lib/libcpu/powerpc/ppc403/console/console.c b/c/src/lib/libcpu/powerpc/ppc403/console/console.c
index 617f93a0fc..a7bb3dec51 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/console/console.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/console/console.c
@@ -5,12 +5,12 @@
  *              IMD Ingenieurbuero fuer Microcomputertechnik
  *
  *  COPYRIGHT (c) 1998 by IMD
- * 
+ *
  *  Changes from IMD are covered by the original distributions terms.
  *  changes include interrupt support and termios support
- *  for backward compatibility, the original polled driver has been 
+ *  for backward compatibility, the original polled driver has been
  *  renamed to console.c.polled
- * 
+ *
  *  This file has been initially created (polled version) by
  *
  *  Author:	Andrew Bray <andy@i-cubed.co.uk>
@@ -205,7 +205,7 @@ spiStopRemoteTx (int minor)
   return 0;
 }
 
-void 
+void
 spiBaudSet(uint32_t   baudrate)
 {
   uint32_t   tmp;
@@ -266,8 +266,8 @@ spiPollRead (int minor)
       port->SPLS = (LSRFramingError | LSROverrunError | LSRParityError |
 		    LSRBreakInterrupt);
     }
-  } 
-  return port->SPRB;  
+  }
+  return port->SPRB;
 }
 
 static int
@@ -278,9 +278,9 @@ spiInterruptWrite (int minor, const char *buf, int len)
   return 0;
 }
 
-static int 
+static int
 spiPollWrite(int minor,const char *buf,int len)
-{  
+{
   unsigned char status;
 
   while (len-- > 0) {
@@ -295,18 +295,18 @@ spiPollWrite(int minor,const char *buf,int len)
   return 0;
 }
 
-/* 
+/*
  *
- * deinit SPI 
+ * deinit SPI
  *
  */
 void
-spiDeInit(void) 
+spiDeInit(void)
 {
   extern uint32_t bsp_serial_rate;
   /*
-   * disable interrupts for serial port 
-   * set it to state to work with polling boot monitor, if any... 
+   * disable interrupts for serial port
+   * set it to state to work with polling boot monitor, if any...
    */
 
   /* set up baud rate to original state */
@@ -317,8 +317,8 @@ spiDeInit(void)
 		LSRParityError | LSRBreakInterrupt);
 
   /* set up port control: DTR/RTS active,8 bit,1 stop,no parity */
-  port->SPCTL = (CRNormal | 
-		 CRDtr | CRRts | 
+  port->SPCTL = (CRNormal |
+		 CRDtr | CRRts |
 		 CRWordLength8 | CRParityDisable | CRStopBitsOne);
 
   /* clear handshake status bits */
@@ -330,13 +330,13 @@ spiDeInit(void)
 
 }
 
-/* 
+/*
  *
- * init SPI 
+ * init SPI
  *
  */
-rtems_status_code 
-spiInitialize(void) 
+rtems_status_code
+spiInitialize(void)
 {
   register unsigned tmp;
   rtems_isr_entry previous_isr; /* this is a dummy */
@@ -344,12 +344,12 @@ spiInitialize(void)
   extern uint32_t bsp_serial_rate;
 
   /*
-   * Initialise the serial port 
+   * Initialise the serial port
    */
 
-  /* 
-   * select RTS/CTS hardware handshake lines, 
-   * select clock source 
+  /*
+   * select RTS/CTS hardware handshake lines,
+   * select clock source
    */
   asm volatile ("mfdcr %0, 0xa0" : "=r" (tmp)); /* IOCR */
 
@@ -366,8 +366,8 @@ spiInitialize(void)
   spiBaudSet(bsp_serial_rate);
 
   /* set up port control: DTR/RTS active,8 bit,1 stop,no parity */
-  port->SPCTL = (CRNormal | 
-		 CRDtr | CRRts | 
+  port->SPCTL = (CRNormal |
+		 CRDtr | CRRts |
 		 CRWordLength8 | CRParityDisable | CRStopBitsOne);
 
   /* clear handshake status bits */
@@ -445,7 +445,7 @@ rtems_device_driver console_initialize(
 /*
  *  Open entry point
  */
- 
+
 rtems_device_driver console_open(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -477,7 +477,7 @@ rtems_device_driver console_open(
 
   if (ppc403_spi_interrupt) {
     rtems_libio_open_close_args_t *args = arg;
-    
+
     sc = rtems_termios_open (major, minor, arg, &intrCallbacks);
     spittyp = args->iop->data1;
   }
@@ -486,11 +486,11 @@ rtems_device_driver console_open(
   }
   return sc;
 }
- 
+
 /*
  *  Close entry point
  */
- 
+
 rtems_device_driver console_close(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -499,11 +499,11 @@ rtems_device_driver console_close(
 {
   return rtems_termios_close (arg);
 }
- 
+
 /*
  * read bytes from the serial port. We only have stdin.
  */
- 
+
 rtems_device_driver console_read(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -512,11 +512,11 @@ rtems_device_driver console_read(
 {
   return rtems_termios_read (arg);
 }
- 
+
 /*
  * write bytes to the serial port. Stdout and stderr are the same.
  */
- 
+
 rtems_device_driver console_write(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -525,11 +525,11 @@ rtems_device_driver console_write(
 {
   return rtems_termios_write (arg);
 }
- 
+
 /*
  *  IO Control entry point
  */
- 
+
 rtems_device_driver console_control(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
diff --git a/c/src/lib/libcpu/powerpc/ppc403/console/console405.c b/c/src/lib/libcpu/powerpc/ppc403/console/console405.c
index cf54621d57..ecba975d8d 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/console/console405.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/console/console405.c
@@ -5,12 +5,12 @@
  *              IMD Ingenieurbuero fuer Microcomputertechnik
  *
  *  COPYRIGHT (c) 1998 by IMD
- * 
+ *
  *  Changes from IMD are covered by the original distributions terms.
  *  changes include interrupt support and termios support
- *  for backward compatibility, the original polled driver has been 
+ *  for backward compatibility, the original polled driver has been
  *  renamed to console.c.polled
- * 
+ *
  *  This file has been initially created (polled version) by
  *
  *  Author:	Andrew Bray <andy@i-cubed.co.uk>
@@ -110,7 +110,7 @@ struct async {
 /*---------------------------------------------------------------------------+
 | Alternate function registers
 +---------------------------------------------------------------------------*/
-  #define AFR   ISR	
+  #define AFR   ISR
 
 /*---------------------------------------------------------------------------+
 | Line control Register.
@@ -190,7 +190,7 @@ static int spiBaudRound(double x)
   return (int)((int)((x-(int)x)*1000)>500 ? x+1 : x);
 }
 
-void 
+void
 spiBaudSet(uint32_t   baudrate)
 {
   uint32_t   tmp;
@@ -250,13 +250,13 @@ spiPollRead (int minor)
   /* Wait for character */
   while ((port->LSR & LSR_RSR)==0);;
 
-  return port->RBR;  
+  return port->RBR;
 }
 
 
-static int 
+static int
 spiPollWrite(int minor,const char *buf,int len)
-{  
+{
 
   while (len-- > 0) {
     while (!(port->LSR & LSR_THE));;
@@ -275,7 +275,7 @@ spiStartRemoteTx (int minor)
   rtems_interrupt_level level;
 
   rtems_interrupt_disable (level);
-  port->SPCTL |= CRRts;            activate RTS  
+  port->SPCTL |= CRRts;            activate RTS
   rtems_interrupt_enable (level);
 */
   return 0;
@@ -288,7 +288,7 @@ spiStopRemoteTx (int minor)
   rtems_interrupt_level level;
 
   rtems_interrupt_disable (level);
-  port->SPCTL &= ~CRRts;            deactivate RTS  
+  port->SPCTL &= ~CRRts;            deactivate RTS
   rtems_interrupt_enable (level);
 */
   return 0;
@@ -308,12 +308,12 @@ static rtems_isr serial_ISR(rtems_vector_number v)
   int res;
 
   _isr=port->ISR & 0x0E;
-   
+
    if ((_isr == ISR_Rx) || (_isr==ISR_RxTO)) {
     	ch = port->RBR;
     	rtems_termios_enqueue_raw_characters (spittyp,&ch,1);
    }
-   
+
    if (_isr == ISR_Tx) {
 	res = rtems_termios_dequeue_characters (spittyp,1);
 	if (res==0) {
@@ -324,18 +324,18 @@ static rtems_isr serial_ISR(rtems_vector_number v)
 }
 
 
-/* 
+/*
  *
- * deinit SPI 
+ * deinit SPI
  *
  */
 void
-spiDeInit(void) 
+spiDeInit(void)
 {
   extern uint32_t bsp_serial_rate;
   /*
-   * disable interrupts for serial port 
-   * set it to state to work with polling boot monitor, if any... 
+   * disable interrupts for serial port
+   * set it to state to work with polling boot monitor, if any...
    */
 
 
@@ -346,13 +346,13 @@ spiDeInit(void)
 
 }
 
-/* 
+/*
  *
- * init SPI 
+ * init SPI
  *
  */
-rtems_status_code 
-spiInitialize(void) 
+rtems_status_code
+spiInitialize(void)
 {
   register unsigned tmp;
   rtems_isr_entry previous_isr; /* this is a dummy */
@@ -361,10 +361,10 @@ spiInitialize(void)
   extern uint32_t bsp_serial_rate;
 
   /*
-   * Initialise the serial port 
+   * Initialise the serial port
    */
 
-  /* 
+  /*
    * Select clock source and set uart internal clock divisor
    */
 
@@ -386,11 +386,11 @@ spiInitialize(void)
 
   /* set up baud rate */
   spiBaudSet(bsp_serial_rate);
- 
+
   if (ppc403_spi_interrupt) {
 
     /* add rx/tx isr to vector table */
-    if (USE_UART==0) 
+    if (USE_UART==0)
 	ictrl_set_vector(serial_ISR,PPC_IRQ_EXT_UART0,&previous_isr);
     else
 	ictrl_set_vector(serial_ISR,PPC_IRQ_EXT_UART1,&previous_isr);
@@ -458,7 +458,7 @@ rtems_device_driver console_initialize(
 /*
  *  Open entry point
  */
- 
+
 rtems_device_driver console_open(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -498,11 +498,11 @@ rtems_device_driver console_open(
   }
   return sc;
 }
- 
+
 /*
  *  Close entry point
  */
- 
+
 rtems_device_driver console_close(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -511,11 +511,11 @@ rtems_device_driver console_close(
 {
   return rtems_termios_close (arg);
 }
- 
+
 /*
  * read bytes from the serial port. We only have stdin.
  */
- 
+
 rtems_device_driver console_read(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -524,11 +524,11 @@ rtems_device_driver console_read(
 {
   return rtems_termios_read (arg);
 }
- 
+
 /*
  * write bytes to the serial port. Stdout and stderr are the same.
  */
- 
+
 rtems_device_driver console_write(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -537,11 +537,11 @@ rtems_device_driver console_write(
 {
   return rtems_termios_write (arg);
 }
- 
+
 /*
  *  IO Control entry point
  */
- 
+
 rtems_device_driver console_control(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
diff --git a/c/src/lib/libcpu/powerpc/ppc403/include/ppc405ex.h b/c/src/lib/libcpu/powerpc/ppc403/include/ppc405ex.h
index e64fc2d936..e1d1b67409 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/include/ppc405ex.h
+++ b/c/src/lib/libcpu/powerpc/ppc403/include/ppc405ex.h
@@ -3,7 +3,7 @@
 
 Constants for manipulating system registers of PPC 405EX in C
 
-Michael Hamel ADInstruments May 2008 
+Michael Hamel ADInstruments May 2008
 
 */
 
diff --git a/c/src/lib/libcpu/powerpc/ppc403/include/ppc405gp.h b/c/src/lib/libcpu/powerpc/ppc403/include/ppc405gp.h
index 814f18d046..792f32193f 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/include/ppc405gp.h
+++ b/c/src/lib/libcpu/powerpc/ppc403/include/ppc405gp.h
@@ -73,7 +73,7 @@ enum {
 	kEMACSoftRst  = 0x20000000,
 	kEMACTxEnable = 0x10000000,
 	kEMACRxEnable = 0x08000000,
-	
+
 	// Mode 1 bits
 	kEMACFullDuplex = 0x80000000,
 	kEMACIgnoreSQE  = 0x01000000,
@@ -82,11 +82,11 @@ enum {
 	kEMAC2KTxFIFO	 = 0x00080000,
 	kEMACTx0Multi	 = 0x00008000,
 	kEMACTxDependent= 0x00014000,
-	
+
 	// Tx mode bits
 	kEMACNewPacket0	= 0x80000000,
 	kEMACNewPacket1	= 0x40000000,
-	
+
 	// Receive mode bits
 	kEMACStripPadding = 0x80000000,
 	kEMACStripFCS     = 0x40000000,
@@ -99,7 +99,7 @@ enum {
 	kEMACHashRcv		= 0x00200000,
 	kEMACBrcastRcv		= 0x00100000,
 	kEMACMultcastRcv	= 0x00080000,
-	
+
 	// Buffer descriptor control bits
 	kMALTxReady			= 0x8000,
 	kMALRxEmpty			= 0x8000,
@@ -108,7 +108,7 @@ enum {
 	kMALLast				= 0x1000,
 	kMALRxFirst			= 0x0800,
 	kMALInterrupt		= 0x0400,
-	
+
 	// EMAC Tx descriptor bits sent
 	kEMACGenFCS			= 0x200,
 	kEMACGenPad			= 0x100,
@@ -116,7 +116,7 @@ enum {
 	kEMACRepSrcAddr	= 0x040,
 	kEMACInsVLAN		= 0x020,
 	kEMACRepVLAN		= 0x010,
-	
+
 	// EMAC TX descriptor bits returned
 	kEMACErrMask      = 0x3FF,
 	kEMACFCSWrong		= 0x200,
@@ -129,7 +129,7 @@ enum {
 	kEMACOneColl		= 0x004,
 	kEMACUnderrun		= 0x002,
 	kEMACSQEFail		= 0x001,
-	
+
 	// EMAC Rx descriptor bits returned
 	kEMACOverrun  		= 0x200,
 	kEMACPausePkt 		= 0x100,
diff --git a/c/src/lib/libcpu/powerpc/ppc403/irq/ictrl.c b/c/src/lib/libcpu/powerpc/ppc403/irq/ictrl.c
index 22580a7d06..86558485e4 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/irq/ictrl.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/irq/ictrl.c
@@ -18,7 +18,7 @@
  *      IMD makes no representations about the suitability
  *      of this software for any purpose.
  *
- *  Modifications for PPC405GP by Dennis Ehlin 
+ *  Modifications for PPC405GP by Dennis Ehlin
  *
  */
 
@@ -31,101 +31,101 @@
 /*
  *  ISR vector table to dispatch external interrupts
  */
- 
+
 rtems_isr_entry ictrl_vector_table[PPC_IRQ_EXT_MAX];
 
-/* 
+/*
  *
  *  some utilities to access the EXI* registers
  *
  */
 
-/* 
- *  clear bits in EXISR that have a bit set in mask 
+/*
+ *  clear bits in EXISR that have a bit set in mask
  */
 #if defined(ppc405)
-RTEMS_INLINE_ROUTINE void 
-clr_exisr(uint32_t   mask) 
+RTEMS_INLINE_ROUTINE void
+clr_exisr(uint32_t   mask)
 {
     asm volatile ("mtdcr 0xC0,%0"::"r" (mask));/*EXISR*/
-} 
+}
 
-/* 
- *  get value of EXISR 
+/*
+ *  get value of EXISR
  */
-RTEMS_INLINE_ROUTINE uint32_t   
-get_exisr(void) 
+RTEMS_INLINE_ROUTINE uint32_t
+get_exisr(void)
 {
     uint32_t   val;
 
     asm volatile ("mfdcr %0,0xC0":"=r" (val));/*EXISR*/
-    return val; 
-} 
+    return val;
+}
 
-/* 
- *  get value of EXIER 
+/*
+ *  get value of EXIER
  */
-RTEMS_INLINE_ROUTINE uint32_t   
-get_exier(void) 
+RTEMS_INLINE_ROUTINE uint32_t
+get_exier(void)
 {
     uint32_t   val;
     asm volatile ("mfdcr %0,0xC2":"=r" (val));/*EXIER*/
-    return val; 
-} 
+    return val;
+}
 
-/* 
- *  set value of EXIER 
+/*
+ *  set value of EXIER
  */
-RTEMS_INLINE_ROUTINE void 
-set_exier(uint32_t   val) 
+RTEMS_INLINE_ROUTINE void
+set_exier(uint32_t   val)
 {
     asm volatile ("mtdcr 0xC2,%0"::"r" (val));/*EXIER*/
-} 
+}
 
 #else /* not ppc405 */
 
-RTEMS_INLINE_ROUTINE void 
-clr_exisr(uint32_t   mask) 
+RTEMS_INLINE_ROUTINE void
+clr_exisr(uint32_t   mask)
 {
     asm volatile ("mtdcr 0x40,%0"::"r" (mask));/*EXISR*/
-} 
+}
 
-/* 
- *  get value of EXISR 
+/*
+ *  get value of EXISR
  */
-RTEMS_INLINE_ROUTINE uint32_t   
-get_exisr(void) 
+RTEMS_INLINE_ROUTINE uint32_t
+get_exisr(void)
 {
     uint32_t   val;
 
     asm volatile ("mfdcr %0,0x40":"=r" (val));/*EXISR*/
-    return val; 
-} 
+    return val;
+}
 
-/* 
- *  get value of EXIER 
+/*
+ *  get value of EXIER
  */
-RTEMS_INLINE_ROUTINE uint32_t   
-get_exier(void) 
+RTEMS_INLINE_ROUTINE uint32_t
+get_exier(void)
 {
     uint32_t   val;
     asm volatile ("mfdcr %0,0x42":"=r" (val));/*EXIER*/
-    return val; 
-} 
+    return val;
+}
 
-/* 
- *  set value of EXIER 
+/*
+ *  set value of EXIER
  */
-RTEMS_INLINE_ROUTINE void 
-set_exier(uint32_t   val) 
+RTEMS_INLINE_ROUTINE void
+set_exier(uint32_t   val)
 {
     asm volatile ("mtdcr 0x42,%0"::"r" (val));/*EXIER*/
-} 
+}
 #endif /* ppc405 */
-/* 
+/*
  *  enable an external interrupt, make this interrupt consistent
  */
-RTEMS_INLINE_ROUTINE void 
+RTEMS_INLINE_ROUTINE void
 enable_ext_irq( uint32_t   mask)
 {
   rtems_interrupt_level level;
@@ -135,10 +135,10 @@ enable_ext_irq( uint32_t   mask)
   rtems_interrupt_enable(level);
 }
 
-/* 
+/*
  *  disable an external interrupt, make this interrupt consistent
  */
-RTEMS_INLINE_ROUTINE void 
+RTEMS_INLINE_ROUTINE void
 disable_ext_irq( uint32_t   mask)
 {
   rtems_interrupt_level level;
@@ -150,19 +150,19 @@ disable_ext_irq( uint32_t   mask)
 
 /*
  *
- *  this function is called, when a external interrupt is present and 
+ *  this function is called, when a external interrupt is present and
  *  enabled but there is no handler installed. It will clear
  *  the corresponding enable bits and call the spurious handler
  *  present in the CPU Configuration Table, if any.
  *
  */
-void 
-ictrl_spurious_handler(uint32_t   spurious_mask, 
+void
+ictrl_spurious_handler(uint32_t   spurious_mask,
 		       CPU_Interrupt_frame *cpu_frame)
 {
   int v;
   extern void (*bsp_spurious_handler)(uint32_t   vector, CPU_Interrupt_frame *);
-  
+
   for (v=0; v < PPC_IRQ_EXT_MAX; v++) {
     if (VEC_TO_EXMSK(v) & spurious_mask) {
       clr_exisr(VEC_TO_EXMSK(v));
@@ -182,7 +182,7 @@ ictrl_spurious_handler(uint32_t   spurious_mask,
 /*
  *  ISR Handler: this is called from the primary exception dispatcher
  */
- 
+
 void
 ictrl_isr(rtems_vector_number vector,CPU_Interrupt_frame *cpu_frame)
 {
@@ -221,9 +221,9 @@ ictrl_isr(rtems_vector_number vector,CPU_Interrupt_frame *cpu_frame)
 
 /*
  *
- * install a user vector for one of the external interrupt sources 
+ * install a user vector for one of the external interrupt sources
  *
- */ 
+ */
 rtems_status_code
 ictrl_set_vector(rtems_isr_entry   new_handler,
 		 uint32_t          vector,
@@ -261,7 +261,7 @@ ictrl_set_vector(rtems_isr_entry   new_handler,
 
 /*
  * Called via atexit()
- * deactivate the interrupt controller 
+ * deactivate the interrupt controller
  */
 
 void
@@ -270,14 +270,14 @@ ictrl_exit(void)
   /* mark them all unused */
   disable_ext_irq(~0);
   clr_exisr(~0);
-  
+
 }
 
 /*
- * activate the interrupt controller 
+ * activate the interrupt controller
  */
 
-rtems_status_code 
+rtems_status_code
 ictrl_init(void)
 {
   proc_ptr dummy;
@@ -285,7 +285,7 @@ ictrl_init(void)
   /* mark them all unused */
   disable_ext_irq(~0);
   clr_exisr(~0);
-  
+
   /* install the external interrupt handler */
   _CPU_ISR_install_vector(PPC_IRQ_EXTERNAL,
 			  ictrl_isr,
diff --git a/c/src/lib/libcpu/powerpc/ppc403/irq/ictrl.h b/c/src/lib/libcpu/powerpc/ppc403/irq/ictrl.h
index cda39dc5cf..102a4a0406 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/irq/ictrl.h
+++ b/c/src/lib/libcpu/powerpc/ppc403/irq/ictrl.h
@@ -1,6 +1,6 @@
 /*  ictrl.h
  *
- *  This file contains definitions and declarations for the 
+ *  This file contains definitions and declarations for the
  *  PowerPC 403 CPU built-in external interrupt controller
  *
  *
@@ -35,9 +35,9 @@
 extern "C" {
 #endif
 
-/* 
+/*
  *  definitions for second level IRQ handler support
- *  External Interrupts via EXTERNAL/EISR 
+ *  External Interrupts via EXTERNAL/EISR
  */
 #define PPC_IRQ_EXT_BASE        (PPC_IRQ_LAST+1)
 
@@ -74,18 +74,18 @@ extern "C" {
 
 /*
  *
- * install a user vector for one of the external interrupt sources 
+ * install a user vector for one of the external interrupt sources
  *
- */ 
+ */
 rtems_status_code
 ictrl_set_vector(rtems_isr_entry   new_handler,
 		 uint32_t          vector,
 		 rtems_isr_entry   *old_handler
 );
 /*
- * activate the interrupt controller 
+ * activate the interrupt controller
  */
-rtems_status_code 
+rtems_status_code
 ictrl_init(void);
 
 #ifdef __cplusplus
diff --git a/c/src/lib/libcpu/powerpc/ppc403/tty_drv/tty_drv.c b/c/src/lib/libcpu/powerpc/ppc403/tty_drv/tty_drv.c
index 6aade98051..d26c8e2f3a 100644
--- a/c/src/lib/libcpu/powerpc/ppc403/tty_drv/tty_drv.c
+++ b/c/src/lib/libcpu/powerpc/ppc403/tty_drv/tty_drv.c
@@ -3,7 +3,7 @@
  *
  * Derived from /c/src/lib/libbsp/i386/shared/comm/tty_drv.c
  *
- * Modifications to PPC405GP by Dennis Ehlin 
+ * Modifications to PPC405GP by Dennis Ehlin
  *
  */
 
@@ -73,7 +73,7 @@ struct ttyasync {
 /*---------------------------------------------------------------------------+
 | Alternate function registers
 +---------------------------------------------------------------------------*/
-  #define AFR   ISR	
+  #define AFR   ISR
 
 /*---------------------------------------------------------------------------+
 | Line control Register.
@@ -154,7 +154,7 @@ int tty0_round(double x)
   return (int)((int)((x-(int)x)*1000)>500 ? x+1 : x);
 }
 
-void 
+void
 tty0BaudSet(uint32_t   baudrate)
 {
   uint32_t   tmp;
@@ -214,13 +214,13 @@ tty0PollRead (int minor)
   /* Wait for character */
   while ((tty0port->LSR & LSR_RSR)==0);;
 
-  return tty0port->RBR;  
+  return tty0port->RBR;
 }
 
 
-static int 
+static int
 tty0PollWrite(int minor,const char *buf,int len)
-{  
+{
 
   while (len-- > 0) {
     while (!(tty0port->LSR & LSR_THE));;
@@ -231,7 +231,7 @@ tty0PollWrite(int minor,const char *buf,int len)
 #endif
 
 /* ================ Termios support  =================*/
-    
+
 static int tty0InterruptWrite (int minor, const char *buf, int len)
 {
 
@@ -239,9 +239,9 @@ static int tty0InterruptWrite (int minor, const char *buf, int len)
     {
       return 0;
     }
- 
+
   /* Write character */
-  
+
   tty0port->THR = (*buf &0xff);
   tty0port->IER |= IER_XMT;     /* always enable tx interrupt */
 
@@ -259,7 +259,7 @@ static rtems_isr tty0serial_ISR(rtems_vector_number v)
   for(;;)
     {
 	  vect = tty0port->ISR & 0x0f;
-	  if(vect & 1) 
+	  if(vect & 1)
 	  {
 		  /* no more interrupts */
           if(off > 0) {
@@ -273,32 +273,32 @@ static rtems_isr tty0serial_ISR(rtems_vector_number v)
 	  }
 
 	vect = vect & 0xe; /*mask out all except interrupt pending*/
-      
+
     switch(vect)
 	{
 
 	case ISR_Tx :
-	  /* 
-	   * TX holding empty: we have to disable these interrupts 
-	   * if there is nothing more to send. 
+	  /*
+	   * TX holding empty: we have to disable these interrupts
+	   * if there is nothing more to send.
 	   */
 
 	  /* If nothing else to send disable interrupts */
 	  ret = rtems_termios_dequeue_characters(tty0ttyp, 1);
-         
+
           if ( ret == 0 ) {
    	    tty0port->IER &= ~IER_XMT;
           }
-		   
+
 	  break;
 	case ISR_RxTO:
 	case ISR_Rx :
 
               /* disable interrupts and notify termios */
-	       tty0port->IER &= ~IER_RCV; 
+	       tty0port->IER &= ~IER_RCV;
 
 	      /* read all bytes in fifo*/
-  	       while (( off < sizeof(buf) ) && (  tty0port->LSR & LSR_RSR )) 
+  	       while (( off < sizeof(buf) ) && (  tty0port->LSR & LSR_RSR ))
 			  {
 				buf[off++] = tty0port->RBR;
 			  }
@@ -318,17 +318,17 @@ static rtems_isr tty0serial_ISR(rtems_vector_number v)
 }
 
 
-/* 
+/*
  *
- * deinit TTY0 
+ * deinit TTY0
  *
  */
 void
-tty0DeInit(void) 
+tty0DeInit(void)
 {
   /*
-   * disable interrupts for serial tty0port 
-   * set it to state to work with polling boot monitor, if any... 
+   * disable interrupts for serial tty0port
+   * set it to state to work with polling boot monitor, if any...
    */
 
   /* set up baud rate to original state */
@@ -338,13 +338,13 @@ tty0DeInit(void)
 
 }
 
-/* 
+/*
  *
- * init SPI 
+ * init SPI
  *
  */
-rtems_status_code 
-tty0Initialize(void) 
+rtems_status_code
+tty0Initialize(void)
 {
   register unsigned tmp;
   rtems_isr_entry previous_isr; /* this is a dummy */
@@ -354,10 +354,10 @@ tty0Initialize(void)
   extern bool bsp_serial_external_clock;
 
   /*
-   * Initialise the serial tty0port 
+   * Initialise the serial tty0port
    */
 
-  /* 
+  /*
    * Select clock source and set uart internal clock divisor
    */
 
@@ -379,22 +379,22 @@ tty0Initialize(void)
 
   /* set up baud rate */
   tty0BaudSet(bsp_serial_rate);
- 
+
 
 #ifdef TTY0_USE_INTERRUPT
 
     /* add rx/tx isr to vector table */
 
-    if (TTY0_USE_UART==0) 
+    if (TTY0_USE_UART==0)
 	ictrl_set_vector(tty0serial_ISR,PPC_IRQ_EXT_UART0,&previous_isr);
     else
 	ictrl_set_vector(tty0serial_ISR,PPC_IRQ_EXT_UART1,&previous_isr);
-    
+
     /* Enable and clear FIFO */
     tty0port->FCR = FCR_FE | FCR_CRF | FCR_CTF | FCR_RT14;
 
     /* Read status to clear them */
-    _tmp = tty0port->LSR;   
+    _tmp = tty0port->LSR;
     _tmp = tty0port->RBR;
     _tmp = tty0port->MSR;
 
@@ -446,9 +446,9 @@ rtems_device_driver tty0_initialize(
   /*
    * Do device-specific initialization
    */
-   
+
   /*tty0Initialize ();   Moved this to open instead */
- 
+
   /*
    * Register the device
    */
@@ -462,7 +462,7 @@ rtems_device_driver tty0_initialize(
 /*
  *  Open entry point
  */
- 
+
 rtems_device_driver tty0_open(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -511,11 +511,11 @@ rtems_device_driver tty0_open(
 
     return sc;
 }
- 
+
 /*
  *  Close entry point
  */
- 
+
 rtems_device_driver tty0_close(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -524,11 +524,11 @@ rtems_device_driver tty0_close(
 {
   return rtems_termios_close (arg);
 }
- 
+
 /*
  * read bytes from the serial port. We only have stdin.
  */
- 
+
 rtems_device_driver tty0_read(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -537,11 +537,11 @@ rtems_device_driver tty0_read(
 {
   return rtems_termios_read (arg);
 }
- 
+
 /*
  * write bytes to the serial port. Stdout and stderr are the same.
  */
- 
+
 rtems_device_driver tty0_write(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
@@ -550,11 +550,11 @@ rtems_device_driver tty0_write(
 {
   return rtems_termios_write (arg);
 }
- 
+
 /*
  *  IO Control entry point
  */
- 
+
 rtems_device_driver tty0_control(
   rtems_device_major_number major,
   rtems_device_minor_number minor,