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authorJoel Sherrill <joel.sherrill@OARcorp.com>1998-09-30 21:55:53 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1998-09-30 21:55:53 +0000
commitaecfa2bf09e26bfef4cb07bfe31d94ab0c92ae1a (patch)
tree364d49eba07d2be2cc1455ab7f2dafcc261f706f /c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.h
parentBSP submitted by Thomas Doerfler <td@imd.m.isar.de>: (diff)
downloadrtems-aecfa2bf09e26bfef4cb07bfe31d94ab0c92ae1a.tar.bz2
BSP submitted by Thomas Doerfler <td@imd.m.isar.de>:
Finally I am through: I have found the last bugs that made RTEMS- 4.0-beta3 start on my ppc403 board from ROM. So now the '403 support is up to date again. Roughly I have added the following features: - support for the on-chip interrupt controller (in a separate module) - interrupt support for the console device - termios support for the console device ============================================== Since the BSP behaivour changed in some details (console no longer is polling, other memory layout etc) I have created a new BSP "helas403" rather than changing the "papyrus" BSP. The old "polled" console driver still sticks around in "console.c.polled" To get the BSP up and running, I had to create the new BSP files (derived from papyrus). Besides that, the following source areas have been changed: - c/src/lib/libcpu/powerpc/ppc403: changes to console driver, small changes to clock driver, new "ictrl" interrupt controller driver - c/src/exec/score/cpu/powerpc/ppc.h: some small changes (added ppc403 characteristics like a exception vector prefix register, some special register definitions). I am quite sure, they are compatible with the existing sources, although I did not check - c/src/exec/score/cpu/powerpc/cpu.c: There is one severe limitation in the exception entries: Due to the current code arrangement, the "branch absolute" to the ISR handler may only jump to the first 128MByte or the last 128MByte of the 4GByte address range. When the ppc403 is running out of ROM, the ROM functions are located in the last 128MByte (0xFFF00000 and up). These addresses were not handled correctly (sign reduced) in "install_raw_handler". The change I added should work on existing ppc BSPs aswell... - c/src/lib/libc/termios.c: During my tests, I added one change you sent me, so this patch will already be incorporated in the current source tree. There are some smaller changes, see the attached diff file. ========================================= Concerning the GNU toolchain: I tried several tool chains. Finally I almost succeeded with egcs-1.0.3a with patch egcs-1.0.3-rtems-diff-19980527 I had to add the following lines to the egcs files. Without them configure complaint that the cross compiler could not generate executable output. - additional lines needed in egcs distribution in file gcc/config/rs6000/rtems.h: +++ lines start #undef STARTFILE_DEFAULT_SPEC #define STARTFILE_DEFAULT_SPEC "ecrti.o%s" #undef ENDFILE_DEFAULT_SPEC #define ENDFILE_DEFAULT_SPEC "ecrtn.o%s" ++++ lines end As far as I have seen in the Changelog of egcs, you have recently sent two patches affecting the powerpc support, but they were added in the wrong order.... :-( egcs-19980628 with patch egcs-19980628-rtems-diff-19980707 does not work! I used binutils 2.9.1 with patch binutils-2.9.1-rtems-diff-19980515 (binutils 2.8.1 does not work, internal error in gas) and newlib-1.8.0 with patch newlib-1.8.0-rtems-diff-19980707 Finally I had to poke a line in the "bit" script, since, on my LINUX machine, the GNU make is only available as "make", not as "gmake"... For all the tools and newlib I selected configuration "powerpc- rtems". -------------------------------------------- IMD Ingenieurbuero fuer Microcomputertechnik Thomas Doerfler Herbststrasse 8 D-82178 Puchheim Germany email: td@imd.m.isar.de
Diffstat (limited to '')
-rw-r--r--c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.h84
1 files changed, 84 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.h b/c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.h
new file mode 100644
index 0000000000..5891d8aa2e
--- /dev/null
+++ b/c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.h
@@ -0,0 +1,84 @@
+/* ictrl.h
+ *
+ * This file contains definitions and declarations for the
+ * PowerPC 403 CPU built-in external interrupt controller
+ *
+ *
+ * Author: Thomas Doerfler <td@imd.m.isar.de>
+ *
+ * COPYRIGHT (c) 1998 by IMD, Puchheim, Germany
+ *
+ * To anyone who acknowledges that this file is provided "AS IS"
+ * without any express or implied warranty:
+ * permission to use, copy, modify, and distribute this file
+ * for any purpose is hereby granted without fee, provided that
+ * the above copyright notice and this notice appears in all
+ * copies, and that the name of IMD not be used in
+ * advertising or publicity pertaining to distribution of the
+ * software without specific, written prior permission.
+ * IMD makes no representations about the suitability
+ * of this software for any purpose.
+ *
+ */
+
+
+#ifndef _INCLUDE_ICTRL_h
+#define _INCLUDE_ICTRL_h
+
+#include <rtems.h>
+#include <rtems/system.h>
+#include <rtems/score/isr.h>
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * definitions for second level IRQ handler support
+ * External Interrupts via EXTERNAL/EISR
+ */
+#define PPC_IRQ_EXT_BASE (PPC_IRQ_LAST+1)
+
+/* mask for external interrupt status in EXIER/EXISR register */
+/* note: critical interrupt is in these registers aswell */
+#define PPC_EXI_MASK 0x0FFFFFFF
+
+#define PPC_IRQ_EXT_SPIR (PPC_IRQ_EXT_BASE+4)
+#define PPC_IRQ_EXT_SPIT (PPC_IRQ_EXT_BASE+5)
+#define PPC_IRQ_EXT_JTAGR (PPC_IRQ_EXT_BASE+6)
+#define PPC_IRQ_EXT_JTAGT (PPC_IRQ_EXT_BASE+7)
+#define PPC_IRQ_EXT_DMA0 (PPC_IRQ_EXT_BASE+8)
+#define PPC_IRQ_EXT_DMA1 (PPC_IRQ_EXT_BASE+9)
+#define PPC_IRQ_EXT_DMA2 (PPC_IRQ_EXT_BASE+10)
+#define PPC_IRQ_EXT_DMA3 (PPC_IRQ_EXT_BASE+11)
+#define PPC_IRQ_EXT_0 (PPC_IRQ_EXT_BASE+27)
+#define PPC_IRQ_EXT_1 (PPC_IRQ_EXT_BASE+28)
+#define PPC_IRQ_EXT_2 (PPC_IRQ_EXT_BASE+29)
+#define PPC_IRQ_EXT_3 (PPC_IRQ_EXT_BASE+30)
+#define PPC_IRQ_EXT_4 (PPC_IRQ_EXT_BASE+31)
+
+#define PPC_IRQ_EXT_MAX (32)
+
+#define VEC_TO_EXMSK(v) (0x80000000 >> (v))
+
+/*
+ *
+ * install a user vector for one of the external interrupt sources
+ *
+ */
+rtems_status_code
+ictrl_set_vector(rtems_isr_entry new_handler,
+ unsigned32 vector,
+ rtems_isr_entry *old_handler
+);
+/*
+ * activate the interrupt controller
+ */
+rtems_status_code
+ictrl_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! _INCLUDE_ICTRL_h */
+/* end of include file */