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authorTill Straumann <strauman@slac.stanford.edu>2008-07-10 21:31:06 +0000
committerTill Straumann <strauman@slac.stanford.edu>2008-07-10 21:31:06 +0000
commit8bac4851a68eb074fbdaa3b9be634b3bc4a7ba38 (patch)
tree08f7bcf7e7cc06884ad6d832b22df897b9db8d08 /c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors_init.c
parent2008-07-10 Till Straumann <strauman@slac.stanford.edu> (diff)
downloadrtems-8bac4851a68eb074fbdaa3b9be634b3bc4a7ba38.tar.bz2
2008-07-10 Till Straumann <strauman@slac.stanford.edu>
* new-exceptions/bspsupport/ppc_exc_asm_macros.S, new-exceptions/bspsupport/ppc_exc_bspsupp.h, new-exceptions/bspsupport/ppc_exc_hdl.c, new-exceptions/bspsupport/vectors_init.c: fixed and enabled stack-switching algorithm which figures out if we already run on the ISR stack rather than relying on the _ISR_Nest_level. Added 'ppc_exc_crit_always_enabled' variable which defines the semantics of critical interrupts. Added a test to TEST_LOCK_crit so that calling ppc_exc_wrapup() (and possibly the dispatcher) is always skipped if the BSP/user wants to leave critical interrupts always enabled (at the expense of having no OS support). changed TEST_LOCK_mchk so that asynchronous machine-check handlers never call ppc_exc_wrapup() (and the dispatcher). We don't want to disable MSR_ME ever (to avoid checkstops) and hence asynchronous MEs must not use OS services anyways. added and commented new variables 'ppc_exc_intr_stack_size' 'ppc_exc_crit_always_enabled'.
Diffstat (limited to '')
-rw-r--r--c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors_init.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors_init.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors_init.c
index 86e2ca7c1f..dd80dd094d 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors_init.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors_init.c
@@ -337,11 +337,29 @@ int n = sizeof(exception_table)/sizeof(exception_table[0]);
/* Use current MMU / RI settings when running C exception handlers */
ppc_exc_msr_bits = _read_MSR() & ( MSR_DR | MSR_IR | MSR_RI );
+ /* Cache size of the interrupt stack in a SDA variable */
+ ppc_exc_intr_stack_size = rtems_configuration_get_interrupt_stack_size();
+
/* Copy into a SDA variable that is easy to access from
* assembly code
*/
if ( ppc_cpu_is_bookE() ) {
ppc_exc_msr_irq_mask = MSR_EE | MSR_CE | MSR_DE ;
+ switch (ppc_exc_crit_always_enabled) {
+ case PPC_EXC_CRIT_NO_OS_SUPPORT:
+ _write_MSR(_read_MSR() | (MSR_CE | MSR_DE));
+ break;
+
+ case PPC_EXC_CRIT_OS_SUPPORT:
+ printk("ppc_exc: PPC_EXC_CRIT_OS_SUPPORT not yet implemented\n");
+ /* fall thru */
+
+ case PPC_EXC_CRIT_DISABLED:
+ default:
+ ppc_exc_crit_always_enabled = PPC_EXC_CRIT_DISABLED;
+ _write_MSR(_read_MSR() & ~(MSR_CE | MSR_DE));
+ break;
+ }
} else {
ppc_exc_msr_irq_mask = MSR_EE ;
}