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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-10-22 13:42:45 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-10-22 13:42:45 +0000 |
commit | 1ec501c567ddc0cd377d6a14766d2306e12ccefc (patch) | |
tree | d1aa683bd72fd9a10bd8757153c0093f14f130df /c/src/lib/libcpu/powerpc/mpc8260/cpm/dpram.c | |
parent | 2001-10-22 Joel Sherrill <joel@OARcorp.com> (diff) | |
download | rtems-1ec501c567ddc0cd377d6a14766d2306e12ccefc.tar.bz2 |
2001-10-22 Andy Dachs <a.dachs@sstl.co.uk>
* Added mpc8260 directory.
* Modified Makefile.am and configure.in to build the contents
* mpc8260/Makefile.am, mpc8260/README, mpc8260/clock/Makefile.am,
mpc8260/clock/clock.c, mpc8260/console-generic/Makefile.am,
mpc8260/console-generic/console-generic.c, mpc8260/cpm/.cvsignore,
mpc8260/cpm/Makefile.am, mpc8260/cpm/brg.c, mpc8260/cpm/cp.c,
mpc8260/cpm/dpram.c, mpc8260/exceptions/.cvsignore,
mpc8260/exceptions/Makefile.am, mpc8260/exceptions/asm_utils.S,
mpc8260/exceptions/raw_exception.c, mpc8260/exceptions/raw_exception.h,
mpc8260/include/Makefile.am, mpc8260/include/console.h,
mpc8260/include/cpm.h, mpc8260/include/mmu.h,
mpc8260/include/mpc8260.h, mpc8260/mmu/Makefile.am, mpc8260/mmu/mmu.c,
mpc8260/timer/Makefile.am, mpc8260/timer/timer.c: New files.
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libcpu/powerpc/mpc8260/cpm/dpram.c | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/powerpc/mpc8260/cpm/dpram.c b/c/src/lib/libcpu/powerpc/mpc8260/cpm/dpram.c new file mode 100644 index 0000000000..7fb8f512a6 --- /dev/null +++ b/c/src/lib/libcpu/powerpc/mpc8260/cpm/dpram.c @@ -0,0 +1,91 @@ +/* + * dpram.c + * + * MPC8260 dual-port RAM allocation routines + * + * Based on code in mpc8xx which is + * Based on code (alloc860.c in eth_comm port) by + * Jay Monkman (jmonkman@frasca.com), + * which, in turn, is based on code by + * W. Eric Norum (eric@skatter.usask.ca). + * + * + * Modifications : + * Copyright (c) 1999, National Research Council of Canada + * + * MPC8260 modifications Andy Dachs, <a.dachs@sstl.co.uk> + * Surrey Satellite Technology Limited, 2001 + */ + +#include <rtems.h> +#include <mpc8260.h> +#include <mpc8260/cpm.h> + +/* + * Allocation order: + * - Dual-Port RAM section 0 + * - Dual-Port RAM section 1 + * - Dual-Port RAM section 2 + * - Dual-Port RAM section 3 + */ +static struct { + unsigned8 *base; + unsigned int size; + unsigned int used; +} dpram_regions[] = { +/* { (char *)&m8260.dpram0[0], sizeof m8260.dpram0, 0 },*/ + { (char *)&m8260.dpram1[0], sizeof m8260.dpram1, 0 }, +/* { (char *)&m8260.dpram2[0], sizeof m8260.dpram2, 0 },*/ + { (char *)&m8260.dpram3[0], sizeof m8260.dpram3, 0 } +}; + +#define NUM_DPRAM_REGIONS (sizeof(dpram_regions) / sizeof(dpram_regions[0])) + +void * +m8xx_dpram_allocate( unsigned int byte_count ) +{ + unsigned int i; + ISR_Level level; + void *blockp = NULL; + + byte_count = (byte_count + 3) & ~0x3; + + /* + * Running with interrupts disabled is usually considered bad + * form, but this routine is probably being run as part of an + * initialization sequence so the effect shouldn't be too severe. + */ + _ISR_Disable (level); + + for ( i = 0; i < NUM_DPRAM_REGIONS; i++ ) { + /* + * Verify that the region is available for use. + * This test is necessary because if extra microcode modules + * are installed, some regions are locked and unavailable. + * See MPC860 User's Manual Pages 19-9 to 19-11. + */ + if (dpram_regions[i].used == 0) { + volatile unsigned char *cp = dpram_regions[i].base; + *cp = 0xAA; + if (*cp != 0xAA) + dpram_regions[i].used = dpram_regions[i].size; + else { + *cp = 0x55; + if (*cp != 0x55) + dpram_regions[i].used = dpram_regions[i].size; + } + *cp = 0x0; + } + if (dpram_regions[i].size - dpram_regions[i].used >= byte_count) { + blockp = dpram_regions[i].base + dpram_regions[i].used; + dpram_regions[i].used += byte_count; + break; + } + } + + _ISR_Enable(level); + + if (blockp == NULL) + rtems_panic("Can't allocate %d bytes of dual-port RAM.\n", byte_count); + return blockp; +} |