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authorJoel Sherrill <joel.sherrill@OARcorp.com>2002-03-08 16:32:39 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2002-03-08 16:32:39 +0000
commit34f5067fefba3d1eba4b1f493a04a52580cbf797 (patch)
tree4d55f1df8d64b7946e6e3a3a946dfa1d531d5e9f /c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S
parent2001-03-05 Greg Menke <gregory.menke@gsfc.nasa.gov> (diff)
downloadrtems-34f5067fefba3d1eba4b1f493a04a52580cbf797.tar.bz2
2002-03-05 Greg Menke <gregory.menke@gsfc.nasa.gov>
* shared/interrupts/installisrentries.c: Added support for debug exception vector. * shared/interrupts/isr_entries.S: Added support for debug exception vector.
Diffstat (limited to '')
-rw-r--r--c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S6
1 files changed, 6 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S b/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S
index e27b35e984..25ee7793d5 100644
--- a/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S
+++ b/c/src/lib/libcpu/mips/shared/interrupts/isr_entries.S
@@ -27,6 +27,12 @@ FRAME(exc_norm_code,sp,0,ra)
nop
ENDFRAME(exc_norm_code)
+FRAME(exc_dbg_code,sp,0,ra)
+ la k0, _DBG_Handler /* debug interrupt */
+ j k0
+ nop
+ENDFRAME(exc_dbg_code)
+
/* XXX this is dependent on IDT/SIM and needs to be addressed */
FRAME(exc_utlb_code,sp,0,ra)
la k0, (R_VEC+((48)*8))