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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-04-20 13:24:39 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-04-20 13:24:39 +0000 |
commit | b85df3491f8bda321bdfcb9942f6a0c030a0dedb (patch) | |
tree | b9ddcee99c65db1e12756bf809d18821f74d752f /c/src/lib/libcpu/mips/mongoosev/include/mongoose-v.h | |
parent | 2001-04-20 Joel Sherrill <joel@OARcorp.com> (diff) | |
download | rtems-b85df3491f8bda321bdfcb9942f6a0c030a0dedb.tar.bz2 |
2001-04-20 Joel Sherrill <joel@OARcorp.com>
* mongoosev/duart/mg5uart.c (mg5uart_enable_interrupts): Honor
the other bits set in the Peripheral Function Interrupt Mask
Register when modifying those enabled for the DUART.
* mongoosev/include/mongoose-v.h (MONGOOSEV_ATOMIC_MASK,
MONGOOSEV_PFICR, MONGOOSEV_PFIMR, mongoosev_set_in_pficr,
mongoosev_clear_in_pficr, mongoosev_set_in_pfimr,
mongoosev_clear_in_pfimr, MONGOOSEV_UART_ALL_IRQ_BITS): New macros.
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libcpu/mips/mongoosev/include/mongoose-v.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/mips/mongoosev/include/mongoose-v.h b/c/src/lib/libcpu/mips/mongoosev/include/mongoose-v.h index 3496aba8d9..9aec242556 100644 --- a/c/src/lib/libcpu/mips/mongoosev/include/mongoose-v.h +++ b/c/src/lib/libcpu/mips/mongoosev/include/mongoose-v.h @@ -30,6 +30,17 @@ #define MONGOOSEV_WRITE_REGISTER( _base, _register, _value ) \ *((volatile unsigned32 *)((_base) + (_register))) = (_value) +#define MONGOOSEV_ATOMIC_MASK( _addr, _mask, _new ) \ + do { \ + rtems_interrupt_level Irql; \ + rtems_unsigned32 tmp; \ + \ + rtems_interrupt_disable(Irql); \ + tmp = *((volatile unsigned32 *)(_addr)) & ~(_mask); \ + *((volatile unsigned32 *)(_addr)) = tmp | (_new); \ + rtems_interrupt_enable(Irql); \ + } while (0) + /* * BIU and DRAM Registers */ @@ -50,6 +61,19 @@ #define MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_CAUSE_REGISTER 0xFFFE0188 #define MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_MASK_REGISTER 0xFFFE018C +#define MONGOOSEV_PFICR MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_CAUSE_REGISTER +#define MONGOOSEV_PFIMR MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_MASK_REGISTER + +#define mongoosev_set_in_pficr( _mask, _bits ) \ + MONGOOSEV_ATOMIC_MASK( MONGOOSEV_PFICR, _mask, _bits ) +#define mongoosev_clear_in_pficr( _mask, _bits ) \ + MONGOOSEV_ATOMIC_MASK( MONGOOSEV_PFICR, _mask, ~(_bits) ) + +#define mongoosev_set_in_pfimr( _mask, _bits ) \ + MONGOOSEV_ATOMIC_MASK( MONGOOSEV_PFIMR, _mask, _bits ) +#define mongoosev_clear_in_pfimr( _mask, _bits ) \ + MONGOOSEV_ATOMIC_MASK( MONGOOSEV_PFIMR, _mask, ~(_bits) ) + /* UART Bits in Peripheral Command Register Bits (TX/RX tied together here) */ #define MONGOOSEV_UART_CMD_RESET_BOTH_PORTS 0x0001 #define MONGOOSEV_UART_CMD_LOOPBACK_CTSN 0x0002 @@ -107,6 +131,7 @@ #define MONGOOSEV_UART_ALL_RX_STATUS_BITS 0x0003 #define MONGOOSEV_UART_ALL_STATUS_BITS 0x001F +#define MONGOOSEV_UART_ALL_IRQ_BITS 0x001F /* * The Peripheral Interrupt Status, Cause, and Mask registers have the |