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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-04-16 20:02:27 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-04-16 20:02:27 +0000 |
| commit | d74a92d1fd4c69d98175d42f138fc3a22e622ba8 (patch) | |
| tree | b2ca3fd00453aecb0a18186a23f5007da01ad369 /c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.h | |
| parent | 2001-04-16 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-d74a92d1fd4c69d98175d42f138fc3a22e622ba8.tar.bz2 | |
2001-04-16 Joel Sherrill <joel@OARcorp.com>
* mongoosev/duart/mg5uart.c, mongoosev/duart/mg5uart.h
Modifications made with Gregory Menke <gregory.menke@gsfc.nasa.gov>
as he debugged this BSP using a logic analyzer. In particular,
there was a mistake where the index not offset of registers was
in the header file and the baud rate calculation was incorrect.
Diffstat (limited to '')
| -rw-r--r-- | c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.h b/c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.h index 7b1d647b50..11cc7ab686 100644 --- a/c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.h +++ b/c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.h @@ -34,15 +34,15 @@ extern "C" { */ /* shared registers from peripheral base (i.e. from ulCtrlPort1) */ -#define MG5UART_COMMAND_REGISTER 0 -#define MG5UART_STATUS_REGISTER 1 -#define MG5UART_INTERRUPT_CAUSE_REGISTER 2 -#define MG5UART_INTERRUPT_MASK_REGISTER 3 +#define MG5UART_COMMAND_REGISTER 0x00 +#define MG5UART_STATUS_REGISTER 0x04 +#define MG5UART_INTERRUPT_CAUSE_REGISTER 0x08 +#define MG5UART_INTERRUPT_MASK_REGISTER 0x0c /* port specific registers from uart base (i.e. from ulCtrlPort2) */ -#define MG5UART_RX_BUFFER 0 -#define MG5UART_TX_BUFFER 1 -#define MG5UART_BAUD_RATE 2 +#define MG5UART_RX_BUFFER 0x00 +#define MG5UART_TX_BUFFER 0x04 +#define MG5UART_BAUD_RATE 0x08 /* * Interrupt mask values |