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authorRalf Corsepius <ralf.corsepius@rtems.org>2011-02-11 09:36:44 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2011-02-11 09:36:44 +0000
commit8525cffc7df6f3177d95815897988174f83129fa (patch)
tree7fab477844779e60449c1a94d1ade5f09ac79de8 /c/src/lib/libcpu/m68k/mcf532x
parent2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org> (diff)
downloadrtems-8525cffc7df6f3177d95815897988174f83129fa.tar.bz2
2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
* mcf5225x/network/fec.c, mcf5235/cache/cachepd.c, mcf532x/cache/cachepd.c, shared/cache/cache.c, shared/misc/m68kidle.c: Use "__asm__" instead of "asm" for improved c99-compliance.
Diffstat (limited to 'c/src/lib/libcpu/m68k/mcf532x')
-rw-r--r--c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c b/c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c
index acf88ab4ee..2384d3c3ae 100644
--- a/c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c
+++ b/c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c
@@ -7,7 +7,7 @@
#include <rtems.h>
#include <mcf532x/mcf532x.h>
-#define m68k_set_cacr(_cacr) asm volatile ("movec %0,%%cacr" : : "d" (_cacr))
+#define m68k_set_cacr(_cacr) __asm__ volatile ("movec %0,%%cacr" : : "d" (_cacr))
/*
* Read/write copy of common cache
@@ -41,13 +41,13 @@ void _CPU_cache_flush_1_data_line(const void *d_addr)
{
register unsigned long adr = (((unsigned long) d_addr >> 4) & 0xff) << 4;
- asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+ __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
adr += 1;
- asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+ __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
adr += 1;
- asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+ __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
adr += 1;
- asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+ __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
}
void _CPU_cache_flush_entire_data(void)
@@ -56,13 +56,13 @@ void _CPU_cache_flush_entire_data(void)
for(set = 0; set < 256; ++set) {
adr = (set << 4);
- asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+ __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
adr += 1;
- asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+ __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
adr += 1;
- asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+ __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
adr += 1;
- asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+ __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
}
}
@@ -101,13 +101,13 @@ void _CPU_cache_invalidate_1_instruction_line(const void *addr)
{
register unsigned long adr = (((unsigned long) addr >> 4) & 0xff) << 4;
- asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+ __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
adr += 1;
- asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+ __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
adr += 1;
- asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+ __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
adr += 1;
- asm volatile ("cpushl %%bc,(%0)" :: "a" (adr));
+ __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (adr));
}
void _CPU_cache_enable_data(void)