diff options
| author | Joel Sherrill <joel.sherrill@oarcorp.com> | 2014-10-14 12:39:57 -0500 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@oarcorp.com> | 2014-10-16 08:58:47 -0500 |
| commit | c7e77ee488a547e5a89d9d9f54fa6e016f3a554b (patch) | |
| tree | 2f2ec18c5bee957f5ca3ed1b6ef9e8ed7b47e061 /c/src/lib/libcpu/m68k/mcf5282/include/mcf5282.h | |
| parent | bfin libcpu and libbsp: Fix warnings (diff) | |
| download | rtems-c7e77ee488a547e5a89d9d9f54fa6e016f3a554b.tar.bz2 | |
mcf5282: Move cache to libcpu and update av5282 and uC5282 BSPs
Diffstat (limited to '')
| -rw-r--r-- | c/src/lib/libcpu/m68k/mcf5282/include/mcf5282.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/m68k/mcf5282/include/mcf5282.h b/c/src/lib/libcpu/m68k/mcf5282/include/mcf5282.h index afe444cd86..3724f489de 100644 --- a/c/src/lib/libcpu/m68k/mcf5282/include/mcf5282.h +++ b/c/src/lib/libcpu/m68k/mcf5282/include/mcf5282.h @@ -73,6 +73,12 @@ typedef volatile uint32 vuint32 __attribute__((__may_alias__)); /* 32 bits */ #define MCF5XXX_SR_V (0x0002) #define MCF5XXX_SR_C (0x0001) +/* + * Used to set the initialize the cacr register to the BSP's desired + * starting value. + */ +void mcf5xxx_initialize_cacr(uint32_t); + #define MCF5XXX_CACR_CENB (0x80000000) #define MCF5XXX_CACR_CPDI (0x10000000) #define MCF5XXX_CACR_CPD (0x10000000) |