diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-07-11 19:31:04 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-07-11 19:31:04 +0000 |
commit | bc85fd5a6df8753543ba55c98a588e255471752b (patch) | |
tree | b51e3eb5c77cca042081bb7ba88e5515560451d2 /c/src/lib/libcpu/i960/include/i960JX_RP_common.h | |
parent | Patch rtems-rc-20000711-2-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de> (diff) | |
download | rtems-bc85fd5a6df8753543ba55c98a588e255471752b.tar.bz2 |
Reworked score/cpu/i960 so it can be safely compiled multilib. All
routines and structures that require CPU model specific information
are now in libcpu. This required significant rework of the
score/cpu header files and the creation of multiple header files
and subdirectories in libcpu/i960.
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libcpu/i960/include/i960JX_RP_common.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/i960/include/i960JX_RP_common.h b/c/src/lib/libcpu/i960/include/i960JX_RP_common.h new file mode 100644 index 0000000000..a5d5e4d087 --- /dev/null +++ b/c/src/lib/libcpu/i960/include/i960JX_RP_common.h @@ -0,0 +1,49 @@ +/* + * i960JX and RP Shared Definitions. + * + * $Id$ + */ + +#ifndef __I960JX_RP_COMMON_h +#define __I960JX_RP_COMMON_h + +/* Define JX Core memory mapped register addresses */ +/* Common to Jx and RP: */ +#define DLMCON_ADDR 0xff008100 +#define LMAR0_ADDR 0xff008108 +#define LMMR0_ADDR 0xff00810c +#define LMAR1_ADDR 0xff008110 +#define LMMR1_ADDR 0xff008114 +#define IPB0_ADDR 0xff008400 +#define IPB1_ADDR 0xff008404 +#define DAB0_ADDR 0xff008420 +#define DAB1_ADDR 0xff008424 +#define BPCON_ADDR 0xff008440 +#define IPND_ADDR 0xff008500 +#define IMSK_ADDR 0xff008504 +#define ICON_ADDR 0xff008510 +#define IMAP0_ADDR 0xff008520 +#define IMAP1_ADDR 0xff008524 +#define IMAP2_ADDR 0xff008528 +#define PMCON0_ADDR 0xff008600 +#define PMCON2_ADDR 0xff008608 +#define PMCON4_ADDR 0xff008610 +#define PMCON6_ADDR 0xff008618 +#define PMCON8_ADDR 0xff008620 +#define PMCON10_ADDR 0xff008628 +#define PMCON12_ADDR 0xff008630 +#define PMCON14_ADDR 0xff008638 +#define BCON_ADDR 0xff0086fc +#define PRCB_ADDR 0xff008700 +#define ISP_ADDR 0xff008704 +#define SSP_ADDR 0xff008708 +#define DEVID_ADDR 0xff008710 +#define TRR0_ADDR 0xff000300 +#define TCR0_ADDR 0xff000304 +#define TMR0_ADDR 0xff000308 +#define TRR1_ADDR 0xff000310 +#define TCR1_ADDR 0xff000314 +#define TMR1_ADDR 0xff000318 + +#endif +/* end of include file */ |