diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2010-04-15 14:09:57 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2010-04-15 14:09:57 +0000 |
commit | 9e95e540b901aac63436f87513151e5ba3ea2eab (patch) | |
tree | b53c484faeaf8422dffba13b109e33b0bd2657b4 /c/src/lib/libcpu/i386 | |
parent | i586-pc-freebsd8.0-gcc.spec (diff) | |
download | rtems-9e95e540b901aac63436f87513151e5ba3ea2eab.tar.bz2 |
2010-04-15 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpuModel.S, cpuModel.h, displayCpu.c: Update to include more reserved
bits and pick out a bit more information.
Diffstat (limited to 'c/src/lib/libcpu/i386')
-rw-r--r-- | c/src/lib/libcpu/i386/ChangeLog | 5 | ||||
-rw-r--r-- | c/src/lib/libcpu/i386/cpuModel.S | 17 | ||||
-rw-r--r-- | c/src/lib/libcpu/i386/cpuModel.h | 6 | ||||
-rw-r--r-- | c/src/lib/libcpu/i386/displayCpu.c | 272 |
4 files changed, 169 insertions, 131 deletions
diff --git a/c/src/lib/libcpu/i386/ChangeLog b/c/src/lib/libcpu/i386/ChangeLog index ec1f33f9a4..86637d2cea 100644 --- a/c/src/lib/libcpu/i386/ChangeLog +++ b/c/src/lib/libcpu/i386/ChangeLog @@ -1,3 +1,8 @@ +2010-04-15 Joel Sherrill <joel.sherrill@oarcorp.com> + + * cpuModel.S, cpuModel.h, displayCpu.c: Update to include more reserved + bits and pick out a bit more information. + 2009-12-11 Joel Sherrill <joel.sherrill@oarcorp.com> * page.c: Use bsp_mem_size. diff --git a/c/src/lib/libcpu/i386/cpuModel.S b/c/src/lib/libcpu/i386/cpuModel.S index 263f824004..8245fd86a2 100644 --- a/c/src/lib/libcpu/i386/cpuModel.S +++ b/c/src/lib/libcpu/i386/cpuModel.S @@ -87,6 +87,16 @@ isnew: popfl incl SYM(have_cpuid) /* we have CPUID instruction */ + /* + * Addressable Processor Ids + * + * CPUID.(EAX=4, ECX=0):EAX[31:26] + 1 = Y) + */ + movl $4, eax + movl $0, ecx + cpuid + movl eax,SYM(x86_capability_cores) + /* use it to get : * processor type, * processor model, @@ -95,6 +105,7 @@ isnew: */ movl $1, eax cpuid + movl ebx,SYM(x86_capability_ebx) /* store ebx feature info */ movl ecx,SYM(x86_capability_x) /* store ecx feature flags */ movb al, cl /* save reg for future use */ @@ -235,7 +246,9 @@ BEGIN_DATA PUBLIC(x86_model) PUBLIC(x86_mask) PUBLIC(x86_capability) + PUBLIC(x86_capability_ebx) PUBLIC(x86_capability_x) + PUBLIC(x86_capability_cores) PUBLIC(x86_vendor_id) PUBLIC(hard_math) @@ -249,8 +262,12 @@ SYM(x86_mask): .byte 0 SYM(x86_capability): .long 0 +SYM(x86_capability_ebx): + .long 0 SYM(x86_capability_x): .long 0 +SYM(x86_capability_cores): + .long 0 SYM(x86_vendor_id): .zero 13 SYM(hard_math): diff --git a/c/src/lib/libcpu/i386/cpuModel.h b/c/src/lib/libcpu/i386/cpuModel.h index f11062a341..980846b557 100644 --- a/c/src/lib/libcpu/i386/cpuModel.h +++ b/c/src/lib/libcpu/i386/cpuModel.h @@ -24,8 +24,10 @@ extern char hard_math; /* floating point coprocessor present indicator */ extern char x86; /* type of cpu (3 = 386, 4 =486, ...) */ extern char x86_model; extern char x86_mask; -extern int x86_capability; /* cpuid:EDX */ -extern int x86_capability_x; /* cpuid:ECX */ +extern int x86_capability; /* cpuid:EDX */ +extern int x86_capability_x; /* cpuid:ECX */ +extern int x86_capability_ebx; /* cpuid:EBX */ +extern int x86_capability_cores; /* cpuid.(EAX=4, ECX=0) - physical cores */ extern char x86_vendor_id[13]; extern int have_cpuid; extern unsigned char Cx86_step; /* cyrix processor identification */ diff --git a/c/src/lib/libcpu/i386/displayCpu.c b/c/src/lib/libcpu/i386/displayCpu.c index b0f88c9312..b2b2369b15 100644 --- a/c/src/lib/libcpu/i386/displayCpu.c +++ b/c/src/lib/libcpu/i386/displayCpu.c @@ -3,7 +3,12 @@ * This file contains code for displaying the Intel Cpu identification * that has been performed by checkCPUtypeSetCr0 function. * + * This file was updated by Joel Sherrill <joel.sherrill@oarcorp.com> + * to define more capability bits, pick up more CPU model information, + * and add more model strings. --joel (April 2010) + * * COPYRIGHT (c) 1998 valette@crf.canon.fr + * COPYRIGHT (c) 2010 OAR Corporation * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -23,153 +28,160 @@ #include <rtems.h> unsigned char Cx86_step = 0; + static const char *Cx86_type[] = { - "unknown", "1.3", "1.4", "1.5", "1.6", "2.4", "2.5", "2.6", "2.7 or 3.7", "4.2" - }; + "unknown", "1.3", "1.4", "1.5", "1.6", + "2.4", "2.5", "2.6", "2.7 or 3.7", "4.2" + }; -static const char * i486model(unsigned int nr) +static const char *i486model(unsigned int nr) { - static const char *model[] = { - "0","DX","SX","DX/2","4","SX/2","6","DX/2-WB","DX/4","DX/4-WB", - "10","11","12","13","Am5x86-WT","Am5x86-WB" - }; - if (nr < sizeof(model)/sizeof(char *)) - return model[nr]; - return NULL; + static const char *model[] = { + "0","DX","SX","DX/2","4","SX/2","6","DX/2-WB","DX/4","DX/4-WB", + "10","11","12","13","Am5x86-WT","Am5x86-WB" + }; + + if (nr < sizeof(model)/sizeof(char *)) + return model[nr]; + return NULL; } static const char * i586model(unsigned int nr) { - static const char *model[] = { - "0", "Pentium 60/66","Pentium 75+","OverDrive PODP5V83", - "Pentium MMX", NULL, NULL, "Mobile Pentium 75+", - "Mobile Pentium MMX" - }; - if (nr < sizeof(model)/sizeof(char *)) - return model[nr]; - return NULL; + static const char *model[] = { + "0", "Pentium 60/66","Pentium 75+","OverDrive PODP5V83", + "Pentium MMX", NULL, NULL, "Mobile Pentium 75+", + "Mobile Pentium MMX" + }; + if (nr < sizeof(model)/sizeof(char *)) + return model[nr]; + return NULL; } -static const char * Cx86model(void) +static const char *Cx86model(void) { - unsigned char nr6x86 = 0; - static const char *model[] = { - "unknown", "6x86", "6x86L", "6x86MX", "MII" - }; - switch (x86) { - case 5: - nr6x86 = ((x86_capability & (1 << 8)) ? 2 : 1); /* cx8 flag only on 6x86L */ - break; - case 6: - nr6x86 = 3; - break; - default: - nr6x86 = 0; - } - - /* We must get the stepping number by reading DIR1 */ - outport_byte(0x22,0xff); - inport_byte(0x23, x86_mask); - switch (x86_mask) { - case 0x03: - Cx86_step = 1; /* 6x86MX Rev 1.3 */ - break; - case 0x04: - Cx86_step = 2; /* 6x86MX Rev 1.4 */ - break; - case 0x05: - Cx86_step = 3; /* 6x86MX Rev 1.5 */ - break; - case 0x06: - Cx86_step = 4; /* 6x86MX Rev 1.6 */ - break; - case 0x14: - Cx86_step = 5; /* 6x86 Rev 2.4 */ - break; - case 0x15: - Cx86_step = 6; /* 6x86 Rev 2.5 */ - break; - case 0x16: - Cx86_step = 7; /* 6x86 Rev 2.6 */ - break; - case 0x17: - Cx86_step = 8; /* 6x86 Rev 2.7 or 3.7 */ - break; - case 0x22: - Cx86_step = 9; /* 6x86L Rev 4.2 */ - break; - default: - Cx86_step = 0; - } - return model[nr6x86]; + unsigned char nr6x86 = 0; + static const char *model[] = { + "unknown", "6x86", "6x86L", "6x86MX", "MII" + }; + + switch (x86) { + case 5: + /* cx8 flag only on 6x86L */ + nr6x86 = ((x86_capability & (1 << 8)) ? 2 : 1); + break; + case 6: + nr6x86 = 3; + break; + default: + nr6x86 = 0; + } + + /* We must get the stepping number by reading DIR1 */ + outport_byte(0x22,0xff); + inport_byte(0x23, x86_mask); + switch (x86_mask) { + case 0x03: + Cx86_step = 1; /* 6x86MX Rev 1.3 */ + break; + case 0x04: + Cx86_step = 2; /* 6x86MX Rev 1.4 */ + break; + case 0x05: + Cx86_step = 3; /* 6x86MX Rev 1.5 */ + break; + case 0x06: + Cx86_step = 4; /* 6x86MX Rev 1.6 */ + break; + case 0x14: + Cx86_step = 5; /* 6x86 Rev 2.4 */ + break; + case 0x15: + Cx86_step = 6; /* 6x86 Rev 2.5 */ + break; + case 0x16: + Cx86_step = 7; /* 6x86 Rev 2.6 */ + break; + case 0x17: + Cx86_step = 8; /* 6x86 Rev 2.7 or 3.7 */ + break; + case 0x22: + Cx86_step = 9; /* 6x86L Rev 4.2 */ + break; + default: + Cx86_step = 0; + } + return model[nr6x86]; } static const char * i686model(unsigned int nr) { - static const char *model[] = { - "PPro A-step", "Pentium Pro" - }; - if (nr < sizeof(model)/sizeof(char *)) - return model[nr]; - return NULL; + static const char *model[] = { + "PPro A-step", + "Pentium Pro" + }; + if (nr < sizeof(model)/sizeof(char *)) + return model[nr]; + return NULL; } struct cpu_model_info { - int x86; - char *model_names[16]; + int x86; + char *model_names[16]; }; static struct cpu_model_info amd_models[] = { - { 4, - { NULL, NULL, NULL, "DX/2", NULL, NULL, NULL, "DX/2-WB", "DX/4", - "DX/4-WB", NULL, NULL, NULL, NULL, "Am5x86-WT", "Am5x86-WB" }}, - { 5, - { "K5/SSA5 (PR-75, PR-90, PR-100)", "K5 (PR-120, PR-133)", - "K5 (PR-166)", "K5 (PR-200)", NULL, NULL, - "K6 (166 - 266)", "K6 (166 - 300)", "K6-2 (200 - 450)", - "K6-3D-Plus (200 - 450)", NULL, NULL, NULL, NULL, NULL, NULL }}, + { 4, + { NULL, NULL, NULL, "DX/2", NULL, NULL, NULL, "DX/2-WB", "DX/4", + "DX/4-WB", NULL, NULL, NULL, NULL, "Am5x86-WT", "Am5x86-WB" }}, + { 5, + { "K5/SSA5 (PR-75, PR-90, PR-100)", "K5 (PR-120, PR-133)", + "K5 (PR-166)", "K5 (PR-200)", NULL, NULL, + "K6 (166 - 266)", "K6 (166 - 300)", "K6-2 (200 - 450)", + "K6-3D-Plus (200 - 450)", NULL, NULL, NULL, NULL, NULL, NULL }}, }; static const char * AMDmodel(void) { - const char *p=NULL; - int i; - - if (x86_model < 16) - for (i=0; i<sizeof(amd_models)/sizeof(struct cpu_model_info); i++) - if (amd_models[i].x86 == x86) { - p = amd_models[i].model_names[(int)x86_model]; - break; - } - return p; + const char *p=NULL; + int i; + + if (x86_model < 16) + for (i=0; i<sizeof(amd_models)/sizeof(struct cpu_model_info); i++) + if (amd_models[i].x86 == x86) { + p = amd_models[i].model_names[(int)x86_model]; + break; + } + return p; } static const char * getmodel(int x86, int model) { - const char *p = NULL; - static char nbuf[12]; - if (strncmp(x86_vendor_id, "Cyrix", 5) == 0) - p = Cx86model(); - else if(strcmp(x86_vendor_id, "AuthenticAMD")==0) - p = AMDmodel(); - else { - switch (x86) { - case 4: - p = i486model(model); - break; - case 5: - p = i586model(model); - break; - case 6: - p = i686model(model); - break; - } - } - if (p) - return p; - - sprintf(nbuf, "%d", model); - return nbuf; + const char *p = NULL; + static char nbuf[12]; + + if (strncmp(x86_vendor_id, "Cyrix", 5) == 0) + p = Cx86model(); + else if(strcmp(x86_vendor_id, "AuthenticAMD")==0) + p = AMDmodel(); + else { + switch (x86) { + case 4: + p = i486model(model); + break; + case 5: + p = i586model(model); + break; + case 6: + p = i686model(model); + break; + } + } + if (p) + return p; + + sprintf(nbuf, "%d", model); + return nbuf; } void printCpuInfo(void) @@ -182,27 +194,27 @@ void printCpuInfo(void) "fxsr", "sse", "sse2", "ss", "htt", "tm", "30", "pbe" }; static const char *x86_cap_x_flags[] = { - "sse3", "1", "2", "monitor", "ds-cpl", "vmx", "6", "est", - "tm2", "9", "cnxt-id", "11", "12", "cmpxchg16b", "14", "15", - "16", "17", "18", "19", "20", "21", "22", "23" - "24", "25", "26", "27", "28", "29", "30", "31" + "sse3", "pclmulqdq", "dtes64", "monitor", "ds-cpl", "vmx", "smx", "est", + "tm2", "ssse3", "cnxt-id", "11", "12", "cmpxchg16b", "xtpr", "pdcm", + "16", "pcid", "dca", "sse4.1", "sse4.2", "x2APIC", "movbe", "popcnt" + "24", "aesni", "xsave", "xsave", "avx", "29", "30", "31" }; printk("cpu : %c86\n", x86+'0'); printk("model : %s\n", - have_cpuid ? getmodel(x86, x86_model) : "unknown"); + have_cpuid ? getmodel(x86, x86_model) : "unknown"); if (x86_vendor_id [0] == '\0') strcpy(x86_vendor_id, "unknown"); printk("vendor_id : %s\n", x86_vendor_id); - if (x86_mask) + if (x86_mask) { if (strncmp(x86_vendor_id, "Cyrix", 5) != 0) { printk("stepping : %d\n", x86_mask); } - else { /* we have a Cyrix */ + else { /* we have a Cyrix */ printk("stepping : %s\n", Cx86_type[Cx86_step]); } - else + } else printk("stepping : unknown\n"); printk("fpu : %s\n", (hard_math ? "yes" : "no")); @@ -211,7 +223,7 @@ void printCpuInfo(void) for ( i = j = 0 ; i < 32 ; i++ ) { if ( x86_capability & (1 << i) ) { if ( j && 0 == (j & 7) ) - printk("\n "); + printk("\n "); printk(" %s", x86_cap_flags[i]); j++; } @@ -221,10 +233,12 @@ void printCpuInfo(void) for ( i = j = 0 ; i < 32 ; i++ ) { if ( x86_capability_x & (1 << i) ) { if ( j && 0 == (j & 7) ) - printk("\n "); + printk("\n "); printk(" %s", x86_cap_x_flags[i]); j++; } } printk("\n"); + printk( "x86_capability_ebx=0x%08x\n", x86_capability_ebx); + printk( "x86_capability_cores=0x%08x\n", x86_capability_cores); } |