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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-02-18 15:16:37 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-02-18 15:16:37 +0000 |
| commit | e029467dac9a09bc07babe9b3f1330e32b91f1d0 (patch) | |
| tree | 897f13fd06dd29b2454a76ba03c7a1d308cba27e /c/src/lib/libcpu/i386/registers.h | |
| parent | GLobal reentrancy structure is now dynamically initialized. (diff) | |
| download | rtems-e029467dac9a09bc07babe9b3f1330e32b91f1d0.tar.bz2 | |
Patch from Emmanuel Raguet <raguet@crf.canon.fr>:
You will find enclosed a patch which contains, for Intel PC386 target :
- an Ethernet driver for DEC21140 device based boards.
- a simple cache management with paging mechanism.
Diffstat (limited to '')
| -rw-r--r-- | c/src/lib/libcpu/i386/registers.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/i386/registers.h b/c/src/lib/libcpu/i386/registers.h index 142516ca94..ab783fd329 100644 --- a/c/src/lib/libcpu/i386/registers.h +++ b/c/src/lib/libcpu/i386/registers.h @@ -58,6 +58,14 @@ #define CR0_PAGE_LEVEL_CACHE_DISABLE 0x40000000 #define CR0_PAGING 0x80000000 +/* + * definitions related to CR3 + */ + +#define CR3_PAGE_CACHE_DISABLE 0x10 +#define CR3_PAGE_WRITE_THROUGH 0x8 + + #ifndef ASM /* @@ -153,6 +161,23 @@ typedef union { unsigned int i; }cr0; +/* + * definition of cr3 registers has a bit field structure + */ +typedef struct { + + unsigned int : 3; + unsigned int page_write_transparent : 1; + unsigned int page_cache_disable : 1; + unsigned int : 7; + unsigned int page_directory_base :20; +}cr3_bits; + +typedef union { + cr3_bits cr3; + unsigned int i; +}cr3; + #endif #endif |