summaryrefslogtreecommitdiffstats
path: root/c/src/lib/libcpu/arm/shared/include/arm-cp15.h
diff options
context:
space:
mode:
authorSebastian Huber <sebastian.huber@embedded-brains.de>2014-06-05 08:31:45 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2014-06-05 14:55:16 +0200
commitdef03aecefbb6cbc6b0ccd1c4d66f8cd69446f21 (patch)
tree095e5995a887ab0d08ee646f055bae6396b19b5e /c/src/lib/libcpu/arm/shared/include/arm-cp15.h
parentbsps/arm: Cortex-A9 MPCore start (diff)
downloadrtems-def03aecefbb6cbc6b0ccd1c4d66f8cd69446f21.tar.bz2
bsps/arm: Typo
Diffstat (limited to 'c/src/lib/libcpu/arm/shared/include/arm-cp15.h')
-rw-r--r--c/src/lib/libcpu/arm/shared/include/arm-cp15.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/c/src/lib/libcpu/arm/shared/include/arm-cp15.h b/c/src/lib/libcpu/arm/shared/include/arm-cp15.h
index 2760f742bc..d0a9b09ea0 100644
--- a/c/src/lib/libcpu/arm/shared/include/arm-cp15.h
+++ b/c/src/lib/libcpu/arm/shared/include/arm-cp15.h
@@ -630,7 +630,7 @@ static inline uint32_t arm_cp15_get_data_cache_line_size(void)
}
/* Read size of smallest instruction cache lines */
-static inline uint32_t arm_cp15_get_instruction_cche_line_size(void)
+static inline uint32_t arm_cp15_get_instruction_cache_line_size(void)
{
uint32_t mcls = 0;
uint32_t ct = arm_cp15_get_cache_type();