diff options
author | Ralf Corsepius <ralf.corsepius@rtems.org> | 2009-11-30 05:09:41 +0000 |
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committer | Ralf Corsepius <ralf.corsepius@rtems.org> | 2009-11-30 05:09:41 +0000 |
commit | 359e5374164ccb2a66833354b412a859c144ea2f (patch) | |
tree | 6f065d7d6247bc255f43ddb0152fc26c50bd4f87 /c/src/lib/libcpu/arm/at91rm9200 | |
parent | Whitespace removal. (diff) | |
download | rtems-359e5374164ccb2a66833354b412a859c144ea2f.tar.bz2 |
Whitespace removal.
Diffstat (limited to 'c/src/lib/libcpu/arm/at91rm9200')
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/clock/clock.c | 12 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/dbgu/dbgu.c | 46 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200.h | 10 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_dbgu.h | 2 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h | 6 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_gpio.h | 86 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_mem.h | 2 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_pmc.h | 2 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/include/bits.h | 2 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_asm.S | 8 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_init.c | 6 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/irq/irq.c | 34 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/irq/irq.h | 10 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/pmc/pmc.c | 2 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/timer/timer.c | 6 | ||||
-rw-r--r-- | c/src/lib/libcpu/arm/at91rm9200/usart/usart.c | 12 |
16 files changed, 123 insertions, 123 deletions
diff --git a/c/src/lib/libcpu/arm/at91rm9200/clock/clock.c b/c/src/lib/libcpu/arm/at91rm9200/clock/clock.c index 04b3f4f96f..7a9cf6af07 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/clock/clock.c +++ b/c/src/lib/libcpu/arm/at91rm9200/clock/clock.c @@ -34,7 +34,7 @@ static unsigned long st_pimr_reload; static void clock_isr_on(const rtems_irq_connect_data *unused) { /* enable timer interrupt */ - ST_REG(ST_IER) = ST_SR_PITS; + ST_REG(ST_IER) = ST_SR_PITS; } /** @@ -58,13 +58,13 @@ static void clock_isr_off(const rtems_irq_connect_data *unused) static int clock_isr_is_on(const rtems_irq_connect_data *irq) { /* check timer interrupt */ - return ST_REG(ST_IMR) & ST_SR_PITS; + return ST_REG(ST_IMR) & ST_SR_PITS; } rtems_isr Clock_isr(rtems_vector_number vector); /* Replace the first value with the clock's interrupt name. */ -rtems_irq_connect_data clock_isr_data = {AT91RM9200_INT_SYSIRQ, +rtems_irq_connect_data clock_isr_data = {AT91RM9200_INT_SYSIRQ, (rtems_irq_hdl)Clock_isr, clock_isr_on, clock_isr_off, @@ -88,11 +88,11 @@ void Clock_driver_support_initialize_hardware(void) (((rtems_configuration_get_microseconds_per_tick() * slck) + (1000000/2))/ 1000000); st_pimr_reload = st_pimr_value; - /* read the status to clear the int */ + /* read the status to clear the int */ st_str = ST_REG(ST_SR); - + /* set priority */ - AIC_SMR_REG(AIC_SMR_SYSIRQ) = AIC_SMR_PRIOR(0x7); + AIC_SMR_REG(AIC_SMR_SYSIRQ) = AIC_SMR_PRIOR(0x7); /* set the timer value */ ST_REG(ST_PIMR) = st_pimr_reload; diff --git a/c/src/lib/libcpu/arm/at91rm9200/dbgu/dbgu.c b/c/src/lib/libcpu/arm/at91rm9200/dbgu/dbgu.c index 7faabab5a1..4dbd16e536 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/dbgu/dbgu.c +++ b/c/src/lib/libcpu/arm/at91rm9200/dbgu/dbgu.c @@ -1,7 +1,7 @@ /* * Console driver for AT91RM9200 DBGU port * - * This driver uses the shared console driver in + * This driver uses the shared console driver in * ...../libbsp/shared/console.c * * Copyright (c) 2003 by Cogent Computer Systems @@ -38,8 +38,8 @@ static void dbgu_write_polled(int minor, char c); static int dbgu_set_attributes(int minor, const struct termios *t); /* Pointers to functions for handling the UART. */ -console_fns dbgu_fns = -{ +console_fns dbgu_fns = +{ libchip_serial_default_probe, dbgu_first_open, dbgu_last_close, @@ -54,23 +54,23 @@ console_fns dbgu_fns = /* Functions called via callbacks (i.e. the ones in uart_fns */ /*********************************************************************/ -/* +/* * This is called the first time each device is opened. Since - * the driver is polled, we don't have to do anything. If the driver - * were interrupt driven, we'd enable interrupts here. + * the driver is polled, we don't have to do anything. If the driver + * were interrupt driven, we'd enable interrupts here. */ -static int dbgu_first_open(int major, int minor, void *arg) +static int dbgu_first_open(int major, int minor, void *arg) { return 0; } -/* +/* * This is called the last time each device is closed. Since - * the driver is polled, we don't have to do anything. If the driver - * were interrupt driven, we'd disable interrupts here. + * the driver is polled, we don't have to do anything. If the driver + * were interrupt driven, we'd disable interrupts here. */ -static int dbgu_last_close(int major, int minor, void *arg) +static int dbgu_last_close(int major, int minor, void *arg) { return 0; } @@ -82,7 +82,7 @@ static int dbgu_last_close(int major, int minor, void *arg) * return -1 if there's no data, otherwise return * the character in lowest 8 bits of returned int. */ -static int dbgu_read(int minor) +static int dbgu_read(int minor) { char c; console_tbl *console_entry; @@ -99,15 +99,15 @@ static int dbgu_read(int minor) if (!(dbgu->sr & DBGU_INT_RXRDY)) { return -1; } - - c = dbgu->rhr & 0xff; - + + c = dbgu->rhr & 0xff; + return c; } -/* - * Write buffer to UART +/* + * Write buffer to UART * * return 1 on success, -1 on error */ @@ -133,17 +133,17 @@ static int dbgu_write(int minor, const char *buf, int len) break; } } - + c = (char) buf[i]; dbgu->thr = c; - + /* the TXRDY flag does not seem to update right away (is this true?) */ /* so we wait a bit before continuing */ for (x = 0; x < 100; x++) { dbg_dly++; /* using a global so this doesn't get optimized out */ } } - + return 1; } @@ -186,7 +186,7 @@ static void dbgu_write_polled(int minor, char c) } /* This is for setting baud rate, bits, etc. */ -static int dbgu_set_attributes(int minor, const struct termios *t) +static int dbgu_set_attributes(int minor, const struct termios *t) { return 0; } @@ -197,7 +197,7 @@ static int dbgu_set_attributes(int minor, const struct termios *t) * functions use them instead. */ /***********************************************************************/ -/* +/* * Read from UART. This is used in the exit code, and can't * rely on interrupts. */ @@ -208,7 +208,7 @@ int dbgu_poll_read(int minor) /* - * Write a character to the console. This is used by printk() and + * Write a character to the console. This is used by printk() and * maybe other low level functions. It should not use interrupts or any * RTEMS system calls. It needs to be very simple */ diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200.h index 99346dbaa0..88825452d5 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200.h @@ -32,7 +32,7 @@ typedef volatile unsigned long vulong; #define AIC_SVR_REG(_x_) *(vulong *)(AIC_SVR_BASE + (_x_ & 0x7c)) /* Control Register - 32 of them */ -#define AIC_CTL_BASE 0xFFFFF100 +#define AIC_CTL_BASE 0xFFFFF100 #define AIC_CTL_REG(_x_) *(vulong *)(AIC_CTL_BASE + (_x_ & 0x7f)) /* Register Offsets */ @@ -103,9 +103,9 @@ typedef volatile unsigned long vulong; /* AIC_SMR */ #define AIC_SMR_PRIOR(_x_) ((_x_ & 0x07) << 0) #define AIC_SMR_SRC_LVL_LOW (0 << 5) /* Are these right? docs don't say which is high/low */ -#define AIC_SMR_SRC_EDGE_LOW (1 << 5) -#define AIC_SMR_SRC_LVL_HI (2 << 5) -#define AIC_SMR_SRC_EDGE_HI (3 << 5) +#define AIC_SMR_SRC_EDGE_LOW (1 << 5) +#define AIC_SMR_SRC_LVL_HI (2 << 5) +#define AIC_SMR_SRC_EDGE_HI (3 << 5) /**************************************************************************/ /* Debug Unit */ @@ -192,7 +192,7 @@ typedef volatile unsigned long vulong; * Note that each of the following peripherals has it's own * set of these registers starting at offset 0x100 from it's * base address: DBGU, SPI, USART and SSC - * To access the DMA for a peripheral, use the macro for that + * To access the DMA for a peripheral, use the macro for that * peripheral but with these register offsets **************************************************************************/ /* Register Offsets */ diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_dbgu.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_dbgu.h index e4952ae4ad..961da4b8e1 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_dbgu.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_dbgu.h @@ -3,7 +3,7 @@ * * Copyright (c) 2003 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h index ea1d701de4..d7161e676f 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h @@ -3,7 +3,7 @@ * * Copyright (c) 2003 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -104,7 +104,7 @@ #define EMAC_TSR_BNQ BIT4 /* 1 = Transmit buffer not queued */ #define EMAC_TSR_COMP BIT5 /* 1 = Transmit complete */ #define EMAC_TSR_UND BIT6 /* 1 = Transmit underrun */ - + /* Receive Status Register, EMAC_RSR, Offset 0x20 */ #define EMAC_RSR_BNA BIT0 /* 1 = Buffer not available */ #define EMAC_RSR_REC BIT1 /* 1 = Frame received */ @@ -137,7 +137,7 @@ #define EMAC_MAN_WRITE (0x1 << 28) /* Transfer is a write */ #define EMAC_MAN_READ (0x2 << 28) /* Transfer is a read */ #define EMAC_MAN_HIGH BIT30 /* Must be set */ -#define EMAC_MAN_LOW BIT31 +#define EMAC_MAN_LOW BIT31 /* * Bit assignments for Receive Buffer Descriptor diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_gpio.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_gpio.h index d0a89a8f87..1aa38c9838 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_gpio.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_gpio.h @@ -3,7 +3,7 @@ * * Copyright (c) 2002 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -59,16 +59,16 @@ * * PORT A */ -#define GPIO_0 BIT0 -#define GPIO_1 BIT1 -#define GPIO_2 BIT2 -#define GPIO_3 BIT3 -#define GPIO_4 BIT4 -#define GPIO_5 BIT5 -#define GPIO_6 BIT6 -#define GPIO_7 BIT7 -#define GPIO_8 BIT8 -#define GPIO_9 BIT9 +#define GPIO_0 BIT0 +#define GPIO_1 BIT1 +#define GPIO_2 BIT2 +#define GPIO_3 BIT3 +#define GPIO_4 BIT4 +#define GPIO_5 BIT5 +#define GPIO_6 BIT6 +#define GPIO_7 BIT7 +#define GPIO_8 BIT8 +#define GPIO_9 BIT9 #define GPIO_10 BIT10 #define GPIO_11 BIT11 #define GPIO_12 BIT12 @@ -92,16 +92,16 @@ #define GPIO_30 BIT30 #define GPIO_31 BIT31 /* PORT B */ -#define GPIO_32 BIT0 -#define GPIO_33 BIT1 -#define GPIO_34 BIT2 -#define GPIO_35 BIT3 -#define GPIO_36 BIT4 -#define GPIO_37 BIT5 -#define GPIO_38 BIT6 -#define GPIO_39 BIT7 -#define GPIO_40 BIT8 -#define GPIO_41 BIT9 +#define GPIO_32 BIT0 +#define GPIO_33 BIT1 +#define GPIO_34 BIT2 +#define GPIO_35 BIT3 +#define GPIO_36 BIT4 +#define GPIO_37 BIT5 +#define GPIO_38 BIT6 +#define GPIO_39 BIT7 +#define GPIO_40 BIT8 +#define GPIO_41 BIT9 #define GPIO_42 BIT10 #define GPIO_43 BIT11 #define GPIO_44 BIT12 @@ -125,16 +125,16 @@ #define GPIO_62 BIT30 #define GPIO_63 BIT31 /* PORT C */ -#define GPIO_64 BIT0 -#define GPIO_65 BIT1 -#define GPIO_66 BIT2 -#define GPIO_67 BIT3 -#define GPIO_68 BIT4 -#define GPIO_69 BIT5 -#define GPIO_70 BIT6 -#define GPIO_71 BIT7 -#define GPIO_72 BIT8 -#define GPIO_73 BIT9 +#define GPIO_64 BIT0 +#define GPIO_65 BIT1 +#define GPIO_66 BIT2 +#define GPIO_67 BIT3 +#define GPIO_68 BIT4 +#define GPIO_69 BIT5 +#define GPIO_70 BIT6 +#define GPIO_71 BIT7 +#define GPIO_72 BIT8 +#define GPIO_73 BIT9 #define GPIO_74 BIT10 #define GPIO_75 BIT11 #define GPIO_76 BIT12 @@ -158,16 +158,16 @@ #define GPIO_94 BIT30 #define GPIO_95 BIT31 /* PORT D */ -#define GPIO_96 BIT0 -#define GPIO_97 BIT1 -#define GPIO_98 BIT2 -#define GPIO_99 BIT3 -#define GPIO_100 BIT4 -#define GPIO_101 BIT5 -#define GPIO_102 BIT6 -#define GPIO_103 BIT7 -#define GPIO_104 BIT8 -#define GPIO_105 BIT9 +#define GPIO_96 BIT0 +#define GPIO_97 BIT1 +#define GPIO_98 BIT2 +#define GPIO_99 BIT3 +#define GPIO_100 BIT4 +#define GPIO_101 BIT5 +#define GPIO_102 BIT6 +#define GPIO_103 BIT7 +#define GPIO_104 BIT8 +#define GPIO_105 BIT9 #define GPIO_106 BIT10 #define GPIO_107 BIT11 #define GPIO_108 BIT12 @@ -376,9 +376,9 @@ #define PIOD_ASR_RTS2 BIT23 /* USART 2 RTS */ #define PIOD_ASR_RTS3 BIT24 /* USART 3 RTS */ #define PIOD_ASR_DTR1 BIT25 /* USART 1 DTR */ - + /* Port D, Alternate Function B */ - + #define PIOC_ASR_TSYNC BIT7 /* ETM Sync */ #define PIOC_ASR_TCLK BIT8 /* ETM Clock */ #define PIOC_ASR_TPS0 BIT9 /* ETM Processor Status 0 */ diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_mem.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_mem.h index ac11ceb697..6bc4be9103 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_mem.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_mem.h @@ -3,7 +3,7 @@ * * Copyright (c) 2002 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_pmc.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_pmc.h index 40fd6c58f1..634ab676d8 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_pmc.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_pmc.h @@ -3,7 +3,7 @@ * * Copyright (c) 2002 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/bits.h b/c/src/lib/libcpu/arm/at91rm9200/include/bits.h index 8bbfa19906..9178fc0f9b 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/bits.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/bits.h @@ -3,7 +3,7 @@ * * Copyright (c) 2002 by Cogent Computer Systems * Written by Mike Kelly <mike@cogcomp.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * diff --git a/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_asm.S b/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_asm.S index 75952e9631..d8b6757e4c 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_asm.S +++ b/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_asm.S @@ -2,7 +2,7 @@ * Atmel AT91RM9200 Interrupt handler * * Copyright (c) 2004 by Jay Monkman <jtm@lopgindog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -12,7 +12,7 @@ * $Id$ */ #define __asm__ - + .globl bsp_interrupt_dispatch bsp_interrupt_dispatch : /* @@ -21,7 +21,7 @@ bsp_interrupt_dispatch : * and load vector into r0 and handler address into r1. */ ldr r0, =0xFFFFF100 /* AIC_CTL_BASE + AIC_IVR */ - ldr r1, [r0] + ldr r1, [r0] str r1, [r0] /* write back in case we are using protect */ ldr r0, =0xFFFFF108 /* AIC_CTL_BASE + AIC_ISR */ @@ -35,7 +35,7 @@ bsp_interrupt_dispatch : IRQ_return: ldr r2, =0xFFFFF130 /* AIC_CTL_BASE + AIC_EIOCR */ str r1, [r2] - + ldmia sp!,{lr} mov pc, lr diff --git a/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_init.c b/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_init.c index ab3d96b625..99cf822570 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_init.c +++ b/c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_init.c @@ -2,7 +2,7 @@ * Atmel AT91RM9200 Interrupt handler * * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -17,8 +17,8 @@ extern void default_int_handler(void); -/* - * Interrupt system initialization. Disable interrupts, clear +/* + * Interrupt system initialization. Disable interrupts, clear * any that are pending. */ void BSP_rtems_irq_mngt_init(void) diff --git a/c/src/lib/libcpu/arm/at91rm9200/irq/irq.c b/c/src/lib/libcpu/arm/at91rm9200/irq/irq.c index d8255cd233..416c63125b 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/irq/irq.c +++ b/c/src/lib/libcpu/arm/at91rm9200/irq/irq.c @@ -2,7 +2,7 @@ * Atmel AT91RM9200 Interrupt handler * * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -34,52 +34,52 @@ static int isValidInterrupt(int irq) int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } - + /* - * Check if default handler is actually connected. If not, issue - * an error. Note: irq->name is a number corresponding to the - * sources PID (see the at91rm9200_pid for this mapping). We - * convert it to a long word offset to get source's vector register + * Check if default handler is actually connected. If not, issue + * an error. Note: irq->name is a number corresponding to the + * sources PID (see the at91rm9200_pid for this mapping). We + * convert it to a long word offset to get source's vector register */ if (AIC_SVR_REG(irq->name * 4) != (uint32_t) default_int_handler) { return 0; } - + rtems_interrupt_disable(level); - + /* * store the new handler */ AIC_SVR_REG(irq->name * 4) = (uint32_t) irq->hdl; - + /* * unmask interrupt */ AIC_CTL_REG(AIC_IECR) = 1 << irq->name; - + /* * Enable interrupt on device */ if(irq->on) { irq->on(irq); } - + rtems_interrupt_enable(level); - + return 1; } -/* +/* * Remove and interrupt handler */ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -96,7 +96,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) * mask interrupt */ AIC_CTL_REG(AIC_IDCR) = 1 << irq->name; - + /* * Disable interrupt on device */ @@ -108,7 +108,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) * restore the default irq value */ AIC_SVR_REG(irq->name * 4) = (uint32_t) default_int_handler; - + rtems_interrupt_enable(level); return 1; diff --git a/c/src/lib/libcpu/arm/at91rm9200/irq/irq.h b/c/src/lib/libcpu/arm/at91rm9200/irq/irq.h index 617a24bf7d..320c4415e5 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/irq/irq.h +++ b/c/src/lib/libcpu/arm/at91rm9200/irq/irq.h @@ -2,7 +2,7 @@ * Interrupt handler Header file * * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -24,7 +24,7 @@ extern "C" { /* * Include some preprocessor value also used by assember code */ - + #include <rtems.h> #include <at91rm9200.h> @@ -35,7 +35,7 @@ extern void default_int_handler(); /* possible interrupt sources on the AT91RM9200 */ #define AT91RM9200_INT_FIQ 0 #define AT91RM9200_INT_SYSIRQ 1 -#define AT91RM9200_INT_PIOA 2 +#define AT91RM9200_INT_PIOA 2 #define AT91RM9200_INT_PIOB 3 #define AT91RM9200_INT_PIOC 4 #define AT91RM9200_INT_PIOD 5 @@ -71,7 +71,7 @@ extern void default_int_handler(); /* we can treat the AT91RM9200 AIC_SVR_BASE as */ /* a vector table */ #define VECTOR_TABLE AIC_SVR_BASE - + typedef unsigned char rtems_irq_level; typedef unsigned char rtems_irq_trigger; @@ -117,7 +117,7 @@ void BSP_rtems_irq_mngt_init(); int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); /* - * function to get the current RTEMS irq handler for ptr->name. + * function to get the current RTEMS irq handler for ptr->name. */ int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* ptr); diff --git a/c/src/lib/libcpu/arm/at91rm9200/pmc/pmc.c b/c/src/lib/libcpu/arm/at91rm9200/pmc/pmc.c index 89616565ea..b5d65149fb 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/pmc/pmc.c +++ b/c/src/lib/libcpu/arm/at91rm9200/pmc/pmc.c @@ -2,7 +2,7 @@ * Atmel AT91RM9200 PMC functions * * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * diff --git a/c/src/lib/libcpu/arm/at91rm9200/timer/timer.c b/c/src/lib/libcpu/arm/at91rm9200/timer/timer.c index 7e407d82cf..5e7c267e58 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/timer/timer.c +++ b/c/src/lib/libcpu/arm/at91rm9200/timer/timer.c @@ -4,7 +4,7 @@ * This uses timer 0 for timing measurments. * * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> - * + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * @@ -16,7 +16,7 @@ * benchmark_timer_initialize() and benchmark_timer_read(). benchmark_timer_read() usually returns * the number of microseconds since benchmark_timer_initialize() exitted. * - * It is important that the timer start/stop overhead be determined + * It is important that the timer start/stop overhead be determined * when porting or modifying this code. * * $Id$ @@ -31,7 +31,7 @@ uint16_t tstart; bool benchmark_timer_find_average_overhead; uint32_t tick_time; /* - * Set up TC0 - + * Set up TC0 - * timer_clock2 (MCK/8) * capture mode - this shouldn't matter */ diff --git a/c/src/lib/libcpu/arm/at91rm9200/usart/usart.c b/c/src/lib/libcpu/arm/at91rm9200/usart/usart.c index c26cccc1f9..7633f05291 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/usart/usart.c +++ b/c/src/lib/libcpu/arm/at91rm9200/usart/usart.c @@ -1,10 +1,10 @@ /* * Driver for AT91RM9200 USART ports * - * COPYRIGHT (c) 2006-2009. + * COPYRIGHT (c) 2006-2009. * NCB - Sistemas Embarcados Ltda. (Brazil) * Fernando Nicodemos <fgnicodemos@terra.com.br> - * + * * and * * COPYRIGHT (c) 1989-2009. @@ -60,7 +60,7 @@ at91rm9200_usart_regs_t *usart_get_base(int minor) if (console_entry == NULL) return 0; - + port = (at91rm9200_usart_regs_t *) console_entry->ulCtrlPort1; //printk( "minor=%d entry=%p port=%p\n", minor, console_entry, port ); @@ -241,11 +241,11 @@ static int usart_set_attributes(int minor, const struct termios *t) mode |= US_MR_PAR_NONE; baud_requested = t->c_cflag & CBAUD; - + /* If not, set the dbgu console baud as USART baud default */ if (!baud_requested) - baud_requested = BSP_get_baud(); - + baud_requested = BSP_get_baud(); + baud = rtems_termios_baud_to_number(baud_requested); brgr = (at91rm9200_get_mck() / 16) / baud; |