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authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-07-26 19:28:11 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-07-26 19:28:11 +0000
commitca7858bb8856f1afcc537f39763b7c951e5068d3 (patch)
tree3f01b3bb41ce9b2d7bc16c300391382918758caf /c/src/lib/libc
parentPort of RTEMS to the Texas Instruments C3x/C4x DSP families including (diff)
downloadrtems-ca7858bb8856f1afcc537f39763b7c951e5068d3.tar.bz2
Port of RTEMS to the Texas Instruments C3x/C4x DSP families including
a BSP (c4xsim) supporting the simulator included with gdb. This port was done by Joel Sherrill and Jennifer Averett of OAR Corporation. Also included with this port is a space/time optimization to eliminate FP context switch management on CPUs without hardware or software FP. An issue with this port was that sizeof(unsigned32) = sizeof(unsigned8) on this CPU. This required addressing alignment checks and assumptions as well as fixing code that assumed sizeof(unsigned32) == 4.
Diffstat (limited to 'c/src/lib/libc')
-rw-r--r--c/src/lib/libc/malloc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/c/src/lib/libc/malloc.c b/c/src/lib/libc/malloc.c
index 0396b051be..d3121f90b4 100644
--- a/c/src/lib/libc/malloc.c
+++ b/c/src/lib/libc/malloc.c
@@ -82,9 +82,9 @@ void RTEMS_Malloc_Initialize(
/* DOES NOT RETURN!!! */
}
- if (u32_address & (CPU_ALIGNMENT-1)) {
+ if (u32_address & (CPU_HEAP_ALIGNMENT-1)) {
old_address = u32_address;
- u32_address = (u32_address + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
+ u32_address = (u32_address + CPU_HEAP_ALIGNMENT) & ~(CPU_HEAP_ALIGNMENT-1);
/*
* adjust the length by whatever we aligned by