2007-09-12 Joel Sherrill <joel.sherrill@OARcorp.com>

	PR 1257/bsps
	* csb336/network/lan91c11x.c, csb337/startup/bspstart.c,
	edb7312/irq/irq.c, gba/irq/irq.c, gba/irq/irq_init.c,
	gp32/startup/bspstart.c, rtl22xx/startup/bspstart.c,
	shared/abort/abort.c, shared/abort/simple_abort.c,
	shared/irq/irq_init.c: Code outside of cpukit should use the public
	API for rtems_interrupt_disable/rtems_interrupt_enable. By bypassing
	the public API and directly accessing _CPU_ISR_Disable and
	_CPU_ISR_Enable, they were bypassing the compiler memory barrier
	directive which could lead to problems. This patch also changes the
	type of the variable passed into these routines and addresses minor
	style issues.

11 files changed, 40 insertions, 39 deletions

diff --git a/c/src/lib/libbsp/arm/ChangeLog b/c/src/lib/libbsp/arm/ChangeLog
index 8a628d1370..71c469ed35 100644
--- a/c/src/lib/libbsp/arm/ChangeLog
+++ b/c/src/lib/libbsp/arm/ChangeLog
@@ -1,3 +1,18 @@
+2007-09-12	Joel Sherrill <joel.sherrill@OARcorp.com>
+
+	PR 1257/bsps
+	* csb336/network/lan91c11x.c, csb337/startup/bspstart.c,
+	edb7312/irq/irq.c, gba/irq/irq.c, gba/irq/irq_init.c,
+	gp32/startup/bspstart.c, rtl22xx/startup/bspstart.c,
+	shared/abort/abort.c, shared/abort/simple_abort.c,
+	shared/irq/irq_init.c: Code outside of cpukit should use the public
+	API for rtems_interrupt_disable/rtems_interrupt_enable. By bypassing
+	the public API and directly accessing _CPU_ISR_Disable and
+	_CPU_ISR_Enable, they were bypassing the compiler memory barrier
+	directive which could lead to problems. This patch also changes the
+	type of the variable passed into these routines and addresses minor
+	style issues.
+
 2007-09-08	Joel Sherrill <joel.sherrill@OARcorp.com>
 
 	* shared/abort/abort.c, shared/abort/simple_abort.c: Remove incorrect
diff --git a/c/src/lib/libbsp/arm/csb336/network/lan91c11x.c b/c/src/lib/libbsp/arm/csb336/network/lan91c11x.c
index c68b596afd..63fda8d1ae 100644
--- a/c/src/lib/libbsp/arm/csb336/network/lan91c11x.c
+++ b/c/src/lib/libbsp/arm/csb336/network/lan91c11x.c
@@ -14,18 +14,6 @@
 #include <rtems.h>
 #include "lan91c11x.h"
 
-static rtems_interrupt_level level;
-
-void lan91c11x_lock(void)
-{
-    _CPU_ISR_Disable(level);
-}
-
-void lan91c11x_unlock(void)
-{
-    _CPU_ISR_Enable(level);
-}
-
 uint16_t lan91c11x_read_reg(int reg)
 {
     volatile uint16_t *ptr = (uint16_t *)LAN91C11X_BASE_ADDR;
@@ -33,7 +21,7 @@ uint16_t lan91c11x_read_reg(int reg)
     uint16_t val;
     rtems_interrupt_level level;
 
-    _CPU_ISR_Disable(level);
+    rtems_interrupt_disable(level);
 
     /* save the bank register */
     old_bank = ptr[7] & 0x7;
@@ -46,7 +34,7 @@ uint16_t lan91c11x_read_reg(int reg)
     /* restore the bank register */
     ptr[7] = old_bank;
 
-    _CPU_ISR_Enable(level);
+    rtems_interrupt_enable(level);
     return val;
 }
 
@@ -56,7 +44,7 @@ void lan91c11x_write_reg(int reg, uint16_t value)
     uint16_t old_bank;
     rtems_interrupt_level level;
 
-    _CPU_ISR_Disable(level);
+    rtems_interrupt_disable(level);
 
     /* save the bank register */
     old_bank = ptr[7] & 0x7;
@@ -69,7 +57,7 @@ void lan91c11x_write_reg(int reg, uint16_t value)
     /* restore the bank register */
     ptr[7] = old_bank;
 
-    _CPU_ISR_Enable(level);
+    rtems_interrupt_enable(level);
 }
 
 uint16_t lan91c11x_read_reg_fast(int reg)
diff --git a/c/src/lib/libbsp/arm/csb337/startup/bspstart.c b/c/src/lib/libbsp/arm/csb337/startup/bspstart.c
index d51dbc1da5..c782eb352d 100644
--- a/c/src/lib/libbsp/arm/csb337/startup/bspstart.c
+++ b/c/src/lib/libbsp/arm/csb337/startup/bspstart.c
@@ -192,7 +192,7 @@ void bsp_reset(void)
 {
     rtems_interrupt_level level;
 
-    _CPU_ISR_Disable(level);
+    rtems_interrupt_disable(level);
 
     /* Enable the watchdog timer, then wait for the world to end. */
     ST_REG(ST_WDMR) = ST_WDMR_RSTEN | 1;
diff --git a/c/src/lib/libbsp/arm/edb7312/irq/irq.c b/c/src/lib/libbsp/arm/edb7312/irq/irq.c
index 31f24fc82a..6232a1913c 100644
--- a/c/src/lib/libbsp/arm/edb7312/irq/irq.c
+++ b/c/src/lib/libbsp/arm/edb7312/irq/irq.c
@@ -51,7 +51,7 @@ int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
       return 0;
     }
 
-    _CPU_ISR_Disable(level);
+    rtems_interrupt_disable(level);
 
     /*
      * store the new handler
@@ -90,7 +90,7 @@ int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
     	irq->on(irq);
     }
 
-    _CPU_ISR_Enable(level);
+    rtems_interrupt_enable(level);
 
     return 1;
 }
@@ -110,7 +110,7 @@ int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
     if (*(HdlTable + irq->name) != irq->hdl) {
       return 0;
     }
-    _CPU_ISR_Disable(level);
+    rtems_interrupt_disable(level);
 
     /*
      * mask interrupt
@@ -147,7 +147,7 @@ int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
      */
     *(HdlTable + irq->name) = default_int_handler;
 
-    _CPU_ISR_Enable(level);
+    rtems_interrupt_enable(level);
 
     return 1;
 }
diff --git a/c/src/lib/libbsp/arm/gba/irq/irq.c b/c/src/lib/libbsp/arm/gba/irq/irq.c
index ab93d1b121..16bc667135 100644
--- a/c/src/lib/libbsp/arm/gba/irq/irq.c
+++ b/c/src/lib/libbsp/arm/gba/irq/irq.c
@@ -67,7 +67,7 @@ int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
        return 0;
     }
 
-    _CPU_ISR_Disable(level);
+    rtems_interrupt_disable(level);
 
     /*
      * store the new handler
@@ -89,7 +89,7 @@ int BSP_install_rtems_irq_handler  (const rtems_irq_connect_data* irq)
      */
     irq->on(irq);
 
-    _CPU_ISR_Enable(level);
+    rtems_interrupt_enable(level);
 
     return 1;
 }
@@ -115,7 +115,7 @@ int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
     if (*(HdlTable + irq->name) != irq->hdl) {
        return 0;
     }
-    _CPU_ISR_Disable(level);
+    rtems_interrupt_disable(level);
 
     /*
      * mask at INT controller level
@@ -132,7 +132,7 @@ int BSP_remove_rtems_irq_handler  (const rtems_irq_connect_data* irq)
      */
     *(HdlTable + irq->name) = default_int_handler;
 
-    _CPU_ISR_Enable(level);
+    rtems_interrupt_enable(level);
 
     return 1;
 }
diff --git a/c/src/lib/libbsp/arm/gba/irq/irq_init.c b/c/src/lib/libbsp/arm/gba/irq/irq_init.c
index c2b5c1da03..136188804a 100644
--- a/c/src/lib/libbsp/arm/gba/irq/irq_init.c
+++ b/c/src/lib/libbsp/arm/gba/irq/irq_init.c
@@ -54,7 +54,7 @@ void  rtems_irq_mngt_init(void)
 
     vectorTable = (uint32_t *)VECTOR_TABLE;
 
-    _CPU_ISR_Disable(level);
+    rtems_interrupt_disable(level);
 
     /* @todo Can't use exception vectors in GBA because they are already in GBA ROM BIOS */
     /* First, connect the ISR_Handler for IRQ and FIQ interrupts */
diff --git a/c/src/lib/libbsp/arm/gp32/startup/bspstart.c b/c/src/lib/libbsp/arm/gp32/startup/bspstart.c
index 750ea345ef..56f96ad4bd 100644
--- a/c/src/lib/libbsp/arm/gp32/startup/bspstart.c
+++ b/c/src/lib/libbsp/arm/gp32/startup/bspstart.c
@@ -196,7 +196,7 @@ void bsp_start (void) __attribute__ ((weak, alias("bsp_start_default")));
 void bsp_reset(void)
 {
     rtems_interrupt_level level;
-    _CPU_ISR_Disable(level);
+    rtems_interrupt_disable(level);
     printk("bsp_reset.....\n");
         /* disable mmu, invalide i-cache and call swi #4 */
         asm volatile(""
diff --git a/c/src/lib/libbsp/arm/rtl22xx/startup/bspstart.c b/c/src/lib/libbsp/arm/rtl22xx/startup/bspstart.c
index f99b6b07d0..cafe0ae42e 100644
--- a/c/src/lib/libbsp/arm/rtl22xx/startup/bspstart.c
+++ b/c/src/lib/libbsp/arm/rtl22xx/startup/bspstart.c
@@ -257,7 +257,7 @@ void bsp_reset(void)
 {
     rtems_interrupt_level level;
 
-    _CPU_ISR_Disable(level);
+    rtems_interrupt_disable(level);
 
     while(1);
 }
diff --git a/c/src/lib/libbsp/arm/shared/abort/abort.c b/c/src/lib/libbsp/arm/shared/abort/abort.c
index a7dca28094..3d78a5cd94 100644
--- a/c/src/lib/libbsp/arm/shared/abort/abort.c
+++ b/c/src/lib/libbsp/arm/shared/abort/abort.c
@@ -104,11 +104,9 @@ void do_data_abort(uint32_t   insn, uint32_t   spsr,
                     Context_Control *ctx)
 {
     /* Clarify, which type is correct, CPU_Exception_frame or Context_Control */
-
-    uint8_t    decode;
-    uint8_t    insn_type;
-
-    uint32_t    tmp;
+    uint8_t               decode;
+    uint8_t               insn_type;
+    rtems_interrupt_level level;
 
     g_data_abort_insn_list[g_data_abort_cnt & 0x3ff] = ctx->register_lr - 8;
     g_data_abort_cnt++;
@@ -152,7 +150,7 @@ void do_data_abort(uint32_t   insn, uint32_t   spsr,
     _print_full_context(spsr);
 
     /* disable interrupts, wait forever */
-    _CPU_ISR_Disable(tmp);
+    rtems_interrupt_disable(level);
     while(1) {
         continue;
     }
diff --git a/c/src/lib/libbsp/arm/shared/abort/simple_abort.c b/c/src/lib/libbsp/arm/shared/abort/simple_abort.c
index 99aefa8ee9..8fb6a3eec2 100644
--- a/c/src/lib/libbsp/arm/shared/abort/simple_abort.c
+++ b/c/src/lib/libbsp/arm/shared/abort/simple_abort.c
@@ -109,9 +109,9 @@ void do_data_abort(
 {
   /* Clarify, which type is correct, CPU_Exception_frame or Context_Control */
 
-  uint8_t    decode;
-  uint8_t    insn_type;
-  uint32_t    tmp;
+  uint8_t               decode;
+  uint8_t               insn_type;
+  rtems_interrupt_level level;
 
   decode = ((insn >> 20) & 0xff);
 
@@ -152,7 +152,7 @@ void do_data_abort(
   _print_full_context(spsr);
 
   /* disable interrupts, wait forever */
-  _CPU_ISR_Disable(tmp);
+  rtems_interrupt_disable(level);
   while(1) {
     continue;
   }
diff --git a/c/src/lib/libbsp/arm/shared/irq/irq_init.c b/c/src/lib/libbsp/arm/shared/irq/irq_init.c
index 1f84574474..f194ae9b4a 100644
--- a/c/src/lib/libbsp/arm/shared/irq/irq_init.c
+++ b/c/src/lib/libbsp/arm/shared/irq/irq_init.c
@@ -31,7 +31,7 @@ void  rtems_irq_mngt_init()
 {
     rtems_interrupt_level       level;
 
-    _CPU_ISR_Disable(level);
+    rtems_interrupt_disable(level);
 
     /* First, connect the ISR_Handler for IRQ and FIQ interrupts */
     _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ISR_Handler, NULL);