diff options
| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-10-26 19:30:11 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-10-26 19:30:11 +0000 |
| commit | e56c35463b227b85d6a741e30a826d7ba2a71db7 (patch) | |
| tree | 568f587e83eed0359e1f111dc91f826c6b10eb48 /c/src/lib/libbsp | |
| parent | 2001-10-26 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-e56c35463b227b85d6a741e30a826d7ba2a71db7.tar.bz2 | |
2001-10-26 Victor V. Vengerov <vvv@oktet.ru>
* New BSP for MCF5206eLITE evaluation board BSP.
* ChangeLog, README, bsp_specs, configure.ac, console/console.c,
console/.cvsignore, i2c/i2c.c, i2c/i2cdrv.c, i2c/.cvsignore,
include/bsp.h, include/bspopts.h.in, include/coverhd.h,
include/ds1307.h, include/i2c.h, include/i2cdrv.h, include/nvram.h,
include/.cvsignore, nvram/nvram.c, nvram/.cvsignore, start/start.S,
start/.cvsignore, startup/bspclean.c, startup/bspstart.c,
startup/gdbinit, startup/init5206e.c, startup/linkcmds,
startup/linkcmds.flash, startup/.cvsignore, times, tod/ds1307.c,
tod/todcfg.c, tod/.cvsignore, tools/.cvsignore, tools/configure.ac,
tools/runtest, tools/changes, wrapup/.cvsignore, .cvsignore:
New files.
Diffstat (limited to 'c/src/lib/libbsp')
38 files changed, 4377 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/.cvsignore b/c/src/lib/libbsp/m68k/mcf5206elite/.cvsignore new file mode 100644 index 0000000000..d89921897a --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/.cvsignore @@ -0,0 +1 @@ +autom4te.cache diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/ChangeLog b/c/src/lib/libbsp/m68k/mcf5206elite/ChangeLog new file mode 100644 index 0000000000..9d87a2b0b1 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/ChangeLog @@ -0,0 +1,15 @@ +2001-10-26 Victor V. Vengerov <vvv@oktet.ru> + + * New BSP for MCF5206eLITE evaluation board BSP. + * ChangeLog, README, bsp_specs, configure.ac, console/console.c, + console/.cvsignore, i2c/i2c.c, i2c/i2cdrv.c, i2c/.cvsignore, + include/bsp.h, include/bspopts.h.in, include/coverhd.h, + include/ds1307.h, include/i2c.h, include/i2cdrv.h, include/nvram.h, + include/.cvsignore, nvram/nvram.c, nvram/.cvsignore, start/start.S, + start/.cvsignore, startup/bspclean.c, startup/bspstart.c, + startup/gdbinit, startup/init5206e.c, startup/linkcmds, + startup/linkcmds.flash, startup/.cvsignore, times, tod/ds1307.c, + tod/todcfg.c, tod/.cvsignore, tools/.cvsignore, tools/configure.ac, + tools/runtest, tools/changes, wrapup/.cvsignore, .cvsignore: + New files. + diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/README b/c/src/lib/libbsp/m68k/mcf5206elite/README new file mode 100644 index 0000000000..8279c927ab --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/README @@ -0,0 +1,105 @@ +# +# README for MCF5206eLITE Board Support Package +# +# Copyright (C) 2000,2001 OKTET Ltd., St.-Petersburg, Russia +# Author: Victor V. Vengerov <vvv@oktet.ru> +# +# The license and distribution terms for this file may be +# found in the file LICENSE in this distribution or at +# +# http://www.OARcorp.com/rtems/license.html. +# +# @(#) $Id$ +# + +# +# This board support package works with MCF5206eLITE evaluation board with +# Motorola Coldfire MCF5206e CPU. +# +# Many thanks to Balanced Audio Technology (http://www.balanced.com), +# company which donates MCF5206eLITE evaluation board, P&E Coldfire BDM +# interface and provides support for development of this BSP and generic +# MCF5206 CPU code. +# +# Decisions made at compile time include: +# +# Decisions to be made a link-edit time are: +# - The size of memory allocator heap. By default, all available +# memory allocated for the heap. To specify amount of memory +# available for heap: +# LDFLAGS += -Wl,--defsym -Wl,HeapSize=xxx +# +# - The frequency of system clock oscillator. By default, this frequency +# is 54MHz. To select other clock frequency for your application, put +# line like this in application Makefile: +# LDFLAGS += -qclock=40000000 +# +# - Select between RAM or ROM images. By default, RAM image generated +# which may be loaded starting from address 0x30000000 to the RAM. +# To prepare image intended to be stored in ROM, put the following +# line to the application Makefile: +# LDFLAGS += -qflash +# +# You may select other memory configuration providing your own +# linker script. +# + +BSP NAME: mcf5206elite +BOARD: MCF5206eLITE Evaluation Board +BUS: none +CPU FAMILY: Motorola ColdFire +COPROCESSORS: none +MODE: not applicable +DEBUG MONITOR: none (Hardware provides BDM) + +PERIPHERALS +=========== +TIMERS: PIT, Watchdog(disabled) + RESOLUTION: one microsecond +SERIAL PORTS: 2 UART +REAL-TIME CLOCK: DS1307 +NVRAM: DS1307 +DMA: 2 general purpose +VIDEO: none +SCSI: none +NETWORKING: none +I2C BUS: MCF5206e MBUS module + +DRIVER INFORMATION +================== +CLOCK DRIVER: Programmable Interval Timer +IOSUPP DRIVER: UART 1 +SHMSUPP: none +TIMER DRIVER: yes +I2C DRIVER: yes + +STDIO +===== +PORT: UART 1 +ELECTRICAL: EIA-232 +BAUD: 19200 +BITS PER CHARACTER: 8 +PARITY: None +STOP BITS: 1 + +NOTES +===== + +Board description +----------------- +clock rate: 54 MHz default (other oscillator can be installed) +bus width: 16-bit PROM, 32-bit external SRAM +ROM: Flash memory device AM29LV800BB, 1 MByte, 3 wait states, + chip select 0 +RAM: Static RAM 2xMCM69F737TQ, 1 MByte, 1 wait state, chip select 2 + +Host System +----------- +RedHat 6.2 (Linux 2.2.14), RedHat 7.0 (Linux 2.2.17) + +Verification +------------ +Single processor tests: passed +Multi-processort tests: not applicable +Timing tests: passed + diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/bsp_specs b/c/src/lib/libbsp/m68k/mcf5206elite/bsp_specs new file mode 100644 index 0000000000..8c2759c378 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/bsp_specs @@ -0,0 +1,28 @@ +%rename cpp old_cpp +%rename lib old_lib +%rename endfile old_endfile +%rename startfile old_startfile +%rename link old_link + +*cpp: +%(old_cpp) %{qrtems: -D__embedded__} -Asystem(embedded) + +*lib: +%{!qrtems: %(old_lib)} %{qrtems: --start-group \ +%{!qrtems_debug: -lrtemsall} %{qrtems_debug: -lrtemsall_g} \ +-lc -lgcc --end-group \ +%{!qnolinkcmds: \ +%{!qflash: -T linkcmds%s} %{qflash: -T linkcmds.flash%s}}} + +*startfile: +%{!qrtems: %(old_startfile)} %{qrtems: \ +%{!qrtems_debug: start.o%s} \ +%{qrtems_debug: start_g.o%s} \ +crti.o%s crtbegin.o%s } + +*link: +%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N -e start} \ +%{qclock=*: -defsym _SYS_CLOCK_FREQUENCY=%*} + +*endfile: +%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s} diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/configure.ac b/c/src/lib/libbsp/m68k/mcf5206elite/configure.ac new file mode 100644 index 0000000000..1899ceb575 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/configure.ac @@ -0,0 +1,40 @@ +## Process this file with autoconf to produce a configure script. +## +## $Id$ + +AC_PREREQ(2.52) +AC_INIT +AC_CONFIG_SRCDIR([bsp_specs]) +RTEMS_TOP(../../../../../..) +AC_CONFIG_AUX_DIR(../../../../../..) + +RTEMS_CANONICAL_TARGET_CPU +AM_INIT_AUTOMAKE(rtems-c-src-lib-libbsp-m68k-mcf5206elite,$RTEMS_VERSION,no) +AM_MAINTAINER_MODE + +RTEMS_PROG_CC_FOR_TARGET +RTEMS_CANONICALIZE_TOOLS + +RTEMS_ENV_RTEMSBSP +RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP) +RTEMS_CHECK_BSP_CACHE(RTEMS_BSP) +RTEMS_CHECK_NETWORKING +RTEMS_CANONICAL_HOST + +AM_CONFIG_HEADER(include/bspopts.h) + +AC_CONFIG_SUBDIRS(tools) + +RTEMS_PROJECT_ROOT + +# Explicitly list all Makefiles here +AC_CONFIG_FILES([Makefile +include/Makefile +start/Makefile +startup/Makefile +console/Makefile +i2c/Makefile +tod/Makefile +nvram/Makefile +wrapup/Makefile]) +AC_OUTPUT diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/console/.cvsignore b/c/src/lib/libbsp/m68k/mcf5206elite/console/.cvsignore new file mode 100644 index 0000000000..282522db03 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/console/.cvsignore @@ -0,0 +1,2 @@ +Makefile +Makefile.in diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/console/console.c b/c/src/lib/libbsp/m68k/mcf5206elite/console/console.c new file mode 100644 index 0000000000..be401be0e1 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/console/console.c @@ -0,0 +1,460 @@ +/* + * Console driver for Motorola MCF5206E UART modules + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include <termios.h> +#include <bsp.h> +#include <rtems/libio.h> +#include "mcf5206/mcf5206e.h" +#include "mcf5206/mcfuart.h" + + +/* Descriptor structures for two on-chip UART channels */ +static mcfuart uart[2]; + +/* Console operations mode: + * 0 - raw (non-termios) polled input/output + * 1 - termios-based polled input/output + * 2 - termios-based interrupt-driven input/output + */ +int console_mode = 2; +#define CONSOLE_MODE_RAW (0) +#define CONSOLE_MODE_POLL (1) +#define CONSOLE_MODE_INT (2) + +/* Wrapper functions for MCF UART generic driver */ + +/* console_poll_read -- + * wrapper for poll read function + * + * PARAMETERS: + * minor - minor device number + * + * RETURNS: + * character code readed from UART, or -1 if there is no characters + * available + */ +static int +console_poll_read(int minor) +{ + return mcfuart_poll_read(&uart[minor]); +} + +/* console_interrupt_write -- + * wrapper for interrupt write function + * + * PARAMETERS: + * minor - minor device number + * buf - output buffer + * len - output buffer length + * + * RETURNS: + * result code + */ +static int +console_interrupt_write(int minor, const char *buf, int len) +{ + return mcfuart_interrupt_write(&uart[minor], buf, len); +} + +/* console_poll_write -- + * wrapper for polling mode write function + * + * PARAMETERS: + * minor - minor device number + * buf - output buffer + * len - output buffer length + * + * RETURNS: + * result code + */ +static int +console_poll_write(int minor, const char *buf, int len) +{ + return mcfuart_poll_write(&uart[minor], buf, len); +} + +/* console_set_attributes -- + * wrapper for hardware-dependent termios attributes setting + * + * PARAMETERS: + * minor - minor device number + * t - pointer to the termios structure + * + * RETURNS: + * result code + */ +static int +console_set_attributes(int minor, const struct termios *t) +{ + return mcfuart_set_attributes(&uart[minor], t); +} + +/* console_stop_remote_tx -- + * wrapper for stopping data flow from remote party. + * + * PARAMETERS: + * minor - minor device number + * + * RETURNS: + * result code + */ +static int +console_stop_remote_tx(int minor) +{ + if (minor < sizeof(uart)/sizeof(uart[0])) + return mcfuart_stop_remote_tx(&uart[minor]); + else + return RTEMS_INVALID_NUMBER; +} + +/* console_start_remote_tx -- + * wrapper for resuming data flow from remote party. + * + * PARAMETERS: + * minor - minor device number + * + */ +static int +console_start_remote_tx(int minor) +{ + if (minor < sizeof(uart)/sizeof(uart[0])) + return mcfuart_start_remote_tx(&uart[minor]); + else + return RTEMS_INVALID_NUMBER; +} + +/* console_first_open -- + * wrapper for UART controller initialization functions + * + * PARAMETERS: + * major - major device number + * minor - minor device number + * arg - libio device open argument + * + * RETURNS: + * error code + */ +static int +console_first_open(int major, int minor, void *arg) +{ + rtems_libio_open_close_args_t *args = arg; + rtems_status_code sc; + rtems_unsigned8 intvec; + + switch (minor) + { + case 0: intvec = BSP_INTVEC_UART1; break; + case 1: intvec = BSP_INTVEC_UART2; break; + default: + return RTEMS_INVALID_NUMBER; + } + + if (console_mode != CONSOLE_MODE_INT) + { + intvec = 0; + } + + sc = mcfuart_init(&uart[minor], /* uart */ + args->iop->data1, /* tty */ + intvec, /* interrupt vector number */ + minor+1); + + if (sc == RTEMS_SUCCESSFUL) + sc = mcfuart_reset(&uart[minor]); + + return sc; +} + +/* console_last_close -- + * wrapper for UART controller close function + * + * PARAMETERS: + * major - major device number + * minor - minor device number + * arg - libio device close argument + * + * RETURNS: + * error code + */ +static int +console_last_close(int major, int minor, void *arg) +{ + return mcfuart_disable(&uart[minor]); +} + +/* console_reserve_resources -- + * reserve termios resources for 2 UART channels + * + * PARAMETERS: + * configuration -- pointer to the RTEMS configuration table + * + * RETURNS: + * none + */ +void +console_reserve_resources(rtems_configuration_table *configuration) +{ + if (console_mode != CONSOLE_MODE_RAW) + rtems_termios_reserve_resources (configuration, 2); +} + +/* console_initialize -- + * This routine initializes the console IO drivers and register devices + * in RTEMS I/O system. + * + * PARAMETERS: + * major - major console device number + * minor - minor console device number (not used) + * arg - device initialize argument + * + * RETURNS: + * RTEMS error code (RTEMS_SUCCESSFUL if device initialized successfuly) + */ +rtems_device_driver +console_initialize(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg) +{ + rtems_status_code status; + + /* + * Set up TERMIOS + */ + if (console_mode != CONSOLE_MODE_RAW) + rtems_termios_initialize (); + + /* + * Register the devices + */ + status = rtems_io_register_name ("/dev/console", major, 0); + if (status != RTEMS_SUCCESSFUL) + rtems_fatal_error_occurred (status); + status = rtems_io_register_name ("/dev/aux", major, 1); + if (status != RTEMS_SUCCESSFUL) + rtems_fatal_error_occurred (status); + + if (console_mode == CONSOLE_MODE_RAW) + { + rtems_status_code sc; + sc = mcfuart_init(&uart[0], /* uart */ + NULL, /* tty */ + 0, /* interrupt vector number */ + 1); /* UART channel number */ + + if (sc == RTEMS_SUCCESSFUL) + sc = mcfuart_reset(&uart[0]); + + sc = mcfuart_init(&uart[1], /* uart */ + NULL, /* tty */ + 0, /* interrupt vector number */ + 2); /* UART channel number */ + + if (sc == RTEMS_SUCCESSFUL) + sc = mcfuart_reset(&uart[1]); + return sc; + } + + return RTEMS_SUCCESSFUL; +} + +/* console_open -- + * Open console device driver. Pass appropriate termios callback + * functions to termios library. + * + * PARAMETERS: + * major - major device number for console devices + * minor - minor device number for console + * arg - device opening argument + * + * RETURNS: + * RTEMS error code + */ +rtems_device_driver +console_open(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg) +{ + static const rtems_termios_callbacks intr_callbacks = { + console_first_open, /* firstOpen */ + console_last_close, /* lastClose */ + NULL, /* pollRead */ + console_interrupt_write, /* write */ + console_set_attributes, /* setAttributes */ + console_stop_remote_tx, /* stopRemoteTx */ + console_start_remote_tx, /* startRemoteTx */ + 1 /* outputUsesInterrupts */ + }; + static const rtems_termios_callbacks poll_callbacks = { + console_first_open, /* firstOpen */ + console_last_close, /* lastClose */ + console_poll_read, /* pollRead */ + console_poll_write, /* write */ + console_set_attributes, /* setAttributes */ + console_stop_remote_tx, /* stopRemoteTx */ + console_start_remote_tx, /* startRemoteTx */ + 0 /* outputUsesInterrupts */ + }; + + switch (console_mode) + { + case CONSOLE_MODE_RAW: + return RTEMS_SUCCESSFUL; + + case CONSOLE_MODE_INT: + return rtems_termios_open(major, minor, arg, &intr_callbacks); + + case CONSOLE_MODE_POLL: + return rtems_termios_open(major, minor, arg, &poll_callbacks); + + default: + rtems_fatal_error_occurred(0xC07A1310); + } + return RTEMS_INTERNAL_ERROR; +} + +/* console_close -- + * Close console device. + * + * PARAMETERS: + * major - major device number for console devices + * minor - minor device number for console + * arg - device close argument + * + * RETURNS: + * RTEMS error code + */ +rtems_device_driver +console_close(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg) +{ + if (console_mode != CONSOLE_MODE_RAW) + return rtems_termios_close (arg); + else + return RTEMS_SUCCESSFUL; +} + +/* console_read -- + * Read from the console device + * + * PARAMETERS: + * major - major device number for console devices + * minor - minor device number for console + * arg - device read argument + * + * RETURNS: + * RTEMS error code + */ +rtems_device_driver +console_read(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg) +{ + if (console_mode != CONSOLE_MODE_RAW) + { + return rtems_termios_read (arg); + } + else + { + rtems_libio_rw_args_t *argp = arg; + char *buf = argp->buffer; + int count = argp->count; + int n = 0; + int c; + while (n < count) + { + do { + c = mcfuart_poll_read(&uart[minor]); + } while (c == -1); + if (c == '\r') + c = '\n'; + *(buf++) = c; + n++; + if (c == '\n') + break; + } + argp->bytes_moved = n; + return RTEMS_SUCCESSFUL; + } +} + +/* console_write -- + * Write to the console device + * + * PARAMETERS: + * major - major device number for console devices + * minor - minor device number for console + * arg - device write argument + * + * RETURNS: + * RTEMS error code + */ +rtems_device_driver +console_write(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg +) +{ + if (console_mode != CONSOLE_MODE_RAW) + { + return rtems_termios_write (arg); + } + else + { + rtems_libio_rw_args_t *argp = arg; + char cr = '\r'; + char *buf = argp->buffer; + int count = argp->count; + int i; + for (i = 0; i < count; i++) + { + if (*buf == '\n') + mcfuart_poll_write(&uart[minor], &cr, 1); + mcfuart_poll_write(&uart[minor], buf, 1); + buf++; + } + argp->bytes_moved = count; + return RTEMS_SUCCESSFUL; + } +} + +/* console_control -- + * Handle console device I/O control (IOCTL) + * + * PARAMETERS: + * major - major device number for console devices + * minor - minor device number for console + * arg - device ioctl argument + * + * RETURNS: + * RTEMS error code + */ +rtems_device_driver +console_control(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg) +{ + if (console_mode != CONSOLE_MODE_RAW) + { + return rtems_termios_ioctl (arg); + } + else + { + return RTEMS_SUCCESSFUL; + } +} diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/i2c/.cvsignore b/c/src/lib/libbsp/m68k/mcf5206elite/i2c/.cvsignore new file mode 100644 index 0000000000..282522db03 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/i2c/.cvsignore @@ -0,0 +1,2 @@ +Makefile +Makefile.in diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/i2c/i2c.c b/c/src/lib/libbsp/m68k/mcf5206elite/i2c/i2c.c new file mode 100644 index 0000000000..0dc2b673f6 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/i2c/i2c.c @@ -0,0 +1,316 @@ +/* I2C bus common (driver-independent) primitives implementation. + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * @(#) $Id$ + */ + +#include <bsp.h> +#include <i2c.h> + +/* i2c_transfer_sema_done_func -- + * This function called from I2C driver layer to signal that I2C + * transfer is finished. This function resumes of task execution which + * has invoked blocking I2C primitive. + * + * PARAMETERS: + * arg - done function argument; it is RTEMS semaphore ID. + */ +static void +i2c_transfer_sema_done_func(rtems_unsigned32 arg) +{ + rtems_id sema = (rtems_id)arg; + rtems_semaphore_release(sema); +} + +/* i2c_transfer_poll_done_func -- + * This function called from I2C driver layer to signal that I2C + * transfer is finished. This function set the flag polled by waiting + * function. + * + * PARAMETERS: + * arg - done function argument; address of poll_done_flag + */ +static void +i2c_transfer_poll_done_func(rtems_unsigned32 arg) +{ + rtems_boolean *poll_done_flag = (rtems_boolean *)arg; + *poll_done_flag = 1; +} + +/* i2c_transfer_wait_sema -- + * Initiate I2C bus transfer and block on temporary created semaphore + * until this transfer will be finished. + * + * PARAMETERS: + * bus - I2C bus number + * msg - pointer to transfer messages array + * nmsg - number of messages in transfer + * + * RETURNS: + * RTEMS_SUCCESSFUL, if tranfer finished successfully, + * or RTEMS status code if semaphore operations has failed. + */ +static i2c_message_status +i2c_transfer_wait_sema(i2c_bus_number bus, i2c_message *msg, int nmsg) +{ + rtems_status_code sc; + rtems_id sema; + sc = rtems_semaphore_create( + rtems_build_name('I', '2', 'C', 'S'), + 0, + RTEMS_COUNTING_SEMAPHORE | RTEMS_NO_INHERIT_PRIORITY | + RTEMS_NO_PRIORITY_CEILING | RTEMS_LOCAL, + 0, + &sema + ); + if (sc != RTEMS_SUCCESSFUL) + return I2C_RESOURCE_NOT_AVAILABLE; + sc = i2c_transfer(bus, nmsg, msg, i2c_transfer_sema_done_func, sema); + if (sc != RTEMS_SUCCESSFUL) + { + rtems_semaphore_delete(sema); + return sc; + } + rtems_semaphore_obtain(sema, RTEMS_WAIT, RTEMS_NO_TIMEOUT); + sc = rtems_semaphore_delete(sema); + return sc; +} + +/* i2c_transfer_wait_poll -- + * Initiate I2C bus transfer and wait by poll transaction done flag until + * this transfer will be finished. + * + * PARAMETERS: + * bus - I2C bus number + * msg - pointer to transfer messages array + * nmsg - number of messages in transfer + * + * RETURNS: + * RTEMS_SUCCESSFUL + */ +static rtems_status_code +i2c_transfer_wait_poll(i2c_bus_number bus, i2c_message *msg, int nmsg) +{ + volatile rtems_boolean poll_done_flag; + rtems_status_code sc; + poll_done_flag = 0; + sc = i2c_transfer(bus, nmsg, msg, i2c_transfer_poll_done_func, + (rtems_unsigned32)&poll_done_flag); + if (sc != RTEMS_SUCCESSFUL) + return sc; + while (poll_done_flag == 0) + { + i2c_poll(bus); + } + return RTEMS_SUCCESSFUL; +} + +/* i2c_transfer_wait -- + * Initiate I2C bus transfer and block until this transfer will be + * finished. This function wait the semaphore if system in + * SYSTEM_STATE_UP state, or poll done flag in other states. + * + * PARAMETERS: + * bus - I2C bus number + * msg - pointer to transfer messages array + * nmsg - number of messages in transfer + * + * RETURNS: + * I2C_SUCCESSFUL, if tranfer finished successfully, + * I2C_RESOURCE_NOT_AVAILABLE, if semaphore operations has failed, + * value of status field of first error-finished message in transfer, + * if something wrong. + */ +i2c_message_status +i2c_transfer_wait(i2c_bus_number bus, i2c_message *msg, int nmsg) +{ + rtems_status_code sc; + int i; + if (_System_state_Is_up(_System_state_Get())) + { + sc = i2c_transfer_wait_sema(bus, msg, nmsg); + } + else + { + sc = i2c_transfer_wait_poll(bus, msg, nmsg); + } + + if (sc != RTEMS_SUCCESSFUL) + return I2C_RESOURCE_NOT_AVAILABLE; + + for (i = 0; i < nmsg; i++) + { + if (msg[i].status != I2C_SUCCESSFUL) + { + return msg[i].status; + } + } + return I2C_SUCCESSFUL; +} + + +/* i2c_write -- + * Send single message over specified I2C bus to addressed device and + * wait while transfer is finished. + * + * PARAMETERS: + * bus - I2C bus number + * addr - address of I2C device + * buf - data to be sent to device + * size - data buffer size + * + * RETURNS: + * transfer status + */ +i2c_message_status +i2c_write(i2c_bus_number bus, i2c_address addr, void *buf, int size) +{ + i2c_message msg; + msg.addr = addr; + msg.flags = I2C_MSG_WR; + if (addr > 0xff) + msg.flags |= I2C_MSG_ADDR_10; + msg.status = 0; + msg.len = size; + msg.buf = buf; + return i2c_transfer_wait(bus, &msg, 1); +} + +/* i2c_wrbyte -- + * Send single one-byte long message over specified I2C bus to + * addressed device and wait while transfer is finished. + * + * PARAMETERS: + * bus - I2C bus number + * addr - address of I2C device + * cmd - byte message to be sent to device + * + * RETURNS: + * transfer status + */ +i2c_message_status +i2c_wrbyte(i2c_bus_number bus, i2c_address addr, rtems_unsigned8 cmd) +{ + i2c_message msg; + rtems_unsigned8 data = cmd; + msg.addr = addr; + msg.flags = I2C_MSG_WR; + if (addr > 0xff) + msg.flags |= I2C_MSG_ADDR_10; + msg.status = 0; + msg.len = sizeof(data); + msg.buf = &data; + return i2c_transfer_wait(bus, &msg, 1); +} + +/* i2c_read -- + * receive single message over specified I2C bus from addressed device. + * This call will wait while transfer is finished. + * + * PARAMETERS: + * bus - I2C bus number + * addr - address of I2C device + * buf - buffer for received message + * size - receive buffer size + * + * RETURNS: + * transfer status + */ +i2c_message_status +i2c_read(i2c_bus_number bus, i2c_address addr, void *buf, int size) +{ + i2c_message msg; + msg.addr = addr; + msg.flags = 0; + if (addr > 0xff) + msg.flags |= I2C_MSG_ADDR_10; + msg.status = 0; + msg.len = size; + msg.buf = buf; + return i2c_transfer_wait(bus, &msg, 1); +} + +/* i2c_wrrd -- + * Send message over I2C bus to specified device and receive message + * from the same device during single transfer. + * + * PARAMETERS: + * bus - I2C bus number + * addr - address of I2C device + * bufw - data to be sent to device + * sizew - send data buffer size + * bufr - buffer for received message + * sizer - receive buffer size + * + * RETURNS: + * transfer status + */ +i2c_message_status +i2c_wrrd(i2c_bus_number bus, i2c_address addr, void *bufw, int sizew, + void *bufr, int sizer) +{ + i2c_message msg[2]; + msg[0].addr = addr; + msg[0].flags = I2C_MSG_WR | I2C_MSG_ERRSKIP; + if (addr > 0xff) + msg[0].flags |= I2C_MSG_ADDR_10; + msg[0].status = 0; + msg[0].len = sizew; + msg[0].buf = bufw; + + msg[1].addr = addr; + msg[1].flags = 0; + if (addr > 0xff) + msg[1].flags |= I2C_MSG_ADDR_10; + msg[1].status = 0; + msg[1].len = sizer; + msg[1].buf = bufr; + + return i2c_transfer_wait(bus, msg, 2); +} + +/* i2c_wbrd -- + * Send one-byte message over I2C bus to specified device and receive + * message from the same device during single transfer. + * + * PARAMETERS: + * bus - I2C bus number + * addr - address of I2C device + * cmd - one-byte message to be sent over I2C bus + * bufr - buffer for received message + * sizer - receive buffer size + * + * RETURNS: + * transfer status + */ +i2c_message_status +i2c_wbrd(i2c_bus_number bus, i2c_address addr, rtems_unsigned8 cmd, + void *bufr, int sizer) +{ + i2c_message msg[2]; + rtems_unsigned8 bufw = cmd; + msg[0].addr = addr; + msg[0].flags = I2C_MSG_WR | I2C_MSG_ERRSKIP; + if (addr > 0xff) + msg[0].flags |= I2C_MSG_ADDR_10; + msg[0].status = 0; + msg[0].len = sizeof(bufw); + msg[0].buf = &bufw; + + msg[1].addr = addr; + msg[1].flags = I2C_MSG_ERRSKIP; + if (addr > 0xff) + msg[1].flags |= I2C_MSG_ADDR_10; + msg[1].status = 0; + msg[1].len = sizer; + msg[1].buf = bufr; + + return i2c_transfer_wait(bus, msg, 2); +} diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/i2c/i2cdrv.c b/c/src/lib/libbsp/m68k/mcf5206elite/i2c/i2cdrv.c new file mode 100644 index 0000000000..511a58912e --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/i2c/i2cdrv.c @@ -0,0 +1,266 @@ +/* I2C driver for MCF5206eLITE board. I2C bus accessed through on-chip + * MCF5206e MBUS controller. + * + * The purpose of this module is to perform I2C driver initialization + * and serialize I2C transfers. + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * @(#) $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include <stdlib.h> + +#include "i2c.h" +#include "i2cdrv.h" +#include "mcf5206/mcfmbus.h" + +#ifndef I2C_NUMBER_OF_BUSES +#define I2C_NUMBER_OF_BUSES (1) +#endif + +#ifndef I2C_SELECT_BUS +#define I2C_SELECT_BUS(bus) +#endif + +/* + * Few I2C transfers may be posted simultaneously, but MBUS driver is able + * to process it one-by-one. To serialize transfers, function i2c_transfer + * put transfer information to the queue and initiate new transfers if MBUS + * driver is not busy. When driver is busy, next transfer is dequeued + * when current active transfer is finished. + */ + +/* + * i2c_qel - I2C transfers queue element; contain information about + * delayed transfer + */ +typedef struct i2c_qel { + i2c_bus_number bus; /* I2C bus number */ + i2c_message *msg; /* pointer to the transfer' messages array */ + int nmsg; /* number of messages in transfer */ + i2c_transfer_done done; /* transfer done callback function */ + rtems_unsigned32 done_arg; /* arbitrary argument to done callback */ +} i2c_qel; + +/* Memory for I2C transfer queue. This queue represented like a ring buffer */ +static i2c_qel *tqueue; + +/* Maximum number of elements in transfer queue */ +static int tqueue_size; + +/* Position of next free element in a ring buffer */ +static volatile int tqueue_head; + +/* Position of the first element in transfer queue */ +static volatile int tqueue_tail; + +/* MBus I2C bus controller busy flag */ +static volatile rtems_boolean mbus_busy; + +/* MBus I2C bus controller descriptor */ +static mcfmbus mbus; + +/* Clock rate selected for each of bus */ +static int i2cdrv_bus_clock_div[I2C_NUMBER_OF_BUSES]; + +/* Currently selected I2C bus clock rate */ +static int i2cdrv_bus_clock_div_current; + +/* Forward function declaration */ +static void i2cdrv_unload(void); + + +/* i2cdrv_done -- + * Callback function which is called from MBus low-level driver when + * transfer is finished. + */ +static void +i2cdrv_done(rtems_unsigned32 arg) +{ + rtems_interrupt_level level; + i2c_qel *qel = tqueue + tqueue_tail; + qel->done(qel->done_arg); + rtems_interrupt_disable(level); + tqueue_tail = (tqueue_tail + 1) % tqueue_size; + mbus_busy = 0; + rtems_interrupt_enable(level); + i2cdrv_unload(); +} + +/* i2cdrv_unload -- + * If MBUS controller is not busy and transfer waiting in a queue, + * initiate processing of the next transfer in queue. + */ +static void +i2cdrv_unload(void) +{ + rtems_interrupt_level level; + i2c_qel *qel; + rtems_status_code sc; + rtems_interrupt_disable(level); + if (!mbus_busy && (tqueue_head != tqueue_tail)) + { + mbus_busy = 1; + rtems_interrupt_enable(level); + qel = tqueue + tqueue_tail; + + I2C_SELECT_BUS(qel->bus); + if (i2cdrv_bus_clock_div[qel->bus] != i2cdrv_bus_clock_div_current) + { + i2cdrv_bus_clock_div_current = i2cdrv_bus_clock_div[qel->bus]; + mcfmbus_select_clock_divider(&mbus, i2cdrv_bus_clock_div_current); + } + sc = mcfmbus_i2c_transfer(&mbus, qel->nmsg, qel->msg, i2cdrv_done, + (rtems_unsigned32)qel); + if (sc != RTEMS_SUCCESSFUL) + { + int i; + for (i = 0; i < qel->nmsg; i++) + { + qel->msg[i].status = I2C_RESOURCE_NOT_AVAILABLE; + } + i2cdrv_done((rtems_unsigned32)qel); + } + } + else + { + rtems_interrupt_enable(level); + } +} + +/* i2c_transfer -- + * Initiate multiple-messages transfer over specified I2C bus or + * put request into queue if bus or some other resource is busy. (This + * is non-blocking function). + * + * PARAMETERS: + * bus - I2C bus number + * nmsg - number of messages + * msg - pointer to messages array + * done - function which is called when transfer is finished + * done_arg - arbitrary argument passed to done funciton + * + * RETURNS: + * RTEMS_SUCCESSFUL if transfer initiated successfully, or error + * code if something failed. + */ +rtems_status_code +i2c_transfer(i2c_bus_number bus, int nmsg, i2c_message *msg, + i2c_transfer_done done, rtems_unsigned32 done_arg) +{ + i2c_qel qel; + rtems_interrupt_level level; + + if (bus >= I2C_NUMBER_OF_BUSES) + { + return RTEMS_INVALID_NUMBER; + } + + if (msg == NULL) + { + return RTEMS_INVALID_ADDRESS; + } + + qel.bus = bus; + qel.msg = msg; + qel.nmsg = nmsg; + qel.done = done; + qel.done_arg = done_arg; + rtems_interrupt_disable(level); + if ((tqueue_head + 1) % tqueue_size == tqueue_tail) + { + rtems_interrupt_enable(level); + return RTEMS_TOO_MANY; + } + memcpy(tqueue + tqueue_head, &qel, sizeof(qel)); + tqueue_head = (tqueue_head + 1) % tqueue_size; + rtems_interrupt_enable(level); + i2cdrv_unload(); + return RTEMS_SUCCESSFUL; +} + + +/* i2cdrv_initialize -- + * I2C driver initialization (rtems I/O driver primitive) + */ +rtems_device_driver +i2cdrv_initialize(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg) +{ + int i; + rtems_status_code sc; + mbus_busy = 0; + tqueue_tail = tqueue_head = 0; + tqueue_size = 32; + tqueue = calloc(tqueue_size, sizeof(i2c_qel)); + + sc = mcfmbus_initialize(&mbus, MBAR); + if (sc != RTEMS_SUCCESSFUL) + return sc; + + for (i = 0; i < I2C_NUMBER_OF_BUSES; i++) + { + sc = i2c_select_clock_rate(i, 4096); + if (sc != RTEMS_SUCCESSFUL) + return sc; + } + i2cdrv_bus_clock_div_current = -1; + return RTEMS_SUCCESSFUL; +} + +/* i2c_select_clock_rate -- + * select I2C bus clock rate for specified bus. Some bus controller do not + * allow to select arbitrary clock rate; in this case nearest possible + * slower clock rate is selected. + * + * PARAMETERS: + * bus - I2C bus number + * bps - data transfer rate for this bytes in bits per second + * + * RETURNS: + * RTEMS_SUCCESSFUL, if operation performed successfully, + * RTEMS_INVALID_NUMBER, if wrong bus number is specified, + * RTEMS_UNSATISFIED, if bus do not support data transfer rate selection + * or specified data transfer rate could not be used. + */ +rtems_status_code +i2c_select_clock_rate(i2c_bus_number bus, int bps) +{ + int div; + if (bus >= I2C_NUMBER_OF_BUSES) + return RTEMS_INVALID_NUMBER; + + if (bps == 0) + return RTEMS_UNSATISFIED; + + div = BSP_SYSTEM_FREQUENCY / bps; + i2cdrv_bus_clock_div[bus] = div; + return RTEMS_SUCCESSFUL; +} + + +/* i2c_poll -- + * Poll I2C bus controller for events and hanle it. This function is + * used when I2C driver operates in poll-driven mode. + * + * PARAMETERS: + * bus - bus number to be polled + * + * RETURNS: + * none + */ +void +i2c_poll(i2c_bus_number bus) +{ + mcfmbus_poll(&mbus); +} diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/include/.cvsignore b/c/src/lib/libbsp/m68k/mcf5206elite/include/.cvsignore new file mode 100644 index 0000000000..282522db03 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/include/.cvsignore @@ -0,0 +1,2 @@ +Makefile +Makefile.in diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/include/bsp.h b/c/src/lib/libbsp/m68k/mcf5206elite/include/bsp.h new file mode 100644 index 0000000000..f7491374fd --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/include/bsp.h @@ -0,0 +1,264 @@ +/* + * Board Support Package for MCF5206eLITE evaluation board + * BSP definitions + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#ifndef __mcf5206elite_BSP_h +#define __mcf5206elite_BSP_h + +#include "mcf5206/mcf5206e.h" + +#ifndef KB +#define KB (1024) +#endif +#ifndef MB +#define MB (KB*KB) +#endif + +/*** Board resources allocation ***/ + + +/* + * To achieve some compatibility with dBUG monitor, we use the same + * memory resources allocation as it is used in dBUG. + * + * If this definitions will be changed, change the linker script also. + */ + +/* Memory mapping */ +/* CS0: Boot Flash */ +#define BSP_MEM_ADDR_FLASH (0xFFE00000) +#define BSP_MEM_SIZE_FLASH (1*MB) +#define BSP_MEM_MASK_FLASH (MCF5206E_CSMR_MASK_1M) + +/* CS2: External SRAM */ +#define BSP_MEM_ADDR_ESRAM (0x30000000) +#define BSP_MEM_SIZE_ESRAM (1*MB) +#define BSP_MEM_MASK_ESRAM (MCF5206E_CSMR_MASK_1M) + +/* CS3: General-Purpose I/O register */ +#define BSP_MEM_ADDR_GPIO (0x40000000) +#define BSP_MEM_SIZE_GPIO (64*KB) +#define BSP_MEM_MASK_GPIO (MCF5206E_CSMR_MASK_64K) + +/* DRAM0: Dynamic RAM */ +#define BSP_MEM_ADDR_DRAM (0x00000000) +#define BSP_MEM_SIZE_DRAM (16*MB) +#define BSP_MEM_MASK_DRAM (MCF5206E_DCMR_MASK_16M) + +/* On-chip SRAM */ +#define BSP_MEM_ADDR_SRAM (0x20000000) +#define BSP_MEM_SIZE_SRAM (8*KB) + +/* On-chip peripherial registers */ +#define BSP_MEM_ADDR_IMM (0x10000000) +#define BSP_MEM_SIZE_IMM (1*KB) +#define MBAR BSP_MEM_ADDR_IMM + +/* Interrupt vector assignment */ +#define BSP_INTVEC_AVEC1 (25) +#define BSP_INTLVL_AVEC1 (1) +#define BSP_INTPRIO_AVEC1 (3) + +#define BSP_INTVEC_AVEC2 (26) +#define BSP_INTLVL_AVEC2 (2) +#define BSP_INTPRIO_AVEC2 (3) + +#define BSP_INTVEC_AVEC3 (27) +#define BSP_INTLVL_AVEC3 (3) +#define BSP_INTPRIO_AVEC3 (3) + +#define BSP_INTVEC_AVEC4 (28) +#define BSP_INTLVL_AVEC4 (4) +#define BSP_INTPRIO_AVEC4 (3) + +#define BSP_INTVEC_AVEC5 (29) +#define BSP_INTLVL_AVEC5 (5) +#define BSP_INTPRIO_AVEC5 (3) + +#define BSP_INTVEC_AVEC6 (30) +#define BSP_INTLVL_AVEC6 (6) +#define BSP_INTPRIO_AVEC6 (3) + +#define BSP_INTVEC_AVEC7 (31) +#define BSP_INTLVL_AVEC7 (7) +#define BSP_INTPRIO_AVEC7 (3) + +#define BSP_INTVEC_TIMER1 (BSP_INTVEC_AVEC5) +#define BSP_INTLVL_TIMER1 (BSP_INTLVL_AVEC5) +#define BSP_INTPRIO_TIMER1 (2) + +#define BSP_INTVEC_TIMER2 (BSP_INTVEC_AVEC6) +#define BSP_INTLVL_TIMER2 (BSP_INTLVL_AVEC6) +#define BSP_INTPRIO_TIMER2 (2) + +#define BSP_INTVEC_MBUS (BSP_INTVEC_AVEC4) +#define BSP_INTLVL_MBUS (BSP_INTLVL_AVEC4) +#define BSP_INTPRIO_MBUS (2) + +#define BSP_INTVEC_UART1 (64) +#define BSP_INTLVL_UART1 (4) +#define BSP_INTPRIO_UART1 (0) + +#define BSP_INTVEC_UART2 (65) +#define BSP_INTLVL_UART2 (4) +#define BSP_INTPRIO_UART2 (1) + +#define BSP_INTVEC_DMA0 (66) +#define BSP_INTLVL_DMA0 (3) +#define BSP_INTPRIO_DMA0 (1) + +#define BSP_INTVEC_DMA1 (67) +#define BSP_INTLVL_DMA1 (3) +#define BSP_INTPRIO_DMA1 (2) + +/* Location of DS1307 Real-Time Clock/NVRAM chip */ +#define DS1307_I2C_BUS_NUMBER (0) + +#ifndef ASM + +#ifdef __cplusplus +extern "C" { +#endif + +#include <bspopts.h> +#include <rtems.h> +#include <console.h> +#include <iosupp.h> +#include <clockdrv.h> + +#include "i2c.h" + +/* + * confdefs.h overrides for this BSP: + * - termios serial ports (defaults to 1) + * - Interrupt stack space is not minimum if defined. + */ + +#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 +#define CONFIGURE_INTERRUPT_STACK_MEMORY (4 * 1024) + +/* System frequency */ +#define BSP_SYSTEM_FREQUENCY ((unsigned int)&_SYS_CLOCK_FREQUENCY) +extern char _SYS_CLOCK_FREQUENCY; /* Don't use this variable directly!!! */ + +/* MBUS I2C bus clock default frequency */ +#define BSP_MBUS_FREQUENCY (16000) + +/* Number of I2C buses supported in this board */ +#define I2C_NUMBER_OF_BUSES (1) + +/* I2C bus selection */ +#define I2C_SELECT_BUS(bus) + +/* + * Define the time limits for RTEMS Test Suite test durations. + * Long test and short test duration limits are provided. These + * values are in seconds and need to be converted to ticks for the + * application. + * + */ + +#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */ +#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ + +/* + * Stuff for Time Test 27 + * Don't bother with hardware -- just use a software-interrupt + */ + +#define MUST_WAIT_FOR_INTERRUPT 0 + +#define Install_tm27_vector( handler ) set_vector( (handler), 34, 1 ) + +#define Cause_tm27_intr() asm volatile ("trap #2"); + +#define Clear_tm27_intr() + +#define Lower_tm27_intr() + +/* + * Simple spin delay in microsecond units for device drivers. + * This is very dependent on the clock speed of the target. + */ + +#define delay( microseconds ) \ + { register rtems_unsigned32 _delay=(microseconds); \ + register rtems_unsigned32 _tmp=123; \ + asm volatile( "0: \ + nbcd %0 ; \ + nbcd %0 ; \ + dbf %1,0b" \ + : "=d" (_tmp), "=d" (_delay) \ + : "0" (_tmp), "1" (_delay) ); \ + } + +/* Constants */ + +/* Structures */ + +/* + * Device Driver Table Entries + */ + +/* + * NOTE: Use the standard Console driver entry + */ + +/* + * NOTE: Use the standard Clock driver entry + */ + +/* + * Real-Time Clock Driver Table Entry + * NOTE: put this entry to the device driver table AFTER I2C bus driver! + */ +#define RTC_DRIVER_TABLE_ENTRY \ + { rtc_initialize, NULL, NULL, NULL, NULL, NULL } +extern rtems_device_driver rtc_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg +); + +/* miscellaneous stuff assumed to exist */ + +extern rtems_configuration_table BSP_Configuration; + +extern m68k_isr_entry M68Kvec[]; /* vector table address */ + +extern rtems_isr (*rtems_clock_hook)(rtems_vector_number); + +/* functions */ + +void bsp_cleanup( void ); + +m68k_isr_entry set_vector( + rtems_isr_entry handler, + rtems_vector_number vector, + int type +); + +/* + * Values assigned by link editor + */ +extern void *_RomBase, *_RamBase; + +#ifdef __cplusplus +} +#endif + +#endif /* ASM */ + +#endif +/* end of include file */ diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/include/bspopts.h.in b/c/src/lib/libbsp/m68k/mcf5206elite/include/bspopts.h.in new file mode 100644 index 0000000000..747a91ed9a --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/include/bspopts.h.in @@ -0,0 +1 @@ +/* include/bspopts.h.in. Generated automatically from configure.ac by autoheader. */ diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/include/coverhd.h b/c/src/lib/libbsp/m68k/mcf5206elite/include/coverhd.h new file mode 100644 index 0000000000..e102b5ddbf --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/include/coverhd.h @@ -0,0 +1,82 @@ +/* + * This file based on output of tmoverhd test. + * + * $Id$ + */ + +#ifndef __COVERHD_H__ +#define __COVERHD_H__ + +#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 0 +#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 0 +#define CALLING_OVERHEAD_TASK_CREATE 1 +#define CALLING_OVERHEAD_TASK_IDENT 0 +#define CALLING_OVERHEAD_TASK_START 0 +#define CALLING_OVERHEAD_TASK_RESTART 0 +#define CALLING_OVERHEAD_TASK_DELETE 0 +#define CALLING_OVERHEAD_TASK_SUSPEND 0 +#define CALLING_OVERHEAD_TASK_RESUME 0 +#define CALLING_OVERHEAD_TASK_SET_PRIORITY 0 +#define CALLING_OVERHEAD_TASK_MODE 0 +#define CALLING_OVERHEAD_TASK_GET_NOTE 0 +#define CALLING_OVERHEAD_TASK_SET_NOTE 0 +#define CALLING_OVERHEAD_TASK_WAKE_WHEN 2 +#define CALLING_OVERHEAD_TASK_WAKE_AFTER 0 +#define CALLING_OVERHEAD_INTERRUPT_CATCH 0 +#define CALLING_OVERHEAD_CLOCK_GET 2 +#define CALLING_OVERHEAD_CLOCK_SET 2 +#define CALLING_OVERHEAD_CLOCK_TICK 0 +#define CALLING_OVERHEAD_TIMER_CREATE 0 +#define CALLING_OVERHEAD_TIMER_DELETE 0 +#define CALLING_OVERHEAD_TIMER_IDENT 0 +#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 0 +#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 2 +#define CALLING_OVERHEAD_TIMER_RESET 0 +#define CALLING_OVERHEAD_TIMER_CANCEL 0 +#define CALLING_OVERHEAD_SEMAPHORE_CREATE 1 +#define CALLING_OVERHEAD_SEMAPHORE_DELETE 0 +#define CALLING_OVERHEAD_SEMAPHORE_IDENT 0 +#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0 +#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 0 +#define CALLING_OVERHEAD_EVENT_SEND 0 +#define CALLING_OVERHEAD_EVENT_RECEIVE 0 +#define CALLING_OVERHEAD_SIGNAL_CATCH 0 +#define CALLING_OVERHEAD_SIGNAL_SEND 0 +#define CALLING_OVERHEAD_PARTITION_CREATE 1 +#define CALLING_OVERHEAD_PARTITION_IDENT 0 +#define CALLING_OVERHEAD_PARTITION_DELETE 0 +#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 0 +#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 0 +#define CALLING_OVERHEAD_REGION_CREATE 1 +#define CALLING_OVERHEAD_REGION_IDENT 0 +#define CALLING_OVERHEAD_REGION_DELETE 0 +#define CALLING_OVERHEAD_REGION_GET_SEGMENT 1 +#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 0 +#define CALLING_OVERHEAD_PORT_CREATE 1 +#define CALLING_OVERHEAD_PORT_IDENT 0 +#define CALLING_OVERHEAD_PORT_DELETE 0 +#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0 +#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0 +#define CALLING_OVERHEAD_IO_INITIALIZE 0 +#define CALLING_OVERHEAD_IO_OPEN 0 +#define CALLING_OVERHEAD_IO_CLOSE 0 +#define CALLING_OVERHEAD_IO_READ 0 +#define CALLING_OVERHEAD_IO_WRITE 0 +#define CALLING_OVERHEAD_IO_CONTROL 0 +#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 0 +#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 0 + +#endif /* __COVERHD_H__ */ diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/include/ds1307.h b/c/src/lib/libbsp/m68k/mcf5206elite/include/ds1307.h new file mode 100644 index 0000000000..beab22c6b8 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/include/ds1307.h @@ -0,0 +1,43 @@ +/* + * This file contains the definitions for Dallas Semiconductor + * DS1307/DS1308 serial real-time clock/NVRAM. + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * @(#) $Id$ + */ + +#ifndef __RTC_DS1307__ +#define __RTC_DS1307__ + +#define DS1307_I2C_ADDRESS (0xD0) /* I2C bus address assigned to DS1307 */ + +#define DS1307_SECOND (0x00) +#define DS1307_SECOND_HALT (0x80) /* High bit is a Clock Halt bit */ +#define DS1307_MINUTE (0x01) +#define DS1307_HOUR (0x02) +#define DS1307_HOUR_12 (0x40) /* 12-hour mode */ +#define DS1307_HOUR_PM (0x20) /* PM in 12-hour mode */ +#define DS1307_DAY_OF_WEEK (0x03) +#define DS1307_DAY (0x04) +#define DS1307_MONTH (0x05) +#define DS1307_YEAR (0x06) +#define DS1307_CONTROL (0x07) +#define DS1307_CONTROL_OUT (0x80) /* Output control */ +#define DS1307_CONTROL_SQWE (0x10) /* Sqware Wave Enable */ +#define DS1307_CONTROL_RS_1 (0x00) /* Rate select: 1 Hz */ +#define DS1307_CONTROL_RS_4096 (0x01) /* Rate select: 4096 Hz */ +#define DS1307_CONTROL_RS_8192 (0x02) /* Rate select: 8192 Hz */ +#define DS1307_CONTROL_RS_32768 (0x03) /* Rate select; 32768 Hz */ + +#define DS1307_NVRAM_START (0x08) /* Start location of non-volatile memory */ +#define DS1307_NVRAM_END (0x3F) /* End location of non-volatile memory */ +#define DS1307_NVRAM_SIZE (56) /* Size of non-volatile memory */ + +#endif __RTC_DS1307__ diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/include/i2c.h b/c/src/lib/libbsp/m68k/mcf5206elite/include/i2c.h new file mode 100644 index 0000000000..0c21342f51 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/include/i2c.h @@ -0,0 +1,245 @@ +/* + * Generic I2C bus interface for RTEMS + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * @(#) $Id$ + */ + +#ifndef __RTEMS__I2C_H__ +#define __RTEMS__I2C_H__ + +#include <rtems.h> +#include <bsp.h> +/* This header file define the generic interface to i2c buses available in + * system. This interface may be used by user applications or i2c-device + * drivers (like RTC, NVRAM, etc). + * + * Functions i2c_initialize and i2c_transfer declared in this header usually + * implemented in particular board support package. Usually this + * implementation is a simple wrapper or multiplexor to I2C controller + * driver which is available in system. It may be generic "software + * controller" I2C driver which control SDA and SCL signals directly (if SDA + * and SCL is general-purpose I/O pins), or driver for hardware I2C + * controller (standalone or integrated with processors: MBus controller in + * ColdFire processors, I2C controller in PowerQUICC and so on). + * + * i2c_transfer is a very generic low-level function. Higher-level function + * i2c_write, i2c_read, i2c_wrrd, i2c_wbrd is defined here too. + */ + +/* I2C Bus Number type */ +typedef rtems_unsigned32 i2c_bus_number; + +/* I2C device address */ +typedef rtems_unsigned16 i2c_address; + +/* I2C error codes generated during message transfer */ +typedef enum i2c_message_status { + I2C_SUCCESSFUL = 0, + I2C_TIMEOUT, + I2C_NO_DEVICE, + I2C_ARBITRATION_LOST, + I2C_NO_ACKNOWLEDGE, + I2C_NO_DATA, + I2C_RESOURCE_NOT_AVAILABLE +} i2c_message_status; + +/* I2C Message */ +typedef struct i2c_message { + i2c_address addr; /* I2C slave device address */ + rtems_unsigned16 flags; /* message flags (see below) */ + i2c_message_status status; /* message transfer status code */ + rtems_unsigned16 len; /* Number of bytes to read or write */ + rtems_unsigned8 *buf; /* pointer to data array */ +} i2c_message; + +/* I2C message flag */ +#define I2C_MSG_ADDR_10 (0x01) /* 10-bit address */ +#define I2C_MSG_WR (0x02) /* transfer direction for this message + from master to slave */ +#define I2C_MSG_ERRSKIP (0x04) /* Skip message if last transfered message + is failed */ +/* Type for function which is called when transfer over I2C bus is finished */ +typedef void (*i2c_transfer_done) (rtems_unsigned32 arg); + +/* i2c_initialize -- + * I2C driver initialization. This function usually called on device + * driver initialization state, before initialization task. All I2C + * buses are initialized; reasonable slow data transfer rate is + * selected for each bus. + * + * PARAMETERS: + * major - I2C device major number + * minor - I2C device minor number + * arg - RTEMS driver initialization argument + * + * RETURNS: + * RTEMS status code + */ +rtems_device_driver +i2c_initialize(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg); + +/* i2c_select_clock_rate -- + * select I2C bus clock rate for specified bus. Some bus controller do not + * allow to select arbitrary clock rate; in this case nearest possible + * slower clock rate is selected. + * + * PARAMETERS: + * bus - I2C bus number + * bps - data transfer rate for this bytes in bits per second + * + * RETURNS: + * RTEMS_SUCCESSFUL, if operation performed successfully, + * RTEMS_INVALID_NUMBER, if wrong bus number is specified, + * RTEMS_UNSATISFIED, if bus do not support data transfer rate selection + * or specified data transfer rate could not be used. + */ +rtems_status_code +i2c_select_clock_rate(i2c_bus_number bus, int bps); + +/* i2c_transfer -- + * Initiate multiple-messages transfer over specified I2C bus or + * put request into queue if bus or some other resource is busy. (This + * is non-blocking function). + * + * PARAMETERS: + * bus - I2C bus number + * nmsg - number of messages + * msg - pointer to messages array + * done - function which is called when transfer is finished + * done_arg - arbitrary argument passed to done funciton + * + * RETURNS: + * RTEMS_SUCCESSFUL if transfer initiated successfully, or error + * code if something failed. + */ +rtems_status_code +i2c_transfer(i2c_bus_number bus, int nmsg, i2c_message *msg, + i2c_transfer_done done, rtems_unsigned32 done_arg); + +/* i2c_transfer_wait -- + * Initiate I2C bus transfer and block until this transfer will be + * finished. This function wait the semaphore if system in + * SYSTEM_STATE_UP state, or poll done flag in other states. + * + * PARAMETERS: + * bus - I2C bus number + * msg - pointer to transfer messages array + * nmsg - number of messages in transfer + * + * RETURNS: + * I2C_SUCCESSFUL, if tranfer finished successfully, + * I2C_RESOURCE_NOT_AVAILABLE, if semaphore operations has failed, + * value of status field of first error-finished message in transfer, + * if something wrong. + */ +i2c_message_status +i2c_transfer_wait(i2c_bus_number bus, i2c_message *msg, int nmsg); + +/* i2c_poll -- + * Poll I2C bus controller for events and hanle it. This function is + * used when I2C driver operates in poll-driven mode. + * + * PARAMETERS: + * bus - bus number to be polled + * + * RETURNS: + * none + */ +void +i2c_poll(i2c_bus_number bus); + +/* i2c_write -- + * Send single message over specified I2C bus to addressed device and + * wait while transfer is finished. + * + * PARAMETERS: + * bus - I2C bus number + * addr - address of I2C device + * buf - data to be sent to device + * size - data buffer size + * + * RETURNS: + * transfer status + */ +i2c_message_status +i2c_write(i2c_bus_number bus, i2c_address addr, void *buf, int size); + +/* i2c_wrbyte -- + * Send single one-byte long message over specified I2C bus to + * addressed device and wait while transfer is finished. + * + * PARAMETERS: + * bus - I2C bus number + * addr - address of I2C device + * cmd - byte message to be sent to device + * + * RETURNS: + * transfer status + */ +i2c_message_status +i2c_wrbyte(i2c_bus_number bus, i2c_address addr, rtems_unsigned8 cmd); + +/* i2c_read -- + * receive single message over specified I2C bus from addressed device. + * This call will wait while transfer is finished. + * + * PARAMETERS: + * bus - I2C bus number + * addr - address of I2C device + * buf - buffer for received message + * size - receive buffer size + * + * RETURNS: + * transfer status + */ +i2c_message_status +i2c_read(i2c_bus_number bus, i2c_address addr, void *buf, int size); + +/* i2c_wrrd -- + * Send message over I2C bus to specified device and receive message + * from the same device during single transfer. + * + * PARAMETERS: + * bus - I2C bus number + * addr - address of I2C device + * bufw - data to be sent to device + * sizew - send data buffer size + * bufr - buffer for received message + * sizer - receive buffer size + * + * RETURNS: + * transfer status + */ +i2c_message_status +i2c_wrrd(i2c_bus_number bus, i2c_address addr, void *bufw, int sizew, + void *bufr, int sizer); + +/* i2c_wbrd -- + * Send one-byte message over I2C bus to specified device and receive + * message from the same device during single transfer. + * + * PARAMETERS: + * bus - I2C bus number + * addr - address of I2C device + * cmd - one-byte message to be sent over I2C bus + * bufr - buffer for received message + * sizer - receive buffer size + * + * RETURNS: + * transfer status + */ +i2c_message_status +i2c_wbrd(i2c_bus_number bus, i2c_address addr, rtems_unsigned8 cmd, + void *bufr, int sizer); + +#endif diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/include/i2cdrv.h b/c/src/lib/libbsp/m68k/mcf5206elite/include/i2cdrv.h new file mode 100644 index 0000000000..9d8013b404 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/include/i2cdrv.h @@ -0,0 +1,37 @@ +/* + * i2cdrv.h -- I2C bus driver prototype and definitions + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * @(#) $Id$ + */ + +#ifndef __I2CDRV_H__ +#define __I2CDRV_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define I2C_DRIVER_TABLE_ENTRY \ + { i2cdrv_initialize, NULL, NULL, NULL, NULL, NULL } + +/* i2cdrv_initialize -- + * I2C driver initialization (rtems I/O driver primitive) + */ +rtems_device_driver +i2cdrv_initialize(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg); + +#ifdef __cplusplus +} +#endif + +#endif /* __I2CDRV_H__ */ diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/include/nvram.h b/c/src/lib/libbsp/m68k/mcf5206elite/include/nvram.h new file mode 100644 index 0000000000..e68cfa414d --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/include/nvram.h @@ -0,0 +1,73 @@ +/* + * nvram.h -- DS1307-based non-volatile memory device driver. + * + * This driver support file-like operations to 56-bytes long non-volatile + * memory of DS1307 I2C real-time clock chip. + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * @(#) $Id$ + */ + +#ifndef __DRIVER__NVRAM_H__ +#define __DRIVER__NVRAM_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVRAM_DRIVER_TABLE_ENTRY \ + { nvram_driver_initialize, nvram_driver_open, nvram_driver_close, \ + nvram_driver_read, nvram_driver_write, NULL } + +/* nvram_driver_initialize -- + * Non-volatile memory device driver initialization. + */ +rtems_device_driver +nvram_driver_initialize(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg); + +/* nvram_driver_open -- + * Non-volatile memory device driver open primitive. + */ +rtems_device_driver +nvram_driver_open(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg); + +/* nvram_driver_close -- + * Non-volatile memory device driver close primitive. + */ +rtems_device_driver +nvram_driver_close(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg); + +/* nvram_driver_read -- + * Non-volatile memory device driver read primitive. + */ +rtems_device_driver +nvram_driver_read(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg); + +/* nvram_driver_write -- + * Non-volatile memory device driver write primitive. + */ +rtems_device_driver +nvram_driver_write(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg); + +#ifdef __cplusplus +} +#endif + +#endif /* __VFDDRV_H__ */ diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/nvram/.cvsignore b/c/src/lib/libbsp/m68k/mcf5206elite/nvram/.cvsignore new file mode 100644 index 0000000000..282522db03 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/nvram/.cvsignore @@ -0,0 +1,2 @@ +Makefile +Makefile.in diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/nvram/nvram.c b/c/src/lib/libbsp/m68k/mcf5206elite/nvram/nvram.c new file mode 100644 index 0000000000..ea084a728d --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/nvram/nvram.c @@ -0,0 +1,177 @@ +/* + * DS1307-based Non-Volatile memory device driver + * + * DS1307 chip is a I2C Real-Time Clock. It contains 56 bytes of + * non-volatile RAM storage. This driver provide file-like interface to + * this memory. + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * @(#) $Id$ + */ + +#include <rtems.h> +#include <rtems/libio.h> +#include <errno.h> +#include <bsp.h> +#include <nvram.h> +#include <i2c.h> +#include <ds1307.h> + + +/* nvram_driver_initialize -- + * Non-volatile memory device driver initialization. + */ +rtems_device_driver +nvram_driver_initialize(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg) +{ + rtems_status_code sc; + i2c_message_status status; + i2c_bus_number bus = DS1307_I2C_BUS_NUMBER; + i2c_address addr = DS1307_I2C_ADDRESS; + int try = 0; + do { + status = i2c_wrbyte(bus, addr, 0); + if (status == I2C_NO_DEVICE) + break; + try++; + } while ((try < 15) && (status != I2C_SUCCESSFUL)); + + if (status == I2C_SUCCESSFUL) + { + sc = rtems_io_register_name("/dev/nvram", major, 0); + if (sc != RTEMS_SUCCESSFUL) + { + errno = EIO; + return RTEMS_UNSATISFIED; + } + else + return RTEMS_SUCCESSFUL; + } + else + { + errno = ENODEV; + return RTEMS_UNSATISFIED; + } +} + +/* nvram_driver_open -- + * Non-volatile memory device driver open primitive. + */ +rtems_device_driver +nvram_driver_open(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg) +{ + return RTEMS_SUCCESSFUL; +} + +/* nvram_driver_close -- + * Non-volatile memory device driver close primitive. + */ +rtems_device_driver +nvram_driver_close(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg) +{ + return RTEMS_SUCCESSFUL; +} + +/* nvram_driver_read -- + * Non-volatile memory device driver read primitive. + */ +rtems_device_driver +nvram_driver_read(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg) +{ + rtems_libio_rw_args_t *args = arg; + unsigned32 count; + i2c_bus_number bus = DS1307_I2C_BUS_NUMBER; + i2c_address addr = DS1307_I2C_ADDRESS; + i2c_message_status status; + if (args->offset >= DS1307_NVRAM_SIZE) + { + count = 0; + } + else if (args->offset + args->count >= DS1307_NVRAM_SIZE) + { + count = DS1307_NVRAM_SIZE - args->offset; + } + else + { + count = args->count; + } + if (count > 0) + { + int try = 0; + do { + status = i2c_wbrd(bus, addr, DS1307_NVRAM_START + args->offset, + args->buffer, count); + try++; + } while ((try < 15) && (status != I2C_SUCCESSFUL)); + if (status != I2C_SUCCESSFUL) + { + errno = EIO; + return RTEMS_UNSATISFIED; + } + } + args->bytes_moved = count; + return RTEMS_SUCCESSFUL; +} + +/* nvram_driver_write -- + * Non-volatile memory device driver write primitive. + */ +rtems_device_driver +nvram_driver_write(rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg) +{ + rtems_libio_rw_args_t *args = arg; + unsigned32 count; + i2c_bus_number bus = DS1307_I2C_BUS_NUMBER; + i2c_address addr = DS1307_I2C_ADDRESS; + i2c_message_status status; + + if (args->offset >= DS1307_NVRAM_SIZE) + { + count = 0; + } + else if (args->offset + args->count >= DS1307_NVRAM_SIZE) + { + count = DS1307_NVRAM_SIZE - args->offset; + } + else + { + count = args->count; + } + if (count > 0) + { + int try = 0; + do { + rtems_unsigned8 buf[DS1307_NVRAM_SIZE + 1]; + buf[0] = DS1307_NVRAM_START + args->offset; + memcpy(buf+1, args->buffer, count); + status = i2c_write(bus, addr, buf, count+1); + try++; + } while ((try < 15) && (status != I2C_SUCCESSFUL)); + if (status != I2C_SUCCESSFUL) + { + errno = EIO; + return RTEMS_UNSATISFIED; + } + } + args->bytes_moved = count; + return RTEMS_SUCCESSFUL; +} + +
\ No newline at end of file diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/start/.cvsignore b/c/src/lib/libbsp/m68k/mcf5206elite/start/.cvsignore new file mode 100644 index 0000000000..282522db03 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/start/.cvsignore @@ -0,0 +1,2 @@ +Makefile +Makefile.in diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/start/start.S b/c/src/lib/libbsp/m68k/mcf5206elite/start/start.S new file mode 100644 index 0000000000..53d15db174 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/start/start.S @@ -0,0 +1,422 @@ +/* + * MCF5206eLITE startup code + * + * This file contains the entry point for the application. + * The name of this entry point is compiler dependent. + * It jumps to the BSP which is responsible for performing + * all initialization. + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * Based on work: + * Author: + * David Fiddes, D.J@fiddes.surfaid.org + * http://www.calm.hw.ac.uk/davidf/coldfire/ + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include "asm.h" +#include "bsp.h" + +BEGIN_CODE + +/* Initial stack situated in on-chip static memory */ +#define INITIAL_STACK BSP_MEM_ADDR_SRAM+BSP_MEM_SIZE_SRAM-4 + + PUBLIC (INTERRUPT_VECTOR) +SYM(INTERRUPT_VECTOR): + .long INITIAL_STACK | 00: initial SSP + .long start | 01: Initial PC + .long _unexp_exception | 02: Access Error + .long _unexp_exception | 03: Address Error + .long _unexp_exception | 04: Illegal Instruction + .long _reserved_int | 05: Reserved + .long _reserved_int | 06: Reserved + .long _reserved_int | 07: Reserved + .long _unexp_exception | 08: Priveledge Violation + .long _unexp_exception | 09: Trace + .long _unexp_exception | 0A: Unimplemented A-Line + .long _unexp_exception | 0B: Unimplemented F-Line + .long _unexp_exception | 0C: Debug interrupt + .long _reserved_int | 0D: Reserved + .long _unexp_exception | 0E: Format error + .long _unexp_exception | 0F: Uninitialized interrupt + .long _reserved_int | 10: Reserved + .long _reserved_int | 11: Reserved + .long _reserved_int | 12: Reserved + .long _reserved_int | 13: Reserved + .long _reserved_int | 14: Reserved + .long _reserved_int | 15: Reserved + .long _reserved_int | 16: Reserved + .long _reserved_int | 17: Reserved + .long _spurious_int | 18: Spurious interrupt + .long _avec1_int | 19: Autovector Level 1 + .long _avec2_int | 1A: Autovector Level 2 + .long _avec3_int | 1B: Autovector Level 3 + .long _avec4_int | 1C: Autovector Level 4 + .long _avec5_int | 1D: Autovector Level 5 + .long _avec6_int | 1E: Autovector Level 6 + .long _avec7_int | 1F: Autovector Level 7 + .long _unexp_exception | 20: TRAP #0 + .long _unexp_exception | 21: TRAP #1 + .long _unexp_exception | 22: TRAP #2 + .long _unexp_exception | 23: TRAP #3 + .long _unexp_exception | 24: TRAP #4 + .long _unexp_exception | 25: TRAP #5 + .long _unexp_exception | 26: TRAP #6 + .long _unexp_exception | 27: TRAP #7 + .long _unexp_exception | 28: TRAP #8 + .long _unexp_exception | 29: TRAP #9 + .long _unexp_exception | 2A: TRAP #10 + .long _unexp_exception | 2B: TRAP #11 + .long _unexp_exception | 2C: TRAP #12 + .long _unexp_exception | 2D: TRAP #13 + .long _unexp_exception | 2E: TRAP #14 + .long _unexp_exception | 2F: TRAP #15 + .long _reserved_int | 30: Reserved + .long _reserved_int | 31: Reserved + .long _reserved_int | 32: Reserved + .long _reserved_int | 33: Reserved + .long _reserved_int | 34: Reserved + .long _reserved_int | 35: Reserved + .long _reserved_int | 36: Reserved + .long _reserved_int | 37: Reserved + .long _reserved_int | 38: Reserved + .long _reserved_int | 39: Reserved + .long _reserved_int | 3A: Reserved + .long _reserved_int | 3B: Reserved + .long _reserved_int | 3C: Reserved + .long _reserved_int | 3D: Reserved + .long _reserved_int | 3E: Reserved + .long _reserved_int | 3F: Reserved + + .long _unexp_int | 40-FF: User defined interrupts + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + + .long _unexp_int | 50: + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + + .long _unexp_int | 60: + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + + .long _unexp_int | 70: + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + + .long _unexp_int | 80: + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + + .long _unexp_int | 90: + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + + .long _unexp_int | A0: + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + + .long _unexp_int | B0: + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + + .long _unexp_int | C0: + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + + .long _unexp_int | D0: + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + + .long _unexp_int | E0: + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + + .long _unexp_int | F0: + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + .long _unexp_int + + PUBLIC(start) +SYM(start): + move.w #0x2700,sr | First turn off all interrupts! + + move.l #(BSP_MEM_ADDR_SRAM + MCF5206E_RAMBAR_V),d0 + movec d0,rambar0 | ...so we have a stack + + move.l #(INITIAL_STACK),sp | Set up stack again (may be we are + | going here from monitor or with + | BDM interface assistance) + + /* + * Remainder of the startup code is handled by C code + */ + jmp SYM(Init5206e) | Start C code (which never returns) + +/*************************************************************************** + Function : CopyDataClearBSSAndStart + + Description : Copy DATA segment, clear BSS segment, initialize heap, + initialise real stack, start C program. Assume that DATA and BSS sizes + are multiples of 4. + ***************************************************************************/ + PUBLIC (CopyDataClearBSSAndStart) +SYM(CopyDataClearBSSAndStart): + lea copy_start,a0 | Get start of DATA in RAM + lea SYM(etext),a2 | Get start of DATA in ROM + cmpl a0,a2 | Are they the same? + beq.s NOCOPY | Yes, no copy necessary + lea copy_end,a1 | Get end of DATA in RAM + bra.s COPYLOOPTEST | Branch into copy loop +COPYLOOP: + movel a2@+,a0@+ | Copy word from ROM to RAM +COPYLOOPTEST: + cmpl a1,a0 | Done? + bcs.s COPYLOOP | No, skip +NOCOPY: + + lea clear_start,a0 | Get start of BSS + lea clear_end,a1 | Get end of BSS + clrl d0 | Value to set + bra.s ZEROLOOPTEST | Branch into clear loop +ZEROLOOP: + movel d0,a0@+ | Clear a word +ZEROLOOPTEST: + cmpl a1,a0 | Done? + bcs.s ZEROLOOP | No, skip + move 4(a7),d0 + move d0,_M68k_Ramsize | Set Ram Size + + /* + * Right : Now we're ready to boot RTEMS + */ + clrl d0 | Pass in null to all boot_card() params + movel d0,a7@- | environp + movel d0,a7@- | argv + movel d0,a7@- | argc + jsr SYM(boot_card) | Call C boot_card function to startup RTEMS + +# Wait forever +_stop: + nop + stop #0x2700 + jmp _stop + +# The following labelled nops is a placeholders for breakpoints +_unexp_exception: + nop + jmp _stop + +_unexp_int: + nop + jmp _stop + +_reserved_int: + nop + jmp _stop + +_spurious_int: + nop + jmp _stop + +_avec1_int: + nop + jmp _unexp_int + +_avec2_int: + nop + jmp _unexp_int + +_avec3_int: + nop + jmp _unexp_int + +_avec4_int: + nop + jmp _unexp_int + +_avec5_int: + nop + jmp _unexp_int + +_avec6_int: + nop + jmp _unexp_int + +_avec7_int: + nop + jmp _unexp_int + + +END_CODE + +END + diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/startup/.cvsignore b/c/src/lib/libbsp/m68k/mcf5206elite/startup/.cvsignore new file mode 100644 index 0000000000..282522db03 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/startup/.cvsignore @@ -0,0 +1,2 @@ +Makefile +Makefile.in diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/startup/bspclean.c b/c/src/lib/libbsp/m68k/mcf5206elite/startup/bspclean.c new file mode 100644 index 0000000000..ee8f31fd3a --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/startup/bspclean.c @@ -0,0 +1,38 @@ +/* + * MCF5206eLITE bsp_cleanup + * + * This routine returns control from RTEMS to the dBUG monitor. + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia. + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> + +/* bsp_cleanup -- + * This function called when RTEMS execution is finished. bsp_cleanup + * for MCF5206eLITE evaluation board throw execution to the dBUG + * monitor. + * + * PARAMETERS: + * none + * + * RETURNS: + * none + */ +void +bsp_cleanup(void) +{ +} diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/startup/bspstart.c b/c/src/lib/libbsp/m68k/mcf5206elite/startup/bspstart.c new file mode 100644 index 0000000000..23ba12fd1c --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/startup/bspstart.c @@ -0,0 +1,91 @@ +/* + * BSP startup + * + * This routine starts the application. It includes application, + * board, and monitor specific initialization and configuration. + * The generic CPU dependent initialization has been performed + * before this routine is invoked. + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * Based on work: + * Author: + * David Fiddes, D.J@fiddes.surfaid.org + * http://www.calm.hw.ac.uk/davidf/coldfire/ + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include <bsp.h> +#include <rtems/libio.h> + +#include <rtems/libcsupport.h> + +#include <string.h> + +/* + * The original table from the application and our copy of it with + * some changes. + */ + +extern rtems_configuration_table Configuration; +rtems_configuration_table BSP_Configuration; + +rtems_cpu_table Cpu_table; + +unsigned long _RamSize; + +char *rtems_progname; + +/* + * Use the shared implementations of the following routines + */ + +void bsp_postdriver_hook(void); +void bsp_libc_init( void *, unsigned32, int ); +void bsp_pretasking_hook(void); /* m68k version */ + +/* bsp_start -- + * This routine does the bulk of the system initialisation. + */ +void bsp_start( void ) +{ + extern void *_WorkspaceBase; + + /* + * Need to "allocate" the memory for the RTEMS Workspace and + * tell the RTEMS configuration where it is. This memory is + * not malloc'ed. It is just "pulled from the air". + */ + + BSP_Configuration.work_space_start = (void *)&_WorkspaceBase; + + /* + * Account for the console's resources + */ + console_reserve_resources( &BSP_Configuration ); + + /* + * initialize the CPU table for this BSP + */ + Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */ + + Cpu_table.postdriver_hook = bsp_postdriver_hook; + + Cpu_table.do_zero_of_workspace = TRUE; + + Cpu_table.interrupt_stack_size = 4096; + + Cpu_table.interrupt_vector_table = (m68k_isr *)0; /* vectors at start of RAM */ + +} diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/startup/gdbinit b/c/src/lib/libbsp/m68k/mcf5206elite/startup/gdbinit new file mode 100644 index 0000000000..63f21d2381 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/startup/gdbinit @@ -0,0 +1,220 @@ +# +# GDB Init script for the Coldfire 5206e processor. +# +# The main purpose of this script is to perform minimum initialization of +# processor so code can be loaded. Also, exception handling is performed. +# +# Copyright (C) OKTET Ltd., St.-Petersburg, Russia +# Author: Victor V. Vengerov <vvv@oktet.ru> +# +# This script partially based on gdb scripts written by +# Eric Norum, <eric@skatter.usask.ca> +# +# +# The license and distribution terms for this file may be +# found in the file LICENSE in this distribution or at +# +# http://www.OARcorp.com/rtems/license.html. +# +# $Id$ +# + +define addresses + +set $mbar = 0x10000001 +set $simr = $mbar - 1 + 0x003 +set $icr1 = $mbar - 1 + 0x014 +set $icr2 = $mbar - 1 + 0x015 +set $icr3 = $mbar - 1 + 0x016 +set $icr4 = $mbar - 1 + 0x017 +set $icr5 = $mbar - 1 + 0x018 +set $icr6 = $mbar - 1 + 0x019 +set $icr7 = $mbar - 1 + 0x01A +set $icr8 = $mbar - 1 + 0x01B +set $icr9 = $mbar - 1 + 0x01C +set $icr10 = $mbar - 1 + 0x01D +set $icr11 = $mbar - 1 + 0x01E +set $icr12 = $mbar - 1 + 0x01F +set $icr13 = $mbar - 1 + 0x020 +set $imr = $mbar - 1 + 0x036 +set $ipr = $mbar - 1 + 0x03A +set $rsr = $mbar - 1 + 0x040 +set $sypcr = $mbar - 1 + 0x041 +set $swivr = $mbar - 1 + 0x042 +set $swsr = $mbar - 1 + 0x043 +set $dcrr = $mbar - 1 + 0x046 +set $dctr = $mbar - 1 + 0x04A +set $dcar0 = $mbar - 1 + 0x04C +set $dcmr0 = $mbar - 1 + 0x050 +set $dccr0 = $mbar - 1 + 0x057 +set $dcar1 = $mbar - 1 + 0x058 +set $dcmr1 = $mbar - 1 + 0x05C +set $dccr1 = $mbar - 1 + 0x063 +set $csar0 = $mbar - 1 + 0x064 +set $csmr0 = $mbar - 1 + 0x068 +set $cscr0 = $mbar - 1 + 0x06E +set $csar1 = $mbar - 1 + 0x070 +set $csmr1 = $mbar - 1 + 0x074 +set $cscr1 = $mbar - 1 + 0x07A +set $csar2 = $mbar - 1 + 0x07C +set $csmr2 = $mbar - 1 + 0x080 +set $cscr2 = $mbar - 1 + 0x086 +set $csar3 = $mbar - 1 + 0x088 +set $csmr3 = $mbar - 1 + 0x08C +set $cscr3 = $mbar - 1 + 0x092 +set $csar4 = $mbar - 1 + 0x094 +set $csmr4 = $mbar - 1 + 0x098 +set $cscr4 = $mbar - 1 + 0x09E +set $csar5 = $mbar - 1 + 0x0A0 +set $csmr5 = $mbar - 1 + 0x0A4 +set $cscr5 = $mbar - 1 + 0x0AA +set $csar6 = $mbar - 1 + 0x0AC +set $csmr6 = $mbar - 1 + 0x0B0 +set $cscr6 = $mbar - 1 + 0x0B6 +set $csar7 = $mbar - 1 + 0x0B8 +set $csmr7 = $mbar - 1 + 0x0BC +set $cscr7 = $mbar - 1 + 0x0C2 +set $dmcr = $mbar - 1 + 0x0C6 +set $par = $mbar - 1 + 0x0CA +set $tmr1 = $mbar - 1 + 0x100 +set $trr1 = $mbar - 1 + 0x104 +set $tcr1 = $mbar - 1 + 0x108 +set $tcn1 = $mbar - 1 + 0x10C +set $ter1 = $mbar - 1 + 0x111 +set $tmr2 = $mbar - 1 + 0x120 +set $trr2 = $mbar - 1 + 0x124 +set $tcr2 = $mbar - 1 + 0x128 +set $tcn2 = $mbar - 1 + 0x12C +set $ter2 = $mbar - 1 + 0x131 + +end + +# +# Setup CSAR0 for the FLASH ROM. +# + +define setup-cs + +set *((short*) $csar0) = 0xffe0 +set *((int*) $csmr0) = 0x000f0000 +set *((short*) $cscr0) = 0x1da3 +set *((short*) $csar1) = 0x5000 +set *((int*) $csmr1) = 0x00000000 +set *((short*) $cscr1) = 0x3d43 +set *((short*) $csar2) = 0x3000 +set *((int*) $csmr2) = 0x000f0000 +set *((short*) $cscr2) = 0x1903 +set *((short*) $csar3) = 0x4000 +set *((int*) $csmr3) = 0x000f0000 +set *((short*) $cscr3) = 0x0083 + +end + +# +# Setup the DRAM controller. +# + +define setup-dram + +set *((short*) $dcrr) = 24 +set *((short*) $dctr) = 0x0000 +set *((short*) $dcar0) = 0x0000 +set *((long*) $dcmr0) = 0x000e0000 +set *((char*) $dccr0) = 0x07 +set *((short*) $dcar1) = 0x0000 +set *((long*) $dcmr1) = 0x00000000 +set *((char*) $dccr1) = 0x00 + +end + + +# +# Wake up the board +# + +define initboard + +addresses +setup-cs +# setup-dram + +end + +define ss +si +x/i $pc +end + +# +# Display exception information +# +define exception-info +set $excpc = *(unsigned int *)($sp+4) +set $excfmt = (*(unsigned int *)$sp >> 28) & 0x0f +set $excfs = ((*(unsigned int *)$sp >> 24) & 0x0c) | \ + ((*(unsigned int *)$sp >> 16) & 0x03) +set $excvec = (*(unsigned int *)$sp >> 18) & 0xff +set $excsr = *(unsigned int *)$sp & 0xffff + +printf "EXCEPTION -- SR:0x%X PC:0x%X FRAME:0x%X VECTOR:%d\n", \ + $excsr, $excpc, $sp, $excvec +if $excvec == 2 + printf "Access error exception" +end +if $excvec == 3 + printf "Address error exception" +end +if $excvec == 4 + printf "Illegal instruction exception" +end +if $excvec == 8 + printf "Privelege violation exception" +end +if $excvec == 9 + printf "Trace exception" +end +if $excvec == 10 + printf "Unimplemented LINE-A opcode exception" +end +if $excvec == 11 + printf "Unimplemented LINE-F opcode exception" +end +if $excvec == 12 + printf "Debug interrupt" +end +if $excvec == 14 + printf "Format error exception" +end +if $excfs == 0x04 + printf " on instruction fetch" +end +if $excfs == 0x08 + printf " on operand write" +end +if $excfs == 0x09 + printf " on write to write-protected space" +end +if $excfs == 0x0c + printf " on operand read" +end +printf "\n" +x/4i $excpc +set $pc=$excpc +set $sp=$sp+8 +end + +target bdm /dev/bdmcf0 +initboard +load +set $pc=start +set $sp=0x20001ffc +b bsp_cleanup +b _stop +b _unexp_exception +commands +silent +exception-info +end +b _unexp_int +b _reserved_int +b _spurious_int diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/startup/init5206e.c b/c/src/lib/libbsp/m68k/mcf5206elite/startup/init5206e.c new file mode 100644 index 0000000000..6e8bf5c8e4 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/startup/init5206e.c @@ -0,0 +1,254 @@ +/* + * MCF5206e hardware startup routines + * + * This is where the real hardware setup is done. A minimal stack + * has been provided by the start.S code. No normal C or RTEMS + * functions can be called from here. + * + * This initialization code based on hardware settings of dBUG + * monitor. This must be changed if you like to run it immediately + * after reset. + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * Based on work: + * Author: + * David Fiddes, D.J@fiddes.surfaid.org + * http://www.calm.hw.ac.uk/davidf/coldfire/ + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include <rtems.h> +#include <bsp.h> +#include "mcf5206/mcf5206e.h" + +#define m68k_set_cacr( _cacr ) \ + asm volatile ( "movec %0,%%cacr\n\t" \ + "nop\n" \ + : : "d" (_cacr) ) + +#define m68k_set_acr0( _acr0 ) \ + asm volatile ( "movec %0,%%acr0\n\t" \ + "nop\n\t" \ + : : "d" (_acr0) ) + +#define m68k_set_acr1( _acr1 ) \ + asm volatile ( "movec %0,%%acr1\n\t" \ + "nop\n\t" \ + : : "d" (_acr1) ) + +#define m68k_set_srambar( _rambar0 ) \ + asm volatile ( "movec %0,%%rambar0\n\t" \ + "nop\n\t" \ + : : "d" (_rambar0) ) + +#define m68k_set_mbar( _mbar ) \ + asm volatile ( "movec %0,%%mbar\n\t" \ + "nop\n\t" \ + : : "d" (_mbar) ) + +#define mcf5206e_enable_cache() \ + m68k_set_cacr( MCF5206E_CACR_CENB ) + + +#define mcf5206e_disable_cache() \ + asm volatile ( "nop\n\t" \ + "movec %0,%%cacr\n\t" \ + "nop\n\t" \ + "movec %0,%%cacr\n\t" \ + "nop\n\t" \ + : : "d" (MCF5206E_CACR_CINV) ) + +/* Init5206e -- + * Initialize MCF5206e on-chip modules + * + * PARAMETERS: + * none + * + * RETURNS: + * none + */ +void +Init5206e(void) +{ + extern void CopyDataClearBSSAndStart(unsigned long ramsize); + + /* Set Module Base Address register */ + m68k_set_mbar((MBAR & MCF5206E_MBAR_BA) | MCF5206E_MBAR_V); + + /* Set System Protection Control Register (SYPCR): + * Bus Monitor Enable, Bus Monitor Timing = 1024 clocks, + * Software watchdog disabled + */ + *MCF5206E_SYPCR(MBAR) = MCF5206E_SYPCR_BME | + MCF5206E_SYPCR_BMT_1024; + + /* Set Pin Assignment Register (PAR): + * Output Timer 0 (not DREQ) on *TOUT[0] / *DREQ[1] + * Input Timer 0 (not DREQ) on *TIN[0] / *DREQ[0] + * IRQ, not IPL + * UART2 RTS signal (not \RSTO) + * PST/DDATA (not PPIO) + * *WE (not CS/A) + */ + *MCF5206E_PAR(MBAR) = MCF5206E_PAR_PAR9_TOUT | + MCF5206E_PAR_PAR8_TIN0 | + MCF5206E_PAR_PAR7_UART2 | + MCF5206E_PAR_PAR6_IRQ | + MCF5206E_PAR_PAR5_PST | + MCF5206E_PAR_PAR4_DDATA | + MCF5206E_PAR_WE0_WE1_WE2_WE3; + + /* Set SIM Configuration Register (SIMR): + * Disable software watchdog timer and bus timeout monitor when + * internal freeze signal is asserted. + */ + *MCF5206E_SIMR(MBAR) = MCF5206E_SIMR_FRZ0 | MCF5206E_SIMR_FRZ1; + + /* Set Interrupt Mask Register: Disable all interrupts */ + *MCF5206E_IMR(MBAR) = 0xFFFF; + + /* Assign Interrupt Control Registers as it is defined in bsp.h */ + *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL1) = + (BSP_INTLVL_AVEC1 << MCF5206E_ICR_IL_S) | + (BSP_INTPRIO_AVEC1 << MCF5206E_ICR_IP_S) | + MCF5206E_ICR_AVEC; + *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL2) = + (BSP_INTLVL_AVEC2 << MCF5206E_ICR_IL_S) | + (BSP_INTPRIO_AVEC2 << MCF5206E_ICR_IP_S) | + MCF5206E_ICR_AVEC; + *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL3) = + (BSP_INTLVL_AVEC3 << MCF5206E_ICR_IL_S) | + (BSP_INTPRIO_AVEC3 << MCF5206E_ICR_IP_S) | + MCF5206E_ICR_AVEC; + *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL4) = + (BSP_INTLVL_AVEC4 << MCF5206E_ICR_IL_S) | + (BSP_INTPRIO_AVEC4 << MCF5206E_ICR_IP_S) | + MCF5206E_ICR_AVEC; + *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL5) = + (BSP_INTLVL_AVEC5 << MCF5206E_ICR_IL_S) | + (BSP_INTPRIO_AVEC5 << MCF5206E_ICR_IP_S) | + MCF5206E_ICR_AVEC; + *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL6) = + (BSP_INTLVL_AVEC6 << MCF5206E_ICR_IL_S) | + (BSP_INTPRIO_AVEC6 << MCF5206E_ICR_IP_S) | + MCF5206E_ICR_AVEC; + *MCF5206E_ICR(MBAR,MCF5206E_INTR_EXT_IPL7) = + (BSP_INTLVL_AVEC7 << MCF5206E_ICR_IL_S) | + (BSP_INTPRIO_AVEC7 << MCF5206E_ICR_IP_S) | + MCF5206E_ICR_AVEC; + *MCF5206E_ICR(MBAR,MCF5206E_INTR_TIMER_1) = + (BSP_INTLVL_TIMER1 << MCF5206E_ICR_IL_S) | + (BSP_INTPRIO_TIMER1 << MCF5206E_ICR_IP_S) | + MCF5206E_ICR_AVEC; + *MCF5206E_ICR(MBAR,MCF5206E_INTR_TIMER_2) = + (BSP_INTLVL_TIMER2 << MCF5206E_ICR_IL_S) | + (BSP_INTPRIO_TIMER2 << MCF5206E_ICR_IP_S) | + MCF5206E_ICR_AVEC; + *MCF5206E_ICR(MBAR,MCF5206E_INTR_MBUS) = + (BSP_INTLVL_MBUS << MCF5206E_ICR_IL_S) | + (BSP_INTPRIO_MBUS << MCF5206E_ICR_IP_S) | + MCF5206E_ICR_AVEC; + *MCF5206E_ICR(MBAR,MCF5206E_INTR_UART_1) = + (BSP_INTLVL_UART1 << MCF5206E_ICR_IL_S) | + (BSP_INTPRIO_UART1 << MCF5206E_ICR_IP_S); + *MCF5206E_ICR(MBAR,MCF5206E_INTR_UART_2) = + (BSP_INTLVL_UART2 << MCF5206E_ICR_IL_S) | + (BSP_INTPRIO_UART2 << MCF5206E_ICR_IP_S); + *MCF5206E_ICR(MBAR,MCF5206E_INTR_DMA_0) = + (BSP_INTLVL_DMA0 << MCF5206E_ICR_IL_S) | + (BSP_INTPRIO_DMA0 << MCF5206E_ICR_IP_S) | + MCF5206E_ICR_AVEC; + *MCF5206E_ICR(MBAR,MCF5206E_INTR_DMA_1) = + (BSP_INTLVL_DMA1 << MCF5206E_ICR_IL_S) | + (BSP_INTPRIO_DMA1 << MCF5206E_ICR_IP_S) | + MCF5206E_ICR_AVEC; + + /* Software Watchdog timer (not used now) */ + *MCF5206E_SWIVR(MBAR) = 0x0F; /* Uninitialized interrupt */ + *MCF5206E_SWSR(MBAR) = MCF5206E_SWSR_KEY1; + *MCF5206E_SWSR(MBAR) = MCF5206E_SWSR_KEY2; + + /* Configuring Chip Selects */ + /* CS2: SRAM memory */ + *MCF5206E_CSAR(MBAR,2) = BSP_MEM_ADDR_ESRAM >> 16; + *MCF5206E_CSMR(MBAR,2) = BSP_MEM_MASK_ESRAM; + *MCF5206E_CSCR(MBAR,2) = MCF5206E_CSCR_WS1 | + MCF5206E_CSCR_PS_32 | + MCF5206E_CSCR_AA | + MCF5206E_CSCR_EMAA | + MCF5206E_CSCR_WR | + MCF5206E_CSCR_RD; + + /* CS3: GPIO on eLITE board */ + *MCF5206E_CSAR(MBAR,3) = BSP_MEM_ADDR_GPIO >> 16; + *MCF5206E_CSMR(MBAR,3) = BSP_MEM_MASK_GPIO; + *MCF5206E_CSCR(MBAR,3) = MCF5206E_CSCR_WS15 | + MCF5206E_CSCR_PS_16 | + MCF5206E_CSCR_AA | + MCF5206E_CSCR_EMAA | + MCF5206E_CSCR_WR | + MCF5206E_CSCR_RD; + + { + extern void INTERRUPT_VECTOR(); + rtems_unsigned32 *inttab = (rtems_unsigned32 *)&INTERRUPT_VECTOR; + rtems_unsigned32 *intvec = (rtems_unsigned32 *)BSP_MEM_ADDR_ESRAM; + register int i; + for (i = 0; i < 256; i++) + { + *(intvec++) = *(inttab++); + } + } + m68k_set_vbr(BSP_MEM_ADDR_ESRAM); + + /* CS0: Flash EEPROM */ + *MCF5206E_CSAR(MBAR,0) = BSP_MEM_ADDR_FLASH >> 16; + *MCF5206E_CSCR(MBAR,0) = MCF5206E_CSCR_WS3 | + MCF5206E_CSCR_AA | + MCF5206E_CSCR_PS_16 | + MCF5206E_CSCR_EMAA | + MCF5206E_CSCR_WR | + MCF5206E_CSCR_RD; + *MCF5206E_CSMR(MBAR,0) = BSP_MEM_MASK_FLASH; + + /* + * Invalidate the cache and disable it + */ + mcf5206e_disable_cache(); + + /* + * Setup ACRs so that if cache turned on, periphal accesses + * are not messed up. (Non-cacheable, serialized) + */ + m68k_set_acr0 ( 0 + | MCF5206E_ACR_BASE(BSP_MEM_ADDR_ESRAM) + | MCF5206E_ACR_MASK(BSP_MEM_MASK_ESRAM) + | MCF5206E_ACR_EN + | MCF5206E_ACR_SM_ANY + ); + m68k_set_acr1 ( 0 + | MCF5206E_ACR_BASE(BSP_MEM_ADDR_FLASH) + | MCF5206E_ACR_MASK(BSP_MEM_MASK_FLASH) + | MCF5206E_ACR_EN + | MCF5206E_ACR_SM_ANY + ); + + mcf5206e_enable_cache(); + + /* + * Copy data, clear BSS, switch stacks and call boot_card() + */ + CopyDataClearBSSAndStart (BSP_MEM_SIZE_ESRAM - 0x400); +} diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/startup/linkcmds b/c/src/lib/libbsp/m68k/mcf5206elite/startup/linkcmds new file mode 100644 index 0000000000..9b6fc18158 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/startup/linkcmds @@ -0,0 +1,169 @@ +/* + * This file contains GNU linker directives for an MCF5206eLITE + * evaluation board. + * + * Variations in memory size and allocation can be made by + * overriding some values with linker command-line arguments. + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * This file based on work: + * David Fiddes, D.J.Fiddes@hw.ac.uk + * http://www.calm.hw.ac.uk/davidf/coldfire/ + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +/* + * Declare some sizes. + * XXX: The assignment of ". += XyzSize;" fails in older gld's if the + * number used there is not constant. If this happens to you, edit + * the lines marked XXX below to use a constant value. + */ +/* + * Declare size of heap. + * A heap size of 0 means "Use all available memory for the heap". + * Initial stack located in on-chip SRAM and not declared there. + */ +_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0; + +/* + * Declare system clock frequency. + */ +_SYS_CLOCK_FREQUENCY = DEFINED(_SYS_CLOCK_FREQUENCY) ? _SYS_CLOCK_FREQUENCY : 54000000; + +/* + * Setup the memory map of the MCF5206eLITE evaluation board + * + * The "rom" section is in USER Flash on the board + * The "ram" section is placed in USER RAM starting at 10000h + * + */ +MEMORY +{ + ram : ORIGIN = 0x30000000, LENGTH = 0x00100000 + rom : ORIGIN = 0xFFE20000, LENGTH = 128k +} + +MBase = 0x10000000; + +/* Interrupt Vector table located at start of external static RAM */ +_VBR = 0x30000000; + +SECTIONS +{ + + /* + * Dynamic RAM + */ + ram : { + _RamBase = .; + __RamBase = .; + /* Reserve space for interrupt table */ + . += 0x400; + } >ram + + /* + * Text, data and bss segments + */ + .text : { + CREATE_OBJECT_SYMBOLS + *(.text) + + /* + * C++ constructors/destructors + */ + *(.gnu.linkonce.t.*) + + /* + * Initialization and finalization code. + */ + . = ALIGN (16); + PROVIDE (_init = .); + *crti.o(.init) + *(.init) + *crtn.o(.init) + . = ALIGN (16); + PROVIDE (_fini = .); + *crti.o(.fini) + *(.fini) + *crtn.o(.fini) + + /* + * C++ constructors/destructors + */ + . = ALIGN (16); + *crtbegin.o(.ctors) + *(.ctors) + *crtend.o(.ctors) + *crtbegin.o(.dtors) + *(.dtors) + *crtend.o(.dtors) + + /* + * Exception frame info + */ + . = ALIGN (16); + *(.eh_frame) + + /* + * Read-only data + */ + . = ALIGN (16); + _rodata_start = . ; + *(.rodata) + *(.gnu.linkonce.r*) + + . = ALIGN (16); + PROVIDE (etext = .); + + } > ram + + .data BLOCK (0x4) : { + copy_start = .; + *(.shdata) + . = ALIGN (0x10); + *(.data) + . = ALIGN (0x10); + *(.gcc_exc) + *(.gcc_except_table) + . = ALIGN (0x10); + *(.gnu.linkonce.d*) + . = ALIGN (0x10); + _edata = .; + copy_end = .; + } > ram + + .bss BLOCK (0x4) : + { + clear_start = . ; + *(.shbss) + *(.bss) + *(COMMON) + . = ALIGN(0x10); + _end = .; + + clear_end = .; + + _WorkspaceBase = .; + __WorkspaceBase = .; + + } > ram + + .stab 0 (NOLOAD) : + { + *(.stab) + } + + .stabstr 0 (NOLOAD) : + { + *(.stabstr) + } + +} diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/startup/linkcmds.flash b/c/src/lib/libbsp/m68k/mcf5206elite/startup/linkcmds.flash new file mode 100644 index 0000000000..5eec4dde83 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/startup/linkcmds.flash @@ -0,0 +1,174 @@ +/* + * This file contains GNU linker directives for an MCF5206eLITE + * evaluation board. + * + * Variations in memory size and allocation can be made by + * overriding some values with linker command-line arguments. + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * This file based on work: + * David Fiddes, D.J.Fiddes@hw.ac.uk + * http://www.calm.hw.ac.uk/davidf/coldfire/ + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +/* + * Declare some sizes. + * XXX: The assignment of ". += XyzSize;" fails in older gld's if the + * number used there is not constant. If this happens to you, edit + * the lines marked XXX below to use a constant value. + */ +/* + * Declare size of heap. + * A heap size of 0 means "Use all available memory for the heap". + * Initial stack located in on-chip SRAM and not declared there. + */ +_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0; + +/* + * Declare system clock frequency. + */ +_SYS_CLOCK_FREQUENCY = DEFINED(_SYS_CLOCK_FREQUENCY) ? _SYS_CLOCK_FREQUENCY : 54000000; + +/* + * Setup the memory map of the MCF5206eLITE evaluation board + * + * The "rom" section is in USER Flash on the board + * The "ram" section is placed in USER RAM starting at 10000h + * + */ +MEMORY +{ + ram : ORIGIN = 0x30000000, LENGTH = 0x00100000 + rom : ORIGIN = 0xFFE00000, LENGTH = 0x00100000 +} + +MBase = 0x10000000; + +/* Interrupt Vector table located at start of external static RAM */ +_VBR = 0x30000000; + +SECTIONS +{ + /* + * Flash ROM + */ + rom : { + _RomBase = .; + } >rom + + /* + * Dynamic RAM + */ + ram : { + _RamBase = .; + __RamBase = .; + } >ram + + /* + * Text, data and bss segments + */ + .text : AT(0x30020000) { + CREATE_OBJECT_SYMBOLS + *(.text) + + /* + * C++ constructors/destructors + */ + *(.gnu.linkonce.t.*) + + /* + * Initialization and finalization code. + */ + . = ALIGN (16); + PROVIDE (_init = .); + *crti.o(.init) + *(.init) + *crtn.o(.init) + . = ALIGN (16); + PROVIDE (_fini = .); + *crti.o(.fini) + *(.fini) + *crtn.o(.fini) + + /* + * C++ constructors/destructors + */ + . = ALIGN (16); + *crtbegin.o(.ctors) + *(.ctors) + *crtend.o(.ctors) + *crtbegin.o(.dtors) + *(.dtors) + *crtend.o(.dtors) + + /* + * Exception frame info + */ + . = ALIGN (16); + *(.eh_frame) + + /* + * Read-only data + */ + . = ALIGN (16); + _rodata_start = . ; + *(.rodata) + *(.gnu.linkonce.r*) + + . = ALIGN (16); + PROVIDE (etext = .); + + } >rom + + .data 0x30000400 : AT(LOADADDR(.text) + SIZEOF(.text)) { + copy_start = .; + . = ALIGN (0x10); + *(.shdata) + . = ALIGN (0x10); + *(.data) + . = ALIGN (0x10); + *(.gcc_exc) + *(.gcc_except_table) + . = ALIGN (0x10); + *(.gnu.linkonce.d*) + . = ALIGN (0x10); + _edata = .; + copy_end = .; + } >ram + + .bss BLOCK (0x4) : + { + clear_start = . ; + *(.shbss) + *(.bss) + *(COMMON) + . = ALIGN(0x10); + _end = .; + + clear_end = .; + + _WorkspaceBase = .; + __WorkspaceBase = .; + + } > ram + + .stab 0 (NOLOAD) : + { + *(.stab) + } + + .stabstr 0 (NOLOAD) : + { + *(.stabstr) + } + +} diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/times b/c/src/lib/libbsp/m68k/mcf5206elite/times new file mode 100644 index 0000000000..8be4f0e0fc --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/times @@ -0,0 +1,145 @@ +rtems_semaphore_create 29 +rtems_semaphore_delete 26 +rtems_semaphore_obtain: available 7 +rtems_semaphore_obtain: not available -- NO_WAIT 7 +rtems_semaphore_release: no waiting tasks 15 +rtems_semaphore_obtain: not available -- caller blocks 39 +rtems_semaphore_release: task readied -- preempts caller 29 +rtems_semaphore_release: task readied -- returns to caller 18 +rtems_semaphore_ident 121 + +rtems_task_restart: blocked task -- preempts caller 67 +rtems_task_restart: ready task -- preempts caller 65 +rtems_task_create 119 +rtems_task_start 23 +rtems_task_restart: suspended task -- returns to caller 31 +rtems_task_delete: suspended task 63 +rtems_task_restart: ready task -- returns to caller 33 +rtems_task_restart: blocked task -- returns to caller 46 +rtems_task_delete: blocked task 64 +rtems_task_suspend: calling task 27 +rtems_task_resume: task readied -- preempts caller 23 +rtems_task_restart: calling task 36 +rtems_task_suspend: returns to caller 12 +rtems_task_resume: task readied -- returns to caller 12 +rtems_task_delete: ready task 67 +rtems_task_restart: suspended task -- preempts caller 45 +rtems_task_set_priority: obtain current priority 8 +rtems_task_set_priority: returns to caller 22 +rtems_task_mode: obtain current mode 4 +rtems_task_mode: no reschedule 5 +rtems_task_mode: reschedule -- returns to caller 11 +rtems_task_mode: reschedule -- preempts caller 27 +rtems_task_set_note 9 +rtems_task_get_note 10 +rtems_task_set_priority: preempts caller 36 +rtems_task_delete: calling task 92 +rtems_task_ident 115 +rtems_task_wake_when 42 +rtems_task_wake_after: yield -- returns to caller 6 +rtems_task_wake_after: yields -- preempts caller 23 + +rtems_clock_set 26 +rtems_clock_get 1 + +rtems_message_queue_create 83 +rtems_message_queue_send: no waiting tasks 23 +rtems_message_queue_urgent: no waiting tasks 23 +rtems_message_queue_receive: available 21 +rtems_message_queue_flush: no messages flushed 9 +rtems_message_queue_flush: messages flushed 13 +rtems_message_queue_delete 34 +rtems_message_queue_receive: not available -- NO_WAIT 13 +rtems_message_queue_receive: not available -- caller blocks 42 +rtems_message_queue_send: task readied -- preempts caller 36 +rtems_message_queue_send: task readied -- returns to caller 26 +rtems_message_queue_urgent: task readied -- preempts caller 36 +rtems_message_queue_urgent: task readied -- returns to caller 24 +rtems_message_queue_ident 112 +rtems_message_queue_broadcast: task readied -- returns to caller 35 +rtems_message_queue_broadcast: no waiting tasks 14 +rtems_message_queue_broadcast: task readied -- preempts caller 45 + +rtems_event_receive: obtain current events 1 +rtems_event_receive: not available -- NO_WAIT 9 +rtems_event_receive: not available -- caller blocks 31 +rtems_event_send: no task readied 10 +rtems_event_receive: available 12 +rtems_event_send: task readied -- returns to caller 17 +rtems_event_send: task readied -- preempts caller 31 + +rtems_signal_catch 6 +rtems_signal_send: returns to caller 15 +rtems_signal_send: signal to self 22 +exit ASR overhead: returns to calling task 16 +exit ASR overhead: returns to preempting task 21 + +rtems_partition_create 36 +rtems_partition_get_buffer: available 14 +rtems_partition_get_buffer: not available 11 +rtems_partition_return_buffer 27 +rtems_partition_delete 18 +rtems_partition_ident 112 + +rtems_region_create 30 +rtems_region_get_segment: available 24 +rtems_region_get_segment: not available -- NO_WAIT 27 +rtems_region_return_segment: no waiting tasks 17 +rtems_region_get_segment: not available -- caller blocks 62 +rtems_region_return_segment: task readied -- preempts caller 66 +rtems_region_return_segment: task readied -- returns to caller 46 +rtems_region_delete 18 +rtems_region_ident 114 + +rtems_io_initialize 3 +rtems_io_open 2 +rtems_io_close 2 +rtems_io_read 2 +rtems_io_write 2 +rtems_io_control 2 + +rtems_timer_create 10 +rtems_timer_fire_after: inactive 19 +rtems_timer_fire_after: active 21 +rtems_timer_cancel: active 10 +rtems_timer_cancel: inactive 8 +rtems_timer_reset: inactive 18 +rtems_timer_reset: active 19 +rtems_timer_fire_when: inactive 24 +rtems_timer_fire_when: active 24 +rtems_timer_delete: active 15 +rtems_timer_delete: inactive 14 +rtems_timer_ident 112 + +rtems_clock_tick 9 + +context switch: no floating point contexts 13 +context switch: self 3 +context switch: to another task 4 +fp context switch: restore 1st FP task 13 +fp context switch: save idle, restore initialized 6 +fp context switch: save idle, restore idle 14 +fp context switch: save initialized, restore initialized 5 + +interrupt entry overhead: returns to interrupted task 4 +interrupt exit overhead: returns to interrupted task 3 +interrupt entry overhead: returns to nested interrupt 2 +interrupt exit overhead: returns to nested interrupt 2 +interrupt entry overhead: returns to preempting task 4 +interrupt exit overhead: returns to preempting task 23 + +rtems_port_create 16 +rtems_port_external_to_internal 7 +rtems_port_internal_to_external 9 +rtems_port_delete 18 +rtems_port_ident 112 + +rtems_rate_monotonic_create 18 +rtems_rate_monotonic_period: initiate period -- returns to caller 27 +rtems_rate_monotonic_period: obtain status 13 +rtems_rate_monotonic_cancel 18 +rtems_rate_monotonic_delete: inactive 22 +rtems_rate_monotonic_delete: active 22 +rtems_rate_monotonic_period: conclude periods -- caller blocks 25 +rtems_rate_monotonic_ident 112 + diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/tod/.cvsignore b/c/src/lib/libbsp/m68k/mcf5206elite/tod/.cvsignore new file mode 100644 index 0000000000..282522db03 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/tod/.cvsignore @@ -0,0 +1,2 @@ +Makefile +Makefile.in diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/tod/ds1307.c b/c/src/lib/libbsp/m68k/mcf5206elite/tod/ds1307.c new file mode 100644 index 0000000000..ae1cdf10d6 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/tod/ds1307.c @@ -0,0 +1,217 @@ +/* + * This file interfaces with the real-time clock found in a + * Dallas Semiconductor DS1307/DS1308 serial real-time clock chip. + * This RTC have I2C bus interface. BSP have to provide I2C bus primitives + * to make this driver working. getRegister and setRegister primitives is + * not used here to avoid multiple transactions over I2C bus (each transaction + * require significant time and error when date/time information red may + * occurs). ulControlPort contains I2C bus number; ulDataPort contains + * RTC I2C device address. + * + * Year 2000 Note: + * + * This chip only uses a two digit field to store the year. This code + * uses the RTEMS Epoch as a pivot year. This lets us map the two digit + * year field as follows: + * + * + two digit years 00-87 are mapped to 2000-2087 + * + two digit years 88-99 are mapped to 1988-1999 + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * @(#) $Id$ + */ + +#include <rtems.h> +#include <libchip/rtc.h> +#include "ds1307.h" +#include "i2c.h" + +/* Convert from/to Binary-Coded Decimal representation */ +#define From_BCD( _x ) ((((_x) >> 4) * 10) + ((_x) & 0x0F)) +#define To_BCD( _x ) ((((_x) / 10) << 4) + ((_x) % 10)) + +/* ds1307_initialize -- + * Initialize DS1307 real-time clock chip. If RTC is halted, this + * function resume counting. + * + * PARAMETERS: + * minor -- minor RTC device number + */ +void +ds1307_initialize(int minor) +{ + i2c_message_status status; + int try; + rtems_unsigned8 sec; + i2c_bus_number bus; + i2c_address addr; + + bus = RTC_Table[minor].ulCtrlPort1; + addr = RTC_Table[minor].ulDataPort; + + /* Read SECONDS register */ + try = 0; + do { + status = i2c_wbrd(bus, addr, 0, &sec, sizeof(sec)); + try++; + } while ((status != I2C_SUCCESSFUL) && (try < 15)); + + /* If clock is halted, reset and start the clock */ + if ((sec & DS1307_SECOND_HALT) != 0) + { + rtems_unsigned8 start[8]; + memset(start, 0, sizeof(start)); + start[0] = DS1307_SECOND; + try = 0; + do { + status = i2c_write(bus, addr, start, 2); + } while ((status != I2C_SUCCESSFUL) && (try < 15)); + } +} + +/* ds1307_get_time -- + * read current time from DS1307 real-time clock chip and convert it + * to the rtems_time_of_day structure. + * + * PARAMETERS: + * minor -- minor RTC device number + * time -- place to put return value (date and time) + * + * RETURNS: + * 0, if time obtained successfully + * -1, if error occured + */ +int +ds1307_get_time(int minor, rtems_time_of_day *time) +{ + i2c_bus_number bus; + i2c_address addr; + rtems_unsigned8 info[8]; + rtems_unsigned32 v1, v2; + i2c_message_status status; + int try; + + if (time == NULL) + return -1; + + bus = RTC_Table[minor].ulCtrlPort1; + addr = RTC_Table[minor].ulDataPort; + + memset(time, 0, sizeof(rtems_time_of_day)); + try = 0; + do { + status = i2c_wbrd(bus, addr, 0, info, sizeof(info)); + try++; + } while ((status != I2C_SUCCESSFUL) && (try < 10)); + + if (status != I2C_SUCCESSFUL) + { + return -1; + } + + v1 = info[DS1307_YEAR]; + v2 = From_BCD(v1); + if (v2 < 88) + time->year = 2000 + v2; + else + time->year = 1900 + v2; + + v1 = info[DS1307_MONTH] & ~0xE0; + time->month = From_BCD(v1); + + v1 = info[DS1307_DAY] & ~0xC0; + time->day = From_BCD(v1); + + v1 = info[DS1307_HOUR]; + if (v1 & DS1307_HOUR_12) + { + v2 = v1 & ~0xE0; + if (v1 & DS1307_HOUR_PM) + { + time->hour = From_BCD(v2) + 12; + } + else + { + time->hour = From_BCD(v2); + } + } + else + { + v2 = v1 & ~0xC0; + time->hour = From_BCD(v2); + } + + v1 = info[DS1307_MINUTE] & ~0x80; + time->minute = From_BCD(v1); + + v1 = info[DS1307_SECOND]; + v2 = v1 & ~0x80; + time->second = From_BCD(v2); + + return 0; +} + +/* ds1307_set_time -- + * set time to the DS1307 real-time clock chip + * + * PARAMETERS: + * minor -- minor RTC device number + * time -- new date and time to be written to DS1307 + * + * RETURNS: + * 0, if time obtained successfully + * -1, if error occured + */ +int +ds1307_set_time(int minor, rtems_time_of_day *time) +{ + i2c_bus_number bus; + i2c_address addr; + rtems_unsigned8 info[8]; + i2c_message_status status; + int try; + + if (time == NULL) + return -1; + + bus = RTC_Table[minor].ulCtrlPort1; + addr = RTC_Table[minor].ulDataPort; + + if (time->year >= 2088) + rtems_fatal_error_occurred(RTEMS_INVALID_NUMBER); + + info[0] = DS1307_SECOND; + info[1 + DS1307_YEAR] = To_BCD(time->year % 100); + info[1 + DS1307_MONTH] = To_BCD(time->month); + info[1 + DS1307_DAY] = To_BCD(time->day); + info[1 + DS1307_HOUR] = To_BCD(time->hour); + info[1 + DS1307_MINUTE] = To_BCD(time->minute); + info[1 + DS1307_SECOND] = To_BCD(time->second); + info[1 + DS1307_DAY_OF_WEEK] = 1; /* Do not set day of week */ + + try = 0; + do { + status = i2c_write(bus, addr, info, 8); + try++; + } while ((status != I2C_SUCCESSFUL) && (try < 10)); + + if (status != I2C_SUCCESSFUL) + return -1; + else + return 0; +} + +/* Driver function table */ + +rtc_fns ds1307_fns = { + ds1307_initialize, + ds1307_get_time, + ds1307_set_time +}; diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/tod/todcfg.c b/c/src/lib/libbsp/m68k/mcf5206elite/tod/todcfg.c new file mode 100644 index 0000000000..ec063877f0 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/tod/todcfg.c @@ -0,0 +1,84 @@ +/* + * This file contains the RTC driver table for Motorola MCF5206eLITE + * ColdFire evaluation board. + * + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov <vvv@oktet.ru> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * + * http://www.OARcorp.com/rtems/license.html. + * + * @(#) $Id$ + */ + +#include <bsp.h> +#include <libchip/rtc.h> +#include <ds1307.h> + +/* Forward function declaration */ +boolean mcf5206elite_ds1307_probe(int minor); + +extern rtc_fns ds1307_fns; + +/* The following table configures the RTC drivers used in this BSP */ +rtc_tbl RTC_Table[] = { + { + "/dev/rtc", /* sDeviceName */ + RTC_CUSTOM, /* deviceType */ + &ds1307_fns, /* pDeviceFns */ + mcf5206elite_ds1307_probe, /* deviceProbe */ + NULL, /* pDeviceParams */ + 0x00, /* ulCtrlPort1, for DS1307-I2C bus number */ + DS1307_I2C_ADDRESS, /* ulDataPort, for DS1307-I2C device addr */ + NULL, /* getRegister - not applicable to DS1307 */ + NULL /* setRegister - not applicable to DS1307 */ + } +}; + +/* Some information used by the RTC driver */ + +#define NUM_RTCS (sizeof(RTC_Table)/sizeof(rtc_tbl)) + +unsigned long RTC_Count = NUM_RTCS; + +rtems_device_minor_number RTC_Minor; + +/* mcf5206elite_ds1307_probe -- + * RTC presence probe function. Return TRUE, if device is present. + * Device presence checked by probe access to RTC device over I2C bus. + * + * PARAMETERS: + * minor - minor RTC device number + * + * RETURNS: + * TRUE, if RTC device is present + */ +boolean +mcf5206elite_ds1307_probe(int minor) +{ + int try = 0; + i2c_message_status status; + rtc_tbl *rtc; + i2c_bus_number bus; + i2c_address addr; + + if (minor >= NUM_RTCS) + return FALSE; + + rtc = RTC_Table + minor; + + bus = rtc->ulCtrlPort1; + addr = rtc->ulDataPort; + do { + status = i2c_wrbyte(bus, addr, 0); + if (status == I2C_NO_DEVICE) + return FALSE; + try++; + } while ((try < 15) && (status != I2C_SUCCESSFUL)); + if (status == I2C_SUCCESSFUL) + return TRUE; + else + return FALSE; +} diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/tools/.cvsignore b/c/src/lib/libbsp/m68k/mcf5206elite/tools/.cvsignore new file mode 100644 index 0000000000..d29e5050f5 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/tools/.cvsignore @@ -0,0 +1,14 @@ +Makefile +Makefile.in +aclocal.m4 +autom4te.cache +config.cache +config.guess +config.log +config.status +config.sub +configure +depcomp +install-sh +missing +mkinstalldirs diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/tools/changes b/c/src/lib/libbsp/m68k/mcf5206elite/tools/changes new file mode 100644 index 0000000000..93a23dafc0 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/tools/changes @@ -0,0 +1,6 @@ +2001-10-26 Ralf Corsepius <corsepiu@faw.uni-ulm.de> + + * .cvsignore: Add autom4te.cache for autoconf > 2.52. + * configure.in: Remove. + * configure.ac: New file, generated from configure.in by autoupdate. + diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/tools/configure.ac b/c/src/lib/libbsp/m68k/mcf5206elite/tools/configure.ac new file mode 100644 index 0000000000..c8fdb97691 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/tools/configure.ac @@ -0,0 +1,21 @@ +## Process this file with autoconf to produce a configure script. +## +## $Id$ + +AC_PREREQ(2.52) +AC_INIT +AC_CONFIG_SRCDIR([runtest]) +RTEMS_TOP(../../../../../../..) +AC_CONFIG_AUX_DIR(../../../../../../..) + +RTEMS_CANONICAL_TARGET_CPU + +AM_INIT_AUTOMAKE(rtems-c-src-lib-libbsp-m68k-mcf5206elite-tools,$RTEMS_VERSION,no) +AM_MAINTAINER_MODE + +RTEMS_PROJECT_ROOT +RTEMS_TOOLPATHS + +# Explicitly list all Makefiles here +AC_CONFIG_FILES([Makefile]) +AC_OUTPUT diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/tools/runtest b/c/src/lib/libbsp/m68k/mcf5206elite/tools/runtest new file mode 100644 index 0000000000..290bfdf143 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/tools/runtest @@ -0,0 +1,353 @@ +#! /bin/sh -p +# +# Run rtems tests on the Motorola MCF5206eLITE Coldfire Evaluation board +# using gdb configured with P&E Micro Background Debug Mode debugging +# interface. +# +# This program generates a gdb script to run each test, intercept +# serial port output and put log into output file. +# +# Author: Victor V. Vengerov <vvv@oktet.ru> +# Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia +# +# Partially based on runtest script for powerpc psim. +# +# COPYRIGHT (c) 1989-1999. +# On-Line Applications Research Corporation (OAR). +# +# The license and distribution terms for this file may be +# found in found in the file LICENSE in this distribution or at +# http://www.OARcorp.com/rtems/license.html. +# +# @(#) $Id$ +# + +# progname=`basename $0` +progname=${0##*/} # fast basename hack for ksh, bash + +USAGE=\ +"usage: $progname [ -opts ] test [ test ... ] + -s ttydevice -- specify serial device to be used to capture test + output + -r baud -- set serial port baud rate (19200 by default) + -b bdmdevice -- specify BDM device to be used to control the target + -g gdbname -- specify name of gdb program to be used + -v -- verbose output + -d -- don't remove temporary files (for debugging only) + -i -- use interrupt driven console I/O when test is running + (many tests failed when interrupt driven console + input/output is used due undetermenistic tests + behaviour) + -p -- use termios poll console I/O + -l logdir -- specify log directory (default is 'logdir') + + Specify test as 'test' or 'test.exe'. + All multiprocessing tests *must* be specified simply as 'mp01', etc. +" + +# export everything +set -a + +# log an error to stderr +prerr() +{ + echo "$*" >&2 +} + +fatal() { + [ "$1" ] && prerr $* + prerr "$USAGE" + exit 1 +} + +warn() { + [ "$1" ] && prerr $* +} + +# run at normal and signalled exit +test_exit() +{ + exit_code=$1 + + rm -f ${logfile}.tmp* + [ "$gdb_pid" ] && kill -9 $gdb_pid + [ "$serial_pid" ] && kill -9 $serial_pid + + exit $exit_code +} + +# +# process the options +# +# defaults for getopt vars +# +# max_run_time is defaulted to 5 minutes +# + +verbose="" +serial_device=/dev/ttyS0 +bdm_device=/dev/bdmcf0 +gdbprog=true +for i in rtems bdm-rtems bdm bdm-elf bdm-coff ; do + if m68k-$i-gdb --version > /dev/null 2>&1 ; then + gdbprog=m68k-$i-gdb ; + break ; + fi +done +logdir=log +max_run_time=$((5 * 60)) +sizeof_ram=$((1 * 1024 * 1024)) +debugging="no" +baudrate="19200" +console_mode=0 + +while getopts vdips:r:b:l: OPT +do + case "$OPT" in + v) + verbose="yes";; + d) + debugging="yes";; + s) + serial_device="$OPTARG";; + r) + baudrate="$OPTARG";; + b) + bdm_device="$OPTARG";; + l) + logdir="$OPTARG";; + s) + gdbprog="$OPTARG";; + p) + console_mode=1;; + i) + console_mode=2;; + *) + fatal;; + esac +done + +let $((shiftcount = $OPTIND - 1)) +shift $shiftcount + +args=$* + +# +# Run the tests +# + +tests="$args" +if [ ! "$tests" ] +then + set -- `echo *.exe` + tests="$*" +fi + +[ -d $logdir ] || + mkdir $logdir || fatal "could not create log directory ($logdir)" + +# where the tmp files go +trap "test_exit" 1 2 3 13 14 15 + +for tfile in $tests +do + + tname=`basename $tfile .exe` + cpus="1" + TEST_TYPE="single" + + case "$tname" in + # size is no longer interactive. + monitor* | termios*) + warn "Skipping $tname; it is interactive" + continue + ;; + *-node2*) + warn "Skipping $tname; 'runtest' runs both nodes when for *-node1" + continue + ;; + *-node1*) + warn "Running both nodes associated with $tname" + tname=`echo $tname | sed 's/-node.*//'` + TEST_TYPE="mp" + ;; + minimum*|stackchk*|spfatal*|malloctest*) + continue + ;; + esac + + if [ "$TEST_TYPE" = "mp" ] ; then + fatal "MP tests not supported for this board" + fi + + if [ $TEST_TYPE = "single" ] ; then + logfile=$logdir/${tname} + infofile=${logfile}.info + scriptfile=${logfile}.ss + gdblogfile=${logfile}.gdb + + rm -f ${logfile}.tmp* + + date=`date` + echo "Starting $tname at $date" + + # Set serial port parameters + if ! stty -F ${serial_device} raw cs8 -cstopb cread crtscts \ + ispeed ${baudrate} ospeed ${baudrate} \ + > /dev/null 2> /dev/null ; then + fatal "Serial port couldn't be configured" + fi + + # Flush serial port + cat ${serial_device} > /dev/null & + serial_pid=$! + sleep 1s + kill ${serial_pid} + + # Capture serial port + cat ${serial_device} > $logfile & + serial_pid=$! + + cat > "${scriptfile}" <<EOF +target bdm $bdm_device +set \$mbar = 0x10000001 +set \$csar0 = \$mbar - 1 + 0x064 +set \$csmr0 = \$mbar - 1 + 0x068 +set \$cscr0 = \$mbar - 1 + 0x06E +set \$csar1 = \$mbar - 1 + 0x070 +set \$csmr1 = \$mbar - 1 + 0x074 +set \$cscr1 = \$mbar - 1 + 0x07A +set \$csar2 = \$mbar - 1 + 0x07C +set \$csmr2 = \$mbar - 1 + 0x080 +set \$cscr2 = \$mbar - 1 + 0x086 +set \$csar3 = \$mbar - 1 + 0x088 +set \$csmr3 = \$mbar - 1 + 0x08C +set \$cscr3 = \$mbar - 1 + 0x092 +set \$csar4 = \$mbar - 1 + 0x094 +set \$csmr4 = \$mbar - 1 + 0x098 +set \$cscr4 = \$mbar - 1 + 0x09E +set \$csar5 = \$mbar - 1 + 0x0A0 +set \$csmr5 = \$mbar - 1 + 0x0A4 +set \$cscr5 = \$mbar - 1 + 0x0AA +set \$csar6 = \$mbar - 1 + 0x0AC +set \$csmr6 = \$mbar - 1 + 0x0B0 +set \$cscr6 = \$mbar - 1 + 0x0B6 +set \$csar7 = \$mbar - 1 + 0x0B8 +set \$csmr7 = \$mbar - 1 + 0x0BC +set \$cscr7 = \$mbar - 1 + 0x0C2 +# +set *((short*) \$csar0) = 0xffe0 +set *((int*) \$csmr0) = 0x000f0000 +set *((short*) \$cscr0) = 0x1da3 +set *((short*) \$csar1) = 0x5000 +set *((int*) \$csmr1) = 0x00000000 +set *((short*) \$cscr1) = 0x3d43 +set *((short*) \$csar2) = 0x3000 +set *((int*) \$csmr2) = 0x000f0000 +set *((short*) \$cscr2) = 0x1903 +set *((short*) \$csar3) = 0x4000 +set *((int*) \$csmr3) = 0x000f0000 +set *((short*) \$cscr3) = 0x0083 +# +load +# Many tests not working properly when interrupt driven console I/O is used. +set console_mode=$console_mode +set \$pc=start +set \$sp=0x20001ffc +# +break bsp_cleanup +commands +shell kill $serial_pid +quit +end +# +break _stop +commands +shell kill $serial_pid +quit 1 +end +# +continue +quit 2 +EOF + ${gdbprog} -x "${scriptfile}" "${tfile}" > "${gdblogfile}" 2>&1 & + gdb_pid=$! + { + time_run=0 + while [ $time_run -lt $max_run_time ] ; do + sleep 10s + if kill -0 $gdb_pid 2> /dev/null ; then + time_run=$((time_run+10)) ; + else + exit 0 + fi + done + kill -2 $serial_pid 2> /dev/null + kill -2 $gdb_pid 2> /dev/null + { + sleep 5s ; + if kill -0 $gdb_pid 2> /dev/null ; then + kill -9 $gdb_pid 2> /dev/null ; + fi + if kill -0 $serial_pid 2> /dev/null ; then + kill -9 $serial_pid 2> /dev/null ; + fi + } & + } & + wait $gdb_pid + gdb_status=$? + { + if kill -0 $serial_pid 2> /dev/null ; then + kill $serial_pid 2> /dev/null ; + fi + sleep 5s ; + if kill -0 $serial_pid 2> /dev/null ; then + kill -9 $serial_pid 2> /dev/null ; + fi + } & + if [ $gdb_status -ge 128 ] ; then + ran_too_long="yes" ; + else + ran_too_long="no" + fi + if [ $gdb_status -ne 0 ] ; then + test_failed="yes" ; + else + test_failed="no" + fi + gdb_pid="" + serial_pid="" + fi + + # Create the info files + { + echo "$date" + echo "Test run on: `uname -n`" + echo "Host Information:" + echo `uname -a` + echo + echo "Serial port: ${serial_device}" + echo "Baud rate: ${baudrate}" + echo "BDM port: ${bdm_device}" + echo "gdb: `type -path ${gdbprog}`" + + cat ${logfile} + + if [ "$test_failed" = "yes" ] ; then + echo -e "\\n\\nTest did not finish normally" + if [ "$ran_too_long" = "yes" ] ; then + echo "Test killed after $max_run_time seconds" + fi + fi + + echo + date; + } > ${infofile} + if [ "${debugging}" = "no" ] ; then + rm -f ${scriptfile} + rm -f ${gdblogfile} + fi +done + +echo "Tests completed at " `date` +test_exit 0 diff --git a/c/src/lib/libbsp/m68k/mcf5206elite/wrapup/.cvsignore b/c/src/lib/libbsp/m68k/mcf5206elite/wrapup/.cvsignore new file mode 100644 index 0000000000..282522db03 --- /dev/null +++ b/c/src/lib/libbsp/m68k/mcf5206elite/wrapup/.cvsignore @@ -0,0 +1,2 @@ +Makefile +Makefile.in |