bsp/xilinx-zynqmp: Implement Ultra96 target

Modifications to get xilinx-zynqmp BSP working on an Ultra96 board.

Update #3682.

3 files changed, 66 insertions, 98 deletions

diff --git a/c/src/lib/libbsp/arm/acinclude.m4 b/c/src/lib/libbsp/arm/acinclude.m4
index 079d2b0910..04557a6d69 100644
--- a/c/src/lib/libbsp/arm/acinclude.m4
+++ b/c/src/lib/libbsp/arm/acinclude.m4
@@ -42,6 +42,8 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR],
     AC_CONFIG_SUBDIRS([tms570]);;
   xilinx-zynq )
     AC_CONFIG_SUBDIRS([xilinx-zynq]);;
+  xilinx-zynqmp )
+    AC_CONFIG_SUBDIRS([xilinx-zynqmp]);;
   *)
     AC_MSG_ERROR([Invalid BSP]);;
   esac
diff --git a/c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am b/c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am
index 7b4e4aea94..4071c958a2 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am
+++ b/c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am
@@ -2,7 +2,7 @@
 #
 # @file
 #
-# @brief Makefile of LibBSP for the Xilinx Zynq platform.
+# @brief Makefile of LibBSP for the Xilinx Zynq UltraScale+ MPSoC platform.
 #
 
 ACLOCAL_AMFLAGS = -I ../../../../aclocal
@@ -10,7 +10,7 @@ ACLOCAL_AMFLAGS = -I ../../../../aclocal
 include $(top_srcdir)/../../../../automake/compile.am
 include $(top_srcdir)/../../bsp.am
 
-dist_project_lib_DATA = ../../../../../../bsps/arm/xilinx-zynq/start/bsp_specs
+dist_project_lib_DATA = ../../../../../../bsps/arm/xilinx-zynqmp/start/bsp_specs
 
 ###############################################################################
 #                  Header                                                     #
@@ -46,11 +46,11 @@ librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cp15/arm-cp15-set-exc
 librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
 
 # Startup
-librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/start/bspreset.c
-librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/start/bspstart.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynqmp/start/bspreset.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynqmp/start/bspstart.c
 if HAS_SMP
 librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/start/arm-a9mpcore-smp.c
-librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/start/bspsmp.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynqmp/start/bspsmp.c
 endif
 
 # IRQ
@@ -59,22 +59,18 @@ librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-gic.c
 
 # Console
 librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/serial/console-termios.c
-librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/console/console-config.c
-librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/console/debug-console.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynqmp/console/console-config.c
 librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/serial/zynq-uart.c
 
 # Clock
-librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/clock/clock-a9mpcore.c
-
-# I2C
-librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/i2c/cadence-i2c.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/clock/clock-generic-timer.c
 
 # Cache
-librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-l2c-310.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-cp15.c
 
 # Start hooks
-librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/start/bspstarthooks.c
-librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/start/bspstartmmu.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynqmp/start/bspstarthooks.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynqmp/start/bspstartmmu.c
 
 ###############################################################################
 #                  Special Rules                                              #
@@ -83,4 +79,4 @@ librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/start/bspstartmm
 
 include $(srcdir)/../../../../../../bsps/shared/irq-sources.am
 include $(srcdir)/../../../../../../bsps/shared/shared-sources.am
-include $(srcdir)/../../../../../../bsps/arm/xilinx-zynq/headers.am
+include $(srcdir)/../../../../../../bsps/arm/xilinx-zynqmp/headers.am
diff --git a/c/src/lib/libbsp/arm/xilinx-zynqmp/configure.ac b/c/src/lib/libbsp/arm/xilinx-zynqmp/configure.ac
index f58b737b1b..f145435b4f 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynqmp/configure.ac
+++ b/c/src/lib/libbsp/arm/xilinx-zynqmp/configure.ac
@@ -2,11 +2,11 @@
 #
 # @file
 #
-# @brief Configure script of LibBSP for the Xilinx Zynq platform.
+# @brief Configure script of LibBSP for the Xilinx Zynq UltraScale+ MPSoC platform.
 #
 
 AC_PREREQ([2.69])
-AC_INIT([rtems-c-src-lib-libbsp-arm-xilinx-zynq-a9],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
+AC_INIT([rtems-c-src-lib-libbsp-arm-xilinx-zynqmp-a53],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
 RTEMS_TOP(../../../../../..)
 RTEMS_SOURCE_TOP
 RTEMS_BUILD_TOP
@@ -28,23 +28,18 @@ RTEMS_BSPOPTS_SET([BSP_INSTRUCTION_CACHE_ENABLED],[*qemu],[])
 RTEMS_BSPOPTS_SET([BSP_INSTRUCTION_CACHE_ENABLED],[*],[1])
 RTEMS_BSPOPTS_HELP([BSP_INSTRUCTION_CACHE_ENABLED],[enable instruction cache])
 
-RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[xilinx_zynq_zc702*],[333333333U])
-RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[xilinx_zynq_zedboard*],[666666667U])
-RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[*],[100000000U])
-RTEMS_BSPOPTS_HELP([BSP_ARM_A9MPCORE_PERIPHCLK],[ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz])
+RTEMS_BSPOPTS_SET([ARM_GENERIC_TIMER_USE_VIRTUAL],[*],[])
+RTEMS_BSPOPTS_HELP([ARM_GENERIC_TIMER_USE_VIRTUAL],[Use virtual ARM generic timer])
 
-RTEMS_BSPOPTS_SET([ZYNQ_CLOCK_UART],[xilinx_zynq_zc702*],[50000000UL])
-RTEMS_BSPOPTS_SET([ZYNQ_CLOCK_UART],[xilinx_zynq_zedboard*],[50000000UL])
-RTEMS_BSPOPTS_SET([ZYNQ_CLOCK_UART],[*],[50000000UL])
-RTEMS_BSPOPTS_HELP([ZYNQ_CLOCK_UART],[Zynq UART clock frequency in Hz])
+RTEMS_BSPOPTS_SET([ARM_GENERIC_TIMER_FREQ],[*],[])
+RTEMS_BSPOPTS_HELP([ARM_GENERIC_TIMER_FREQ],[ARM generic timer frequency in Hz])
 
-RTEMS_BSPOPTS_SET([ZYNQ_CLOCK_CPU_1X],[xilinx_zynq_zc702*],[111111111U])
-RTEMS_BSPOPTS_SET([ZYNQ_CLOCK_CPU_1X],[xilinx_zynq_zedboard*],[111111111U])
-RTEMS_BSPOPTS_SET([ZYNQ_CLOCK_CPU_1X],[*],[111111111U])
-RTEMS_BSPOPTS_HELP([ZYNQ_CLOCK_CPU_1X],[Zynq cpu_1x clock frequency in Hz])
+RTEMS_BSPOPTS_SET([ZYNQ_CLOCK_UART],[xilinx_zynqmp_ultra96*],[100000000UL])
+RTEMS_BSPOPTS_SET([ZYNQ_CLOCK_UART],[*],[100000000UL])
+RTEMS_BSPOPTS_HELP([ZYNQ_CLOCK_UART],[Zynq UART clock frequency in Hz])
 
 USE_FAST_IDLE=0
-AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_a9_qemu], [USE_FAST_IDLE=1])
+AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynqmp_a53_qemu], [USE_FAST_IDLE=1])
 
 RTEMS_BSPOPTS_SET([CLOCK_DRIVER_USE_FAST_IDLE],[*qemu],[${USE_FAST_IDLE}])
 RTEMS_BSPOPTS_HELP([CLOCK_DRIVER_USE_FAST_IDLE],
@@ -61,82 +56,57 @@ RTEMS_BSPOPTS_HELP([ZYNQ_CONSOLE_USE_INTERRUPTS],[use interrupt driven mode for
 #
 # Zynq Memory map can be controlled from the configure command line. Use ...
 #
-#   ..../configure --target=arm-rtems4.11 ... BSP_ZYNQ_RAM_LENGTH=256M
+#   ..../configure --target=arm-rtems4.11 ... BSP_ZYNQMP_RAM_LENGTH=256M
 #
-RTEMS_BSPOPTS_SET([BSP_ZYNQ_RAM_LENGTH],[xilinx_zynq_a9_qemu],[256M])
-RTEMS_BSPOPTS_SET([BSP_ZYNQ_RAM_LENGTH],[xilinx_zynq_zc702],[1024M])
-RTEMS_BSPOPTS_SET([BSP_ZYNQ_RAM_LENGTH],[xilinx_zynq_zc706],[1024M])
-RTEMS_BSPOPTS_SET([BSP_ZYNQ_RAM_LENGTH],[xilinx_zynq_zedboard],[512M])
-RTEMS_BSPOPTS_SET([BSP_ZYNQ_RAM_LENGTH],[*],[256M])
-RTEMS_BSPOPTS_HELP([BSP_ZYNQ_RAM_LENGTH],[override a BSP's default RAM length])
-
-RTEMS_BSPOPTS_SET([BSP_ZYNQ_NOCACHE_LENGTH],[*],[1M])
-RTEMS_BSPOPTS_HELP([BSP_ZYNQ_NOCACHE_LENGTH],[length of nocache RAM region])
-
-AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_a9_qemu],
-      [ZYNQ_RAM_ORIGIN="0x00000000"
-       ZYNQ_RAM_MMU="0x0fffc000"
-       ZYNQ_RAM_MMU_LENGTH="16k"
-       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN}"
-       ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 16k"
-       ZYNQ_RAM_INT_0_ORIGIN="0x00000000"
-       ZYNQ_RAM_INT_0_LENGTH="64k + 64k + 64k"
-       ZYNQ_RAM_INT_1_ORIGIN="0xFFFF0000"
-       ZYNQ_RAM_INT_1_LENGTH="64k - 512"])
-
-AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zc702],
-      [ZYNQ_RAM_ORIGIN="0x00100000"
-       ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
-       ZYNQ_RAM_MMU_LENGTH="16k"
-       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
-       ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 1M - 16k"
-       ZYNQ_RAM_INT_0_ORIGIN="0x00000000"
-       ZYNQ_RAM_INT_0_LENGTH="64k + 64k + 64k"
-       ZYNQ_RAM_INT_1_ORIGIN="0xFFFF0000"
-       ZYNQ_RAM_INT_1_LENGTH="64k - 512"])
-
-AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zc706],
-      [ZYNQ_RAM_ORIGIN="0x00400000"
-       ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
-       ZYNQ_RAM_MMU_LENGTH="16k"
-       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
-       ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 4M - 16k"
-       ZYNQ_RAM_INT_0_ORIGIN="0x00000000"
-       ZYNQ_RAM_INT_0_LENGTH="64k + 64k + 64k"
-       ZYNQ_RAM_INT_1_ORIGIN="0xFFFF0000"
-       ZYNQ_RAM_INT_1_LENGTH="64k - 512"])
-
-AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynq_zedboard],
-      [ZYNQ_RAM_ORIGIN="0x00100000"
-       ZYNQ_RAM_MMU="${ZYNQ_RAM_ORIGIN}"
-       ZYNQ_RAM_MMU_LENGTH="16k"
-       ZYNQ_RAM_ORIGIN_AVAILABLE="${ZYNQ_RAM_ORIGIN} + 0x00004000"
-       ZYNQ_RAM_LENGTH_AVAILABLE="${BSP_ZYNQ_RAM_LENGTH} - 1M - 16k"
-       ZYNQ_RAM_INT_0_ORIGIN="0x00000000"
-       ZYNQ_RAM_INT_0_LENGTH="64k + 64k + 64k"
-       ZYNQ_RAM_INT_1_ORIGIN="0xFFFF0000"
-       ZYNQ_RAM_INT_1_LENGTH="64k - 512"])
-
-AC_DEFUN([ZYNQ_LINKCMD],[
+RTEMS_BSPOPTS_SET([BSP_ZYNQMP_RAM_LENGTH],[xilinx_zynqmp_ultra96],[2048M])
+RTEMS_BSPOPTS_SET([BSP_ZYNQMP_RAM_LENGTH],[*],[256M])
+RTEMS_BSPOPTS_HELP([BSP_ZYNQMP_RAM_LENGTH],[override a BSP's default RAM length])
+
+RTEMS_BSPOPTS_SET([BSP_ZYNQMP_NOCACHE_LENGTH],[*],[1M])
+RTEMS_BSPOPTS_HELP([BSP_ZYNQMP_NOCACHE_LENGTH],[length of nocache RAM region])
+
+AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynqmp_a53_qemu],
+      [ZYNQMP_RAM_ORIGIN="0x00000000"
+       ZYNQMP_RAM_MMU="0x0fffc000"
+       ZYNQMP_RAM_MMU_LENGTH="16k"
+       ZYNQMP_RAM_ORIGIN_AVAILABLE="${ZYNQMP_RAM_ORIGIN}"
+       ZYNQMP_RAM_LENGTH_AVAILABLE="${BSP_ZYNQMP_RAM_LENGTH} - 16k"
+       ZYNQMP_RAM_INT_0_ORIGIN="0x00000000"
+       ZYNQMP_RAM_INT_0_LENGTH="64k + 64k + 64k"
+       ZYNQMP_RAM_INT_1_ORIGIN="0xFFFF0000"
+       ZYNQMP_RAM_INT_1_LENGTH="64k - 512"])
+
+AS_IF([test "x${RTEMS_BSP}" == xxilinx_zynqmp_ultra96],
+      [ZYNQMP_RAM_ORIGIN="0x00100000"
+       ZYNQMP_RAM_MMU="${ZYNQMP_RAM_ORIGIN}"
+       ZYNQMP_RAM_MMU_LENGTH="16k"
+       ZYNQMP_RAM_ORIGIN_AVAILABLE="${ZYNQMP_RAM_ORIGIN} + 0x00004000"
+       ZYNQMP_RAM_LENGTH_AVAILABLE="${BSP_ZYNQMP_RAM_LENGTH} - 1M - 16k"
+       ZYNQMP_RAM_INT_0_ORIGIN="0x00000000"
+       ZYNQMP_RAM_INT_0_LENGTH="64k + 64k + 64k"
+       ZYNQMP_RAM_INT_1_ORIGIN="0xFFFF0000"
+       ZYNQMP_RAM_INT_1_LENGTH="64k - 512"])
+
+AC_DEFUN([ZYNQMP_LINKCMD],[
 AC_ARG_VAR([$1],[$2; default $3])dnl
 [$1]=[$]{[$1]:-[$3]}
 ])
 
-ZYNQ_LINKCMD([ZYNQ_RAM_ORIGIN],[normal RAM region origin],[${ZYNQ_RAM_ORIGIN}])
-ZYNQ_LINKCMD([ZYNQ_RAM_LENGTH],[normal RAM region length],[${BSP_ZYNQ_RAM_LENGTH}])
-ZYNQ_LINKCMD([ZYNQ_RAM_MMU],[MMU region origin],[${ZYNQ_RAM_MMU}])
-ZYNQ_LINKCMD([ZYNQ_RAM_MMU_LENGTH],[MMU region length],[${ZYNQ_RAM_MMU_LENGTH}])
-ZYNQ_LINKCMD([ZYNQ_RAM_ORIGIN_AVAILABLE],[origin of available RAM],[${ZYNQ_RAM_ORIGIN_AVAILABLE}])
-ZYNQ_LINKCMD([ZYNQ_RAM_LENGTH_AVAILABLE],[length of available RAM],[${ZYNQ_RAM_LENGTH_AVAILABLE}])
-ZYNQ_LINKCMD([ZYNQ_RAM_NOCACHE_LENGTH],[length of nocache RAM region],[${BSP_ZYNQ_NOCACHE_LENGTH}])
-ZYNQ_LINKCMD([ZYNQ_RAM_INT_0_ORIGIN],[internal 0 RAM region origin],[${ZYNQ_RAM_INT_0_ORIGIN}])
-ZYNQ_LINKCMD([ZYNQ_RAM_INT_0_LENGTH],[internal 0 RAM region length],[${ZYNQ_RAM_INT_0_LENGTH}])
-ZYNQ_LINKCMD([ZYNQ_RAM_INT_1_ORIGIN],[internal 1 RAM region origin],[${ZYNQ_RAM_INT_1_ORIGIN}])
-ZYNQ_LINKCMD([ZYNQ_RAM_INT_1_LENGTH],[internal 1 RAM region length],[${ZYNQ_RAM_INT_1_LENGTH}])
+ZYNQMP_LINKCMD([ZYNQMP_RAM_ORIGIN],[normal RAM region origin],[${ZYNQMP_RAM_ORIGIN}])
+ZYNQMP_LINKCMD([ZYNQMP_RAM_LENGTH],[normal RAM region length],[${BSP_ZYNQMP_RAM_LENGTH}])
+ZYNQMP_LINKCMD([ZYNQMP_RAM_MMU],[MMU region origin],[${ZYNQMP_RAM_MMU}])
+ZYNQMP_LINKCMD([ZYNQMP_RAM_MMU_LENGTH],[MMU region length],[${ZYNQMP_RAM_MMU_LENGTH}])
+ZYNQMP_LINKCMD([ZYNQMP_RAM_ORIGIN_AVAILABLE],[origin of available RAM],[${ZYNQMP_RAM_ORIGIN_AVAILABLE}])
+ZYNQMP_LINKCMD([ZYNQMP_RAM_LENGTH_AVAILABLE],[length of available RAM],[${ZYNQMP_RAM_LENGTH_AVAILABLE}])
+ZYNQMP_LINKCMD([ZYNQMP_RAM_NOCACHE_LENGTH],[length of nocache RAM region],[${BSP_ZYNQMP_NOCACHE_LENGTH}])
+ZYNQMP_LINKCMD([ZYNQMP_RAM_INT_0_ORIGIN],[internal 0 RAM region origin],[${ZYNQMP_RAM_INT_0_ORIGIN}])
+ZYNQMP_LINKCMD([ZYNQMP_RAM_INT_0_LENGTH],[internal 0 RAM region length],[${ZYNQMP_RAM_INT_0_LENGTH}])
+ZYNQMP_LINKCMD([ZYNQMP_RAM_INT_1_ORIGIN],[internal 1 RAM region origin],[${ZYNQMP_RAM_INT_1_ORIGIN}])
+ZYNQMP_LINKCMD([ZYNQMP_RAM_INT_1_LENGTH],[internal 1 RAM region length],[${ZYNQMP_RAM_INT_1_LENGTH}])
 
 RTEMS_BSP_CLEANUP_OPTIONS
 
 AC_CONFIG_FILES([
 Makefile
-linkcmds:../../../../../../bsps/arm/xilinx-zynq/start/linkcmds.in])
+linkcmds:../../../../../../bsps/arm/xilinx-zynqmp/start/linkcmds.in])
 AC_OUTPUT