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authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-07-11 21:16:53 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-07-11 21:16:53 +0000
commit4159370f5dbf77526a900a5374a1cd7c634937b8 (patch)
tree402ba2c911feb991ca00e64d847fef4d4265d2b8 /c/src/lib/libbsp
parentAdded Hitachi H8/300 to the list of CPUs that should be OK with (diff)
downloadrtems-4159370f5dbf77526a900a5374a1cd7c634937b8.tar.bz2
Reworked score/cpu/sparc so it can be safely compiled multilib. All
routines and structures that require CPU model specific information are now in libcpu. This primarily required moving erc32 specific information from score/cpu files to libcpu/sparc and the erc32 BSP.
Diffstat (limited to 'c/src/lib/libbsp')
-rw-r--r--c/src/lib/libbsp/sparc/erc32/include/bsp.h6
-rw-r--r--c/src/lib/libbsp/sparc/erc32/start/start.S2
-rw-r--r--c/src/lib/libbsp/sparc/erc32/startup/bspstart.c36
3 files changed, 40 insertions, 4 deletions
diff --git a/c/src/lib/libbsp/sparc/erc32/include/bsp.h b/c/src/lib/libbsp/sparc/erc32/include/bsp.h
index 6af1353548..ec90b1a520 100644
--- a/c/src/lib/libbsp/sparc/erc32/include/bsp.h
+++ b/c/src/lib/libbsp/sparc/erc32/include/bsp.h
@@ -19,8 +19,8 @@
* $Id$
*/
-#ifndef __SIS_h
-#define __SIS_h
+#ifndef __ERC32_BSP_h
+#define __ERC32_BSP_h
#ifdef __cplusplus
extern "C" {
@@ -28,7 +28,7 @@ extern "C" {
#include <rtems.h>
#include <iosupp.h>
-#include <erc32.h>
+#include <libcpu/erc32.h>
#include <clockdrv.h>
#include <console.h>
diff --git a/c/src/lib/libbsp/sparc/erc32/start/start.S b/c/src/lib/libbsp/sparc/erc32/start/start.S
index 4ccdbf0ac8..562f16a625 100644
--- a/c/src/lib/libbsp/sparc/erc32/start/start.S
+++ b/c/src/lib/libbsp/sparc/erc32/start/start.S
@@ -11,7 +11,7 @@
*/
#include <asm.h>
-#include <erc32.h>
+#include <libcpu/erc32.h>
/*
* Unexpected trap will halt the processor by forcing it to error state
diff --git a/c/src/lib/libbsp/sparc/erc32/startup/bspstart.c b/c/src/lib/libbsp/sparc/erc32/startup/bspstart.c
index cd3df53b29..e7c0d6630b 100644
--- a/c/src/lib/libbsp/sparc/erc32/startup/bspstart.c
+++ b/c/src/lib/libbsp/sparc/erc32/startup/bspstart.c
@@ -45,6 +45,12 @@ rtems_cpu_table Cpu_table;
extern rtems_unsigned32 rdb_start;
/*
+ * Mirror of the Timer Control Register
+ */
+
+unsigned32 _ERC32_MEC_Timer_Control_Mirror;
+
+/*
* Amount to increment itimer by each pass
* It is a variable instead of a #define to allow the 'looptest'
* script to bump it without recompiling rtems
@@ -165,6 +171,21 @@ void bsp_pretasking_hook(void)
}
/*
+ * ERC32_Idle_thread_body
+ *
+ * ERC32 specific idle task that enters low power mode.
+ */
+
+void ERC32_Idle_thread_body( void )
+{
+ while (1) {
+ ERC32_MEC.Power_Down = 0; /* value is irrelevant */
+ }
+}
+
+
+
+/*
* bsp_start
*
* This routine does the bulk of the system initialization.
@@ -191,6 +212,15 @@ void bsp_start( void )
ERC32_MEC.Wait_State_Configuration = 0;
}
+
+ /*
+ * Initialize the mirror of the Timer Control register.
+ */
+
+ _ERC32_MEC_Timer_Control_Mirror = 0;
+ ERC32_MEC.Timer_Control = 0;
+
+ ERC32_MEC.Control |= ERC32_CONFIGURATION_POWER_DOWN_ALLOWED;
/*
* Set up our hooks
@@ -209,6 +239,12 @@ void bsp_start( void )
Cpu_table.do_zero_of_workspace = TRUE;
/*
+ * ERC32 specific idle task.
+ */
+
+ Cpu_table.idle_task = ERC32_Idle_thread_body;
+
+ /*
* This should be enough interrupt stack.
*/