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authorMarcos Diaz <marcos.diaz@tallertechnologies.com>2015-09-10 10:20:41 -0500
committerJoel Sherrill <joel.sherrill@oarcorp.com>2015-09-10 13:30:43 -0500
commit44eb9893b5c08093f7d53cdfd4c1d2e7bb4a5e39 (patch)
tree007ce1cc8162c5c64bd2aaa241aaa3c9d133cf33 /c/src/lib/libbsp
parentcpukit/libmisc/dumpbuf/dumpbuf.c: Fix compilation warnings (diff)
downloadrtems-44eb9893b5c08093f7d53cdfd4c1d2e7bb4a5e39.tar.bz2
Beaglebone: fix missing clobber in inline assembly.
flush_data_cache uses R0 directly but doesn't list it as a clobbered register. Compiling with -O3 made this code break, since the function that calls flush_data_cache already uses r0. closes #2416.
Diffstat (limited to 'c/src/lib/libbsp')
-rw-r--r--c/src/lib/libbsp/arm/beagle/include/bsp.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/arm/beagle/include/bsp.h b/c/src/lib/libbsp/arm/beagle/include/bsp.h
index e43d27a7a5..5e9e92733d 100644
--- a/c/src/lib/libbsp/arm/beagle/include/bsp.h
+++ b/c/src/lib/libbsp/arm/beagle/include/bsp.h
@@ -111,7 +111,13 @@ static inline void isb(void)
/* flush data cache */
static inline void flush_data_cache(void)
{
- asm volatile("mov r0, #0; mcr p15, #0, r0, c7, c10, #4" : : : "memory");
+ asm volatile(
+ "mov r0, #0\n"
+ "mcr p15, #0, r0, c7, c10, #4\n"
+ : /* No outputs */
+ : /* No inputs */
+ : "r0","memory"
+ );
}
#define __arch_getb(a) (*(volatile unsigned char *)(a))