diff options
author | Daniel Hellstrom <daniel@gaisler.com> | 2014-12-03 11:35:52 +0100 |
---|---|---|
committer | Daniel Hellstrom <daniel@gaisler.com> | 2014-12-04 12:51:11 +0100 |
commit | dff1803cfbec3775fff1b9c34cc707c05494dc3b (patch) | |
tree | dbb8850d94b30f8388f9e3df9a68fc6c99855f74 /c/src/lib/libbsp | |
parent | pc386 bsp fix for default mode (diff) | |
download | rtems-dff1803cfbec3775fff1b9c34cc707c05494dc3b.tar.bz2 |
SPARC: optimize IRQ enable & disable
* Coding style cleanups.
* Use OS reserved trap 0x89 for IRQ Disable
* Use OS reserved trap 0x8A for IRQ Enable
* Add to SPARC CPU supplement documentation
This will result in faster Disable/Enable code since the
system trap handler does not need to decode which function
the user wants. Besides the IRQ disable/enabled can now
be inline which avoids the caller to take into account that
o0-o7+g1-g4 registers are destroyed by trap handler.
It was also possible to reduce the interrupt trap handler by
five instructions due to this.
Diffstat (limited to 'c/src/lib/libbsp')
-rw-r--r-- | c/src/lib/libbsp/sparc/leon3/startup/spurious.c | 12 | ||||
-rw-r--r-- | c/src/lib/libbsp/sparc/shared/irq_asm.S | 42 | ||||
-rw-r--r-- | c/src/lib/libbsp/sparc/shared/start/start.S | 30 |
3 files changed, 49 insertions, 35 deletions
diff --git a/c/src/lib/libbsp/sparc/leon3/startup/spurious.c b/c/src/lib/libbsp/sparc/leon3/startup/spurious.c index a29f113226..8801f6e933 100644 --- a/c/src/lib/libbsp/sparc/leon3/startup/spurious.c +++ b/c/src/lib/libbsp/sparc/leon3/startup/spurious.c @@ -18,6 +18,7 @@ */ #include <bsp.h> +#include <rtems/score/cpu.h> #include <rtems/bspIo.h> void _CPU_Exception_frame_print( const CPU_Exception_frame *frame ) @@ -146,14 +147,15 @@ void bsp_spurious_initialize() /* * Skip window overflow, underflow, and flush as well as software - * trap 0 which we will use as a shutdown. Also avoid trap 0x70 - 0x7f - * which cannot happen and where some of the space is used to pass - * paramaters to the program. + * trap 0,9,10 which we will use as a shutdown, IRQ disable, IRQ enable. + * Also avoid trap 0x70 - 0x7f which cannot happen and where some of the + * space is used to pass paramaters to the program. */ - if (( trap == 5 || trap == 6 ) || + if (( trap == 5 ) || ( trap == 6 ) || (( trap >= 0x11 ) && ( trap <= 0x1f )) || - (( trap >= 0x70 ) && ( trap <= 0x83 ))) + (( trap >= 0x70 ) && ( trap <= 0x83 )) || + ( trap == SPARC_SWTRAP_IRQDIS ) || ( trap == SPARC_SWTRAP_IRQEN )) continue; set_vector( diff --git a/c/src/lib/libbsp/sparc/shared/irq_asm.S b/c/src/lib/libbsp/sparc/shared/irq_asm.S index 2ab0defa72..3e08795a2b 100644 --- a/c/src/lib/libbsp/sparc/shared/irq_asm.S +++ b/c/src/lib/libbsp/sparc/shared/irq_asm.S @@ -499,8 +499,7 @@ dont_fix_pil2: cmp %l7, 0 bne profiling_not_outer_most_exit nop - call SYM(sparc_disable_interrupts), 0 - nop + ta SPARC_SWTRAP_IRQDIS ! Call interrupt disable trap handler ld [%l4], %o2 ! o2 = 3rd arg = interrupt exit instant mov %l3, %o1 ! o1 = 2nd arg = interrupt entry instant call SYM(_Profiling_Outer_most_interrupt_entry_and_exit), 0 @@ -585,38 +584,31 @@ profiling_not_outer_most_exit: nop isr_dispatch: call SYM(_Thread_Dispatch), 0 - nop + nop - /* - * We invoked _Thread_Dispatch in a state similar to the interrupted - * task. In order to safely be able to tinker with the register - * windows and get the task back to its pre-interrupt state, - * we need to disable interrupts disabled so we can safely tinker - * with the register windowing. In particular, the CWP in the PSR - * is fragile during this period. (See PR578.) - */ - mov 2,%g1 ! syscall (disable interrupts) - ta 0 ! syscall (disable interrupts) + /* + * We invoked _Thread_Dispatch in a state similar to the interrupted + * task. In order to safely be able to tinker with the register + * windows and get the task back to its pre-interrupt state, + * we need to disable interrupts disabled so we can safely tinker + * with the register windowing. In particular, the CWP in the PSR + * is fragile during this period. (See PR578.) + */ + ta SPARC_SWTRAP_IRQDIS ! syscall (disable interrupts) /* * While we had ISR dispatching disabled in this thread, * did we miss anything. If so, then we need to do another * _Thread_Dispatch before leaving this ISR Dispatch context. */ + ldub [%g6 + PER_CPU_DISPATCH_NEEDED], %l7 - ldub [%g6 + PER_CPU_DISPATCH_NEEDED], %l7 - - orcc %l7, %g0, %g0 ! Is thread switch necesary? - bz allow_nest_again ! No, then clear out and return - nop - - ! Yes, then invoke the dispatcher -dispatchAgain: - mov 3,%g1 ! syscall (enable interrupts) - ta 0 ! syscall (enable interrupts) - ba isr_dispatch - nop + orcc %l7, %g0, %g0 ! Is thread switch necesary? + bne,a isr_dispatch ! Yes, then invoke the dispatcher. + ! g1 = Old PSR PIL returned from IRQDis + ta SPARC_SWTRAP_IRQEN ! syscall (enable interrupts to same level) + ! No, then clear out and return allow_nest_again: ! Zero out ISR stack nesting prevention flag diff --git a/c/src/lib/libbsp/sparc/shared/start/start.S b/c/src/lib/libbsp/sparc/shared/start/start.S index 3e0e42e7df..f38fe8cb99 100644 --- a/c/src/lib/libbsp/sparc/shared/start/start.S +++ b/c/src/lib/libbsp/sparc/shared/start/start.S @@ -35,11 +35,20 @@ /* * System call optimized trap table entry */ -#define SYSCALL_TRAP(_vector, _handler) \ +#define IRQDIS_TRAP(_handler) \ mov %psr, %l0 ; \ sethi %hi(_handler), %l4 ; \ jmp %l4+%lo(_handler); \ - subcc %g1, 3, %g0; ! prepare for syscall 3 check + or %l0, 0x0f00, %l3; ! Set PIL=0xf to disable IRQ + +/* + * System call optimized trap table entry + */ +#define IRQEN_TRAP(_handler) \ + mov %psr, %l0 ; \ + sethi %hi(_handler), %l4 ; \ + jmp %l4+%lo(_handler); \ + andn %l0, 0xf00, %l3; ! Set PIL=0 to Enable IRQ /* * Window Overflow optimized trap table entry @@ -183,12 +192,23 @@ SYM(CLOCK_SPEED): * installed before. */ - SYSCALL_TRAP( 0x80, SYM(syscall) ); ! 80 syscall SW trap - SOFT_TRAP; SOFT_TRAP; ! 81 - 82 + TRAP( 0x80, SYM(syscall) ); ! 80 halt syscall SW trap + SOFT_TRAP; SOFT_TRAP; ! 81 - 82 TRAP( 0x83, SYM(window_flush_trap_handler) ); ! 83 flush windows SW trap SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 84 - 87 - SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 88 - 8B + SOFT_TRAP; ! 88 + + /* + * SW Trap 9-15 Reserved for Operating System + * + * SPARC_SWTRAP_IRQDIS + * SPARC_SWTRAP_IRQEN + */ + IRQDIS_TRAP(SYM(syscall_irqdis)); ! 89 IRQ Disable syscall trap + IRQEN_TRAP(SYM(syscall_irqen)); ! 8A IRQ Enable syscall trap + + SOFT_TRAP; ! 8B SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 8C - 8F SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 90 - 93 SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 94 - 97 |