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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2010-06-17 16:20:39 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2010-06-17 16:20:39 +0000 |
commit | df970844195f6814e35f12ad5e585f4645c2f152 (patch) | |
tree | 8bf1c5169e6db37568123585ddb9892a2e9bfead /c/src/lib/libbsp/sparc64/usiii/README | |
parent | 2010-06-17 Joel Sherrill <joel.sherrill@oarcorp.com> (diff) | |
download | rtems-df970844195f6814e35f12ad5e585f4645c2f152.tar.bz2 |
2010-06-17 Joel Sherrill <joel.sherrill@oarcorp.com>
* ChangeLog, Makefile.am, README, bsp_specs, configure.ac,
preinstall.am, include/bsp.h, include/tm27.h, make/custom/usiii.cfg,
start/bspinit.S: New files.
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libbsp/sparc64/usiii/README | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/sparc64/usiii/README b/c/src/lib/libbsp/sparc64/usiii/README new file mode 100644 index 0000000000..48514dc8d0 --- /dev/null +++ b/c/src/lib/libbsp/sparc64/usiii/README @@ -0,0 +1,61 @@ +# +# $Id$ +# + +BSP NAME: usiii +BOARD: +BUS: n/a +CPU FAMILY: SPARC V9 (a.k.a. sun4u) +CPU: UltraSPARC III +COPROCESSORS: +MODE: n/a + +DEBUG MONITOR: + +PERIPHERALS +=========== +TIMERS: TICK register (ASR 4) + RESOLUTION: CPU clock resolution +SERIAL PORTS: +REAL-TIME CLOCK: +DMA: none +VIDEO: none +SCSI: none +NETWORKING: none + +DRIVER INFORMATION +================== +CLOCK DRIVER: +IOSUPP DRIVER: +SHMSUPP: +TIMER DRIVER: +TTY DRIVER: + +STDIO +===== +PORT: +ELECTRICAL: +BAUD: +BITS PER CHARACTER: +PARITY: +STOP BITS: + +NOTES +===== + +Board description +----------------- +clock rate: +bus width: +ROM: +RAM: + +This BSP is designed to operate on the UltraSPARC III SPARC64 +and similar processors. + +This BSP has been run on the Simics simulator with the serengeti target. + +Simics: +A commercially available simulator licensed by Virtutech. +https://www.simics.net/ + |