Remove stray white spaces.

4 files changed, 25 insertions, 25 deletions

diff --git a/c/src/lib/libbsp/sparc/shared/bspclean.c b/c/src/lib/libbsp/sparc/shared/bspclean.c
index af17096332..c88025e8f6 100644
--- a/c/src/lib/libbsp/sparc/shared/bspclean.c
+++ b/c/src/lib/libbsp/sparc/shared/bspclean.c
@@ -10,10 +10,10 @@
  *  http://www.rtems.com/license/LICENSE.
  *
  *  Ported to ERC32 implementation of the SPARC by On-Line Applications
- *  Research Corporation (OAR) under contract to the European Space 
+ *  Research Corporation (OAR) under contract to the European Space
  *  Agency (ESA).
  *
- *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. 
+ *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
  *  European Space Agency.
  *
  *  $Id$
diff --git a/c/src/lib/libbsp/sparc/shared/bspstart.c b/c/src/lib/libbsp/sparc/shared/bspstart.c
index c9cadc8954..2509c3fa50 100644
--- a/c/src/lib/libbsp/sparc/shared/bspstart.c
+++ b/c/src/lib/libbsp/sparc/shared/bspstart.c
@@ -12,10 +12,10 @@
  *  http://www.rtems.com/license/LICENSE.
  *
  *  Ported to ERC32 implementation of the SPARC by On-Line Applications
- *  Research Corporation (OAR) under contract to the European Space 
+ *  Research Corporation (OAR) under contract to the European Space
  *  Agency (ESA).
  *
- *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. 
+ *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
  *  European Space Agency.
  *
  *  $Id$
@@ -29,12 +29,12 @@
 #include <bsp.h>
 #include <rtems/libio.h>
 #include <rtems/libcsupport.h>
- 
+
 /*
  *  The original table from the application and our copy of it with
  *  some changes.
  */
- 
+
 extern rtems_configuration_table  Configuration;
 rtems_configuration_table         BSP_Configuration;
 
@@ -62,8 +62,8 @@ uint32_t         CPU_SPARC_CLICKS_PER_TICK;
  *
  * Try to speed those tests up by speeding up the clock when in the idle task.
  *
- *  NOTE:  At the current setting, 5 second delays in the tests take 
- *         approximately 5 seconds of wall time. 
+ *  NOTE:  At the current setting, 5 second delays in the tests take
+ *         approximately 5 seconds of wall time.
  */
 
 rtems_extension fast_idle_switch_hook(
@@ -98,7 +98,7 @@ rtems_extension fast_idle_switch_hook(
 /*
  *  Use the shared implementations of the following routines
  */
- 
+
 void bsp_postdriver_hook(void);
 void bsp_libc_init( void *, uint32_t, int );
 extern void bsp_spurious_initialize();
@@ -148,7 +148,7 @@ void bsp_pretasking_hook(void)
 
     rc = rtems_extension_create(
       rtems_build_name('F', 'D', 'L', 'E'),
-      &fast_idle_extension, 
+      &fast_idle_extension,
       &extension_id
     );
     if (rc != RTEMS_SUCCESSFUL)
@@ -195,7 +195,7 @@ void bsp_start( void )
 
   Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
 
-  work_space_start = 
+  work_space_start =
     (unsigned char *)rdb_start - BSP_Configuration.work_space_size;
 
   if ( work_space_start <= (unsigned char *)&end ) {
diff --git a/c/src/lib/libbsp/sparc/shared/gnatcommon.c b/c/src/lib/libbsp/sparc/shared/gnatcommon.c
index 4a43764687..37a2d623fd 100644
--- a/c/src/lib/libbsp/sparc/shared/gnatcommon.c
+++ b/c/src/lib/libbsp/sparc/shared/gnatcommon.c
@@ -56,7 +56,7 @@ rtems_isr __gnat_interrupt_handler
 }
 
 /*
- * Default signal handler with error reporting 
+ * Default signal handler with error reporting
  */
 
 void
@@ -98,7 +98,7 @@ __gnat_install_handler_common (int t1, int t2)
          *  Skip window overflow, underflow, and flush as well as software
          *  trap 0 which we will use as a shutdown. Also avoid trap 0x70 - 0x7f
          *  which cannot happen and where some of the space is used to pass
-         *  paramaters to the program.  0x80 for system traps and 
+         *  paramaters to the program.  0x80 for system traps and
 	 *  0x81 - 0x83 by the remote debugging stub.
 	 *  Avoid two bsp specific interrupts which normally are used
 	 *  by the real-time clock and UART B.
diff --git a/c/src/lib/libbsp/sparc/shared/start.S b/c/src/lib/libbsp/sparc/shared/start.S
index 400ae90e47..90c0fb8702 100644
--- a/c/src/lib/libbsp/sparc/shared/start.S
+++ b/c/src/lib/libbsp/sparc/shared/start.S
@@ -36,10 +36,10 @@
 SYM(start):
 start:
 
-/* 
+/*
  *  The trap table has to be the first code in a boot PROM.  But because
  *  the Memory Configuration comes up thinking we only have 4K of PROM, we
- *  cannot have a full trap table and still have room left over to 
+ *  cannot have a full trap table and still have room left over to
  *  reprogram the Memory Configuration register correctly.  This file
  *  uses an abbreviated trap which has every entry which might be used
  *  before RTEMS installs its own trap table.
@@ -49,8 +49,8 @@ start:
   PUBLIC(trap_table)
 SYM(trap_table):
 
-  RTRAP( 0, SYM(hard_reset) );                   ! 00 reset trap 
-  BAD_TRAP;                                     ! 01 instruction access 
+  RTRAP( 0, SYM(hard_reset) );                   ! 00 reset trap
+  BAD_TRAP;                                     ! 01 instruction access
                                                 !    exception
   BAD_TRAP;                                     ! 02 illegal instruction
   BAD_TRAP;                                     ! 03 privileged instruction
@@ -68,7 +68,7 @@ SYM(trap_table):
   BAD_TRAP;                                     ! 0F undefined
   BAD_TRAP;                                     ! 10 undefined
 
-  /* 
+  /*
    *  ERC32 defined traps
    */
 
@@ -115,7 +115,7 @@ SYM(trap_table):
   BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;       ! 74 - 77 undefined
   BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;       ! 78 - 7B undefined
 
-/* 
+/*
    This is a sad patch to make sure that we know where the
    MEC timer control register mirror is so we can stop the timers
    from an external debugger. It is needed because the control
@@ -138,10 +138,10 @@ SYM(_ERC32_MEC_Timer_Control_Mirror):
 SYM(CLOCK_SPEED):
 
   .word	0x0a, 0, 0, 0				! 7E (10 MHz default)
-  
+
   BAD_TRAP; 					! 7F undefined
 
-  /* 
+  /*
    *  Software traps
    *
    *  NOTE: At the risk of being redundant... this is not a full
@@ -207,7 +207,7 @@ SYM(hard_reset):
 	and	%g2, 0x7, %g2
 	set	1, %g3
 	sll	%g3, %g2, %g3
-        mov     %g3, %wim               
+        mov     %g3, %wim
 
 	or	%g1, 0x20, %g1
         wr      %g1, %psr         ! enable traps
@@ -233,11 +233,11 @@ SYM(hard_reset):
         /*
          *  Copy the initialized data to RAM
          *
-         *  FROM:   _endtext 
-         *  TO:     _data_start 
+         *  FROM:   _endtext
+         *  TO:     _data_start
          *  LENGTH: (__bss_start - _data_start) bytes
          */
- 
+
 
         sethi %hi(_endtext),%g2
         or    %g2,%lo(_endtext),%g2     ! g2 = start of initialized data in ROM