LEON3: fixed nano seconds support in TLIB

The _Watchdog_Nanoseconds_since_tick_handler() function caller does
not take into account that the timer counter may wrap, underflow or
overflow. Instead, the driver must take that into account. This
GPTIMER DrvMgr driver patch makes use of the IRQ-Pending bit to
determine if a underflow has happened. In that case a greater time
than one tick is returned (even considering the function name..).

The TLIB clock layer must also ACK the interrupt pending bit,
otherwise we couldn't determine whether an IRQ is pending or if
belongs to un old already handled tick IRQ.

Note that this patch only fixes the DrvMgr GPTIMER driver and TLIB,
the standard LEON3 GPTIMER driver still needs a fix.

2 files changed, 51 insertions, 12 deletions

diff --git a/c/src/lib/libbsp/sparc/shared/timer/gptimer.c b/c/src/lib/libbsp/sparc/shared/timer/gptimer.c
index b15aaf1673..d093ca1bb2 100644
--- a/c/src/lib/libbsp/sparc/shared/timer/gptimer.c
+++ b/c/src/lib/libbsp/sparc/shared/timer/gptimer.c
@@ -84,6 +84,7 @@ struct gptimer_timer {
 	struct gptimer_timer_regs *tregs;
 	char index; /* Timer Index in this driver */
 	char tindex; /* Timer Index In Hardware */
+	unsigned char irq_ack_mask;
 };
 
 /* GPTIMER Core private */
@@ -274,8 +275,15 @@ int gptimer_init1(struct drvmgr_dev *dev)
 		timer->tregs = &regs->timer[(int)timer->tindex];
 		timer->tdev.drv = &gptimer_tlib_drv;
 
-		/* Stop Timer */
-		timer->tregs->ctrl = 0;
+		/* Stop Timer and probe Pending bit. In newer hardware the
+		 * timer has pending bit is cleared by writing a one to it,
+		 * whereas older versions it is cleared with a zero.
+		 */
+		timer->tregs->ctrl = GPTIMER_CTRL_IP;
+		if ((timer->tregs->ctrl & GPTIMER_CTRL_IP) != 0)
+			timer->irq_ack_mask = ~GPTIMER_CTRL_IP;
+		else
+			timer->irq_ack_mask = ~0;
 
 		/* Register Timer at Timer Library */
 #if defined(LEON3) && defined(RTEMS_DRVMGR_STARTUP)
@@ -301,6 +309,10 @@ int gptimer_init1(struct drvmgr_dev *dev)
 			priv);
 	}
 
+	/* Older HW */
+	
+	
+
 	/* If the user request a certain Timer to be the RTEMS Clock Timer,
 	 * the timer must be registered at the Clock Driver.
 	 */
@@ -364,23 +376,33 @@ static inline struct gptimer_priv *priv_from_timer(struct gptimer_timer *t)
 		t->index * sizeof(struct gptimer_timer));
 }
 
+int gptimer_tlib_int_pend(struct tlib_dev *hand, int ack)
+{
+	struct gptimer_timer *timer = (struct gptimer_timer *)hand;
+	unsigned int ctrl = timer->tregs->ctrl;
+
+	if ((ctrl & (GPTIMER_CTRL_IP | GPTIMER_CTRL_IE)) ==
+		(GPTIMER_CTRL_IP | GPTIMER_CTRL_IE)) {
+		/* clear Pending IRQ ? */
+		if (ack)
+			timer->tregs->ctrl = ctrl & timer->irq_ack_mask;
+		return 1; /* timer generated IRQ */
+	} else
+		return 0; /* was not timer causing IRQ */
+}
+
 void gptimer_isr(void *data)
 {
 	struct gptimer_priv *priv = data;
-	struct gptimer_timer_regs *tregs;
 	int i;
-	unsigned int ctrl;
 
 	/* Check all timers for IRQ */
 	for (i=0;i<priv->timer_cnt; i++) {
-		tregs = priv->timers[i].tregs;
-		ctrl = tregs->ctrl;
-		if ( ctrl & GPTIMER_CTRL_IP ) {
-			/* IRQ Was generated by Timer, Clear Pending flag
-			 * call ISR registered
+		if (gptimer_tlib_int_pend((void *)&priv->timers[i], 1)) {
+			/* IRQ Was generated by Timer and Pending flag has been
+			 * cleared. Call ISR registered
 			 */
-			tregs->ctrl = ctrl | GPTIMER_CTRL_IP;
-			if ( priv->timers[i].tdev.isr_func ) {
+			if (priv->timers[i].tdev.isr_func) {
 				priv->timers[i].tdev.isr_func(
 					priv->timers[i].tdev.isr_data);
 			}
@@ -500,4 +522,5 @@ struct tlib_drv gptimer_tlib_drv =
 	.restart = gptimer_tlib_restart,
 	.get_counter = gptimer_tlib_get_counter,
 	.custom = NULL,
+	.int_pend = gptimer_tlib_int_pend,
 };
diff --git a/c/src/lib/libbsp/sparc/shared/timer/tlib_ckinit.c b/c/src/lib/libbsp/sparc/shared/timer/tlib_ckinit.c
index 02b1781269..0abcc08eb0 100644
--- a/c/src/lib/libbsp/sparc/shared/timer/tlib_ckinit.c
+++ b/c/src/lib/libbsp/sparc/shared/timer/tlib_ckinit.c
@@ -75,6 +75,14 @@ rtems_device_minor_number rtems_clock_minor;
 void Clock_isr(void *arg_unused)
 {
   /*
+   * Support for shared interrupts. Ack IRQ at source, only handle 
+   * interrupts generated from the tick-timer. Clearing pending bit
+   * is also needed for Clock_nanoseconds_since_last_tick() to work.
+   */
+  if ( tlib_interrupt_pending(Clock_handle, 1) == 0 )
+    return;
+
+  /*
    *  Accurate count of ISRs
    */
 
@@ -147,22 +155,30 @@ void Clock_exit( void )
 uint32_t Clock_nanoseconds_since_last_tick(void)
 {
   uint32_t clicks;
+  int ip;
+
   if ( !Clock_handle )
     return 0;
 
   tlib_get_counter(Clock_handle, (unsigned int *)&clicks);
+  /* protect against timer counter underflow/overflow */
+  ip = tlib_interrupt_pending(Clock_handle, 0);
+  if (ip)
+    tlib_get_counter(Clock_handle, (unsigned int *)&clicks);
 
 #ifdef CLOCK_DRIVER_DONT_ASSUME_PRESCALER_1MHZ
   {
     /* Down counter. Calc from BaseFreq. */
     uint64_t tmp;
+    if (ip)
+      clicks += Clock_basefreq;
     tmp = ((uint64_t)clicks * 1000000000) / ((uint64_t)Clock_basefreq);
     return (uint32_t)tmp;
   }
 #else
   /* Down counter. Timer base frequency is initialized to 1 MHz */
   return (uint32_t)
-     (rtems_configuration_get_microseconds_per_tick() - clicks) * 1000;
+     ((rtems_configuration_get_microseconds_per_tick() << ip) - clicks) * 1000;
 #endif
 }