diff options
author | Daniel Hellstrom <daniel@gaisler.com> | 2014-05-20 17:45:07 +0200 |
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committer | Daniel Hellstrom <daniel@gaisler.com> | 2014-10-06 13:19:18 +0200 |
commit | 9bd7b3b1a26adc41678ec4d4a1d97f057cdb43a7 (patch) | |
tree | e696df2a0aa20c45ac84c3d5de06a53731599495 /c/src/lib/libbsp/sparc/shared/startup | |
parent | SPARC: add BSP specific error handler (diff) | |
download | rtems-9bd7b3b1a26adc41678ec4d4a1d97f057cdb43a7.tar.bz2 |
SPARC: Fatal_halt use source and exit codes
The Fatal_halt handler now have two options, either halt
as before or enter system error state to return to
debugger or simulator. The exit-code is now also
propagated to the debugger which is very useful for
testing.
The CPU_Fatal_halt handler was split up into two, since
the only the LEON3 support the CPU power down.
The LEON3 halt now uses the power-down instruction to save
CPU power. This doesn't stop a potential watch-dog timer
from expiring.
Diffstat (limited to 'c/src/lib/libbsp/sparc/shared/startup')
-rw-r--r-- | c/src/lib/libbsp/sparc/shared/startup/bsp_fatal_halt.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/sparc/shared/startup/bsp_fatal_halt.c b/c/src/lib/libbsp/sparc/shared/startup/bsp_fatal_halt.c new file mode 100644 index 0000000000..2cc7b6d836 --- /dev/null +++ b/c/src/lib/libbsp/sparc/shared/startup/bsp_fatal_halt.c @@ -0,0 +1,38 @@ +/** + * @file + * @ingroup sparc_bsp + * @brief ERC32/LEON2 BSP Fatal_halt handler. + * + * COPYRIGHT (c) 2014. + * Aeroflex Gaisler AB. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include <rtems/score/sparc.h> + +#ifdef BSP_POWER_DOWN_AT_FATAL_HALT + +/* Spin CPU on fatal error exit */ +void _CPU_Fatal_halt(uint32_t source, uint32_t error) +{ + uint32_t level = sparc_disable_interrupts(); + + __asm__ volatile ( "mov %0, %%g1 " : "=r" (level) : "0" (level) ); + + while (1) ; /* loop forever */ +} + +#else + +/* return to debugger, simulator, hypervisor or similar by exiting + * with an error code. g1=1, g2=FATAL_SOURCE, G3=error-code. + */ +void _CPU_Fatal_halt(uint32_t source, uint32_t error) +{ + sparc_syscall_exit(source, error); +} + +#endif |