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author | Daniel Hellstrom <daniel@gaisler.com> | 2013-03-18 08:29:39 +0100 |
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committer | Daniel Hellstrom <daniel@gaisler.com> | 2015-04-17 01:10:19 +0200 |
commit | 819de55b6f2fa318357a33fe14a7e0aa1d3083fd (patch) | |
tree | cbab583f2f8bb1f50dd442d1dfa6ceb693ca2379 /c/src/lib/libbsp/sparc/shared/pci/grpci2.c | |
parent | GRETH: cleaned up parts of PHY init code (diff) | |
download | rtems-819de55b6f2fa318357a33fe14a7e0aa1d3083fd.tar.bz2 |
PCI-RASTA: set GRPCI1 target cache-line-size to avoid poor performance
Diffstat (limited to 'c/src/lib/libbsp/sparc/shared/pci/grpci2.c')
0 files changed, 0 insertions, 0 deletions