diff options
| author | Daniel Hellstrom <daniel@gaisler.com> | 2015-04-07 14:31:07 +0200 |
|---|---|---|
| committer | Daniel Hellstrom <daniel@gaisler.com> | 2015-04-17 01:10:27 +0200 |
| commit | 8b29637c673a422d5378b23be3c12ec61fcf2e3f (patch) | |
| tree | 99f102be9762fd9b19e3c44883689e53d362c7cf /c/src/lib/libbsp/sparc/shared/pci/gr_rasta_tmtc.c | |
| parent | LEON: converted AT697,GRPCi,GRPCI2,PCIF to BSD header (diff) | |
| download | rtems-8b29637c673a422d5378b23be3c12ec61fcf2e3f.tar.bz2 | |
LEON: converted PCI peripherals to BSD header
Diffstat (limited to '')
| -rw-r--r-- | c/src/lib/libbsp/sparc/shared/pci/gr_rasta_tmtc.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/c/src/lib/libbsp/sparc/shared/pci/gr_rasta_tmtc.c b/c/src/lib/libbsp/sparc/shared/pci/gr_rasta_tmtc.c index 809919ee3c..afd21425cd 100644 --- a/c/src/lib/libbsp/sparc/shared/pci/gr_rasta_tmtc.c +++ b/c/src/lib/libbsp/sparc/shared/pci/gr_rasta_tmtc.c @@ -340,8 +340,8 @@ static int gr_rasta_tmtc0_hw_init(struct gr_rasta_tmtc_priv *priv) { uint32_t data; /* set parity error response */ - pci_cfg_r32(pcidev, PCI_COMMAND, &data); - pci_cfg_w32(pcidev, PCI_COMMAND, (data|PCI_COMMAND_PARITY)); + pci_cfg_r32(pcidev, PCIR_COMMAND, &data); + pci_cfg_w32(pcidev, PCIR_COMMAND, (data|PCIM_CMD_PERRESPEN)); } #endif @@ -349,7 +349,7 @@ static int gr_rasta_tmtc0_hw_init(struct gr_rasta_tmtc_priv *priv) * poor performance (256 word fetches), 0xff will set it according * to the max size of the PCI FIFO. */ - pci_cfg_w8(pcidev, PCI_CACHE_LINE_SIZE, 0xff); + pci_cfg_w8(pcidev, PCIR_CACHELNSZ, 0xff); /* Scan AMBA Plug&Play */ @@ -442,7 +442,7 @@ static int gr_rasta_tmtc1_hw_init(struct gr_rasta_tmtc_priv *priv) struct pci_dev_info *devinfo = priv->devinfo; /* Check capabilities list bit */ - pci_cfg_r8(pcidev, PCI_STATUS, &tmp2); + pci_cfg_r8(pcidev, PCIR_STATUS, &tmp2); if (!((tmp2 >> 4) & 1)) { /* Capabilities list not available which it should be in the @@ -452,7 +452,7 @@ static int gr_rasta_tmtc1_hw_init(struct gr_rasta_tmtc_priv *priv) } /* Read capabilities pointer */ - pci_cfg_r8(pcidev, PCI_CAP_PTR, &cap_ptr); + pci_cfg_r8(pcidev, PCIR_CAP_PTR, &cap_ptr); /* Set AHB address mappings for target PCI bars * BAR0: 16MB : Mapped to I/O at 0x80000000 @@ -471,8 +471,8 @@ static int gr_rasta_tmtc1_hw_init(struct gr_rasta_tmtc_priv *priv) #if 0 /* set parity error response */ - pci_cfg_r32(pcidev, PCI_COMMAND, &data); - pci_cfg_w32(pcidev, PCI_COMMAND, (data|PCI_COMMAND_PARITY)); + pci_cfg_r32(pcidev, PCIR_COMMAND, &data); + pci_cfg_w32(pcidev, PCIR_COMMAND, (data|PCIM_CMD_PERRESPEN)); #endif /* Scan AMBA Plug&Play */ |