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| author | Daniel Hellstrom <daniel@gaisler.com> | 2013-03-06 15:08:31 +0100 |
|---|---|---|
| committer | Daniel Hellstrom <daniel@gaisler.com> | 2015-04-17 01:10:18 +0200 |
| commit | 552d4a9ce576cd58e6143c999f4362e821349bba (patch) | |
| tree | fa385c296321fa64a7b59b0888e50bd44bb0fef4 /c/src/lib/libbsp/sparc/shared/net | |
| parent | GRSPW: fixed SET_RMAPEN and SET_RMAPBUFDIS (diff) | |
| download | rtems-552d4a9ce576cd58e6143c999f4362e821349bba.tar.bz2 | |
GRPCI: initialize cache-line-size and latency timer
In some GRPCI cores not setting the cache line size could result
in long prefetches on the AMBA bus which would lead to bad
performance when doing PCI reads to GRPCI target interface (DMA).
Diffstat (limited to 'c/src/lib/libbsp/sparc/shared/net')
0 files changed, 0 insertions, 0 deletions