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authorSebastian Huber <sebastian.huber@embedded-brains.de>2015-09-25 14:34:24 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2015-09-28 13:56:57 +0200
commit258ad71e9626c16f30b40e06c321326636c976ff (patch)
treeda6e210947d590159796434bf04cf364247ac20a /c/src/lib/libbsp/sparc/shared/irq_asm.S
parentSMP: Simplify thread lock operations (diff)
downloadrtems-258ad71e9626c16f30b40e06c321326636c976ff.tar.bz2
SMP: Fix and optimize thread dispatching
According to the C11 and C++11 memory models only a read-modify-write operation guarantees that we read the last value written in modification order. Avoid the sequential consistent thread fence and instead use the inter-processor interrupt to set the thread dispatch necessary indicator.
Diffstat (limited to '')
-rw-r--r--c/src/lib/libbsp/sparc/shared/irq_asm.S20
1 files changed, 7 insertions, 13 deletions
diff --git a/c/src/lib/libbsp/sparc/shared/irq_asm.S b/c/src/lib/libbsp/sparc/shared/irq_asm.S
index f7222e7623..9d8600e0fe 100644
--- a/c/src/lib/libbsp/sparc/shared/irq_asm.S
+++ b/c/src/lib/libbsp/sparc/shared/irq_asm.S
@@ -236,24 +236,18 @@ check_is_executing:
beq try_update_is_executing
mov 1, %g1
- ! Check if a thread dispatch is necessary
- ldub [%g6 + PER_CPU_DISPATCH_NEEDED], %g1
- cmp %g1, 0
- beq check_is_executing
- nop
-
- ! We have a new heir
-
- ! Clear the thread dispatch necessary flag
- stub %g0, [%g6 + PER_CPU_DISPATCH_NEEDED]
-
- ! Here we assume a strong memory order, otherwise a memory barrier must
- ! be inserted here
+ ! We may have a new heir
! Read the executing and heir
ld [%g6 + PER_CPU_OFFSET_EXECUTING], %g1
ld [%g6 + PER_CPU_OFFSET_HEIR], %g2
+ ! Update the executing only if necessary to avoid cache line
+ ! monopolization.
+ cmp %g1, %g2
+ beq try_update_is_executing
+ mov 1, %g1
+
! Calculate the heir context pointer
sub %o1, %g1, %g1
add %g1, %g2, %o1