LEON: updated and added PCI peripherals for LEON BSPs

The CCHIP driver is replaced with the GR_701 driver. The
RASTA driver is replaced by the GR-RASTA-IO driver.

All drivers are now compatible with both LEON2 and LEON3,
drivers were initialized directly by the PCI-board drivers
are now initialized by the driver manager and therefore
does not require the double code created by including for
example grcan.c into grcan_rasta.c. The other drivers needs
to be updated to the driver manager framework however.

Added support for:
 * GR-701 (only LEON2 before)
 * GR-RASTA-IO (only LEON2 before)
 * GR-RASTA-ADCDAC
 * GR-RASTA-TMTC
 * GR-RASTA-SPW-ROUTER
 * GR-TMTC-1553

2 files changed, 0 insertions, 165 deletions

diff --git a/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c b/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c
deleted file mode 100644
index 8832e09a34..0000000000
--- a/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c
+++ /dev/null
@@ -1,100 +0,0 @@
-#include <rasta.h>
-#include <grcan_rasta.h>
-
-/* PCI frequency */
-#define SYS_FREQ_HZ 30000000
-
-/*#define USE_AT697_RAM              1      */
-
-/* memarea_to_hw(x)
- *
- * x: address in AT697 address space
- *
- * returns the address in the RASTA address space that can be used to access x with dma.
- *
-*/
-#ifdef USE_AT697_RAM
-static inline unsigned int memarea_to_hw(unsigned int addr) {
-    return ((addr & 0x0fffffff) | RASTA_PCI_BASE);
-}
-#else
-static inline unsigned int memarea_to_hw(unsigned int addr) {
-    return ((addr & 0x0fffffff) | RASTA_LOCAL_SRAM);
-}
-#endif
-
-#define MEMAREA_TO_HW(x) memarea_to_hw(x)
-
-#define IRQ_CLEAR_PENDING(irqno)
-#define IRQ_UNMASK(irqno)
-#define IRQ_MASK(irqno)
-
-#define IRQ_GLOBAL_PREPARE(level) rtems_interrupt_level level
-#define IRQ_GLOBAL_DISABLE(level) rtems_interrupt_disable(level)
-#define IRQ_GLOBAL_ENABLE(level) rtems_interrupt_enable(level)
-
-#define GRCAN_REG_INT(handler,irqno,arg) \
-  if ( grcan_rasta_int_reg ) \
-    grcan_rasta_int_reg(handler,irqno,arg);
-
-void (*grcan_rasta_int_reg)(void *handler, int irq, void *arg) = 0;
-
-#define GRCAN_PREFIX(name) grcan_rasta##name
-
-/* We provide our own handler */
-#define GRCAN_DONT_DECLARE_IRQ_HANDLER
-
-#define GRCAN_REG_BYPASS_CACHE
-#define GRCAN_DMA_BYPASS_CACHE
-
-#define GRCAN_MAX_CORES 1
-
-/* Custom Statically allocated memory */
-#undef STATICALLY_ALLOCATED_TX_BUFFER
-#undef STATICALLY_ALLOCATED_RX_BUFFER
-
-#define STATIC_TX_BUF_SIZE 4096
-#define STATIC_RX_BUF_SIZE 4096
-#define TX_BUF_SIZE 4096
-#define RX_BUF_SIZE 4096
-
-#define STATIC_TX_BUF_ADDR(core) \
-	((unsigned int *)\
-  (grcan_rasta_rambase+(core)*(STATIC_TX_BUF_SIZE+STATIC_RX_BUF_SIZE)))
-
-#define STATIC_RX_BUF_ADDR(core) \
-  ((unsigned int *) \
-	(grcan_rasta_rambase+(core)*(STATIC_TX_BUF_SIZE+STATIC_RX_BUF_SIZE)+STATIC_RX_BUF_SIZE))
-
-
-#define GRCAN_DEVNAME "/dev/grcan0"
-#define GRCAN_DEVNAME_NO(devstr,no) ((devstr)[10]='0'+(no))
-
-void grcan_rasta_interrupt_handler(int irq, void *pDev);
-
-unsigned int grcan_rasta_rambase;
-
-#include "grcan.c"
-
-
-int grcan_rasta_ram_register(struct ambapp_bus *abus, int rambase)
-{
-  grcan_rasta_rambase = rambase;
-
-  return GRCAN_PREFIX(_register)(abus);
-}
-#if 0
-static void grcan_rasta_interrupt_handler(int v)
-{
-  /* We know there is always only one GRCAN core in a RASTA chip... */
-  grcan_interrupt(&grcans[0]);
-  /*
-	struct grcan_priv *pDev = arg;
-	grcan_interrupt(pDev);
-  */
-}
-#endif
-void GRCAN_PREFIX(_interrupt_handler)(int irq, void *pDev)
-{
-  grcan_interrupt(pDev);
-}
diff --git a/c/src/lib/libbsp/sparc/shared/can/occan_pci.c b/c/src/lib/libbsp/sparc/shared/can/occan_pci.c
deleted file mode 100644
index 12273c99fc..0000000000
--- a/c/src/lib/libbsp/sparc/shared/can/occan_pci.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/* PCI cannot do byte accesses to addresses aligned byte wise
- * Use alternative reg map.
- */
-#define OCCAN_WORD_REGS
-
-#include <occan_pci.h>
-
-/* Set registered device name */
-#define OCCAN_DEVNAME "/dev/occanpci0"
-#define OCCAN_DEVNAME_NO(devstr,no) ((devstr)[13]='0'+(no))
-
-/* Any non-static function will begin with */
-#define OCCAN_PREFIX(name) occanpci##name
-
-/* do nothing, assume that the interrupt handler is called
- * setup externally calling b1553_interrupt_handler.
- */
-#define OCCAN_REG_INT(handler,irq,arg) \
- if ( occan_pci_int_reg ) \
-   occan_pci_int_reg(handler,irq,arg);
-
-void (*occan_pci_int_reg)(void *handler, int irq, void *arg) = 0;
-
-void occanpci_interrupt_handler(int irq, void *arg);
-
-/* AMBA Bus is clocked using the PCI clock (33.3MHz) */
-#define SYS_FREQ_HZ 33333333
-
-/* Enable two redundant channels */
-#define REDUNDANT_CHANNELS 2
-
-#define OCCAN_SET_CHANNEL(priv,channel) occanpci_set_channel(priv,channel)
-
-#include "occan.c"
-
-/* Define method that sets redundant channel
- * The channel select register:
- *  0x00 = byte regs
- *  0x40 = channel select
- *  0x80 = word regs
- */
-static void inline occanpci_set_channel(occan_priv *priv, int channel){
-	unsigned int *chan_sel = (unsigned int *)(((unsigned int)priv->regs & ~0xff)+0x40);
-	if ( channel == 0 )
-	  *chan_sel = 0;
-	else
-		*chan_sel = 0xffffffff;
-}
-
-int occan_pci_register(struct ambapp_bus *bus)
-{
-	/* Setup configuration */
-
-	/* Register the driver */
-	return OCCAN_PREFIX(_register)(bus);
-}
-
-
-/* Call this from PCI interrupt handler
- * irq = the irq number of the HW device local to that IRQMP controller
- *
- */
-void occanpci_interrupt_handler(int irq, void *arg){
-	occan_interrupt(arg);
-}