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authorRalf Corsepius <ralf.corsepius@rtems.org>2009-11-29 15:33:28 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2009-11-29 15:33:28 +0000
commit44b06ca617a8d8910a308037ebad06876085a6cc (patch)
treec9bd98f2ad44ad1fbfab11b51f9b09c9d3561d0b /c/src/lib/libbsp/sparc/shared/can
parentWhitespace removal. (diff)
downloadrtems-44b06ca617a8d8910a308037ebad06876085a6cc.tar.bz2
Whitespace removal.
Diffstat (limited to 'c/src/lib/libbsp/sparc/shared/can')
-rw-r--r--c/src/lib/libbsp/sparc/shared/can/grcan.c492
-rw-r--r--c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c18
-rw-r--r--c/src/lib/libbsp/sparc/shared/can/occan.c528
-rw-r--r--c/src/lib/libbsp/sparc/shared/can/occan_pci.c12
4 files changed, 525 insertions, 525 deletions
diff --git a/c/src/lib/libbsp/sparc/shared/can/grcan.c b/c/src/lib/libbsp/sparc/shared/can/grcan.c
index 0eb08585be..c176490c68 100644
--- a/c/src/lib/libbsp/sparc/shared/can/grcan.c
+++ b/c/src/lib/libbsp/sparc/shared/can/grcan.c
@@ -1,5 +1,5 @@
/*
- * GRCAN driver
+ * GRCAN driver
*
* COPYRIGHT (c) 2007.
* Gaisler Research.
@@ -55,15 +55,15 @@
#endif
#ifndef IRQ_CLEAR_PENDING
- #define IRQ_CLEAR_PENDING(irqno)
+ #define IRQ_CLEAR_PENDING(irqno)
#endif
#ifndef IRQ_UNMASK
- #define IRQ_UNMASK(irqno)
+ #define IRQ_UNMASK(irqno)
#endif
#ifndef IRQ_MASK
- #define IRQ_MASK(irqno)
+ #define IRQ_MASK(irqno)
#endif
#ifndef GRCAN_PREFIX
@@ -116,53 +116,53 @@
#define BUFFER_ALIGNMENT_NEEDS 1024
#ifdef STATICALLY_ALLOCATED_TX_BUFFER
-static unsigned int tx_circbuf[GRCAN_MAX_CORES][TX_BUF_SIZE]
+static unsigned int tx_circbuf[GRCAN_MAX_CORES][TX_BUF_SIZE]
__attribute__ ((aligned(BUFFER_ALIGNMENT_NEEDS)));
#define STATIC_TX_BUF_SIZE TX_BUF_SIZE
#define STATIC_TX_BUF_ADDR(core) (&tx_circbuf[(core)][0])
#endif
#ifdef STATICALLY_ALLOCATED_RX_BUFFER
-static unsigned int rx_circbuf[GRCAN_MAX_CORES][RX_BUF_SIZE]
+static unsigned int rx_circbuf[GRCAN_MAX_CORES][RX_BUF_SIZE]
__attribute__ ((aligned(BUFFER_ALIGNMENT_NEEDS)));
#define STATIC_RX_BUF_SIZE RX_BUF_SIZE
#define STATIC_RX_BUF_ADDR(core) (&rx_circbuf[(core)][0])
#endif
-/*
+/*
* If USE_AT697_RAM is defined the RAM on the AT697 board will be used for DMA buffers (but rx message queue is always in AT697 ram).
* USE_AT697_DMA specifies whether the messages will be fetched using DMA or PIO.
*
* RASTA_PCI_BASE is the base address of the GRPCI AHB slave
- *
+ *
* GRCAN_BUF_SIZE must be set to the size (in bytes) of the GRCAN DMA buffers.
*
- * RX_QUEUE_SIZE defines the number of messages that fits in the RX message queue. On RX interrupts the messages in the DMA buffer
+ * RX_QUEUE_SIZE defines the number of messages that fits in the RX message queue. On RX interrupts the messages in the DMA buffer
* are copied into the message queue (using dma if the rx buf is not in the AT697 ram).
*/
/*#define USE_AT697_RAM 1 */
-#define USE_AT697_DMA 1
-#define RASTA_PCI_BASE 0xe0000000
-#define GRCAN_BUF_SIZE 4096
-#define RX_QUEUE_SIZE 1024
+#define USE_AT697_DMA 1
+#define RASTA_PCI_BASE 0xe0000000
+#define GRCAN_BUF_SIZE 4096
+#define RX_QUEUE_SIZE 1024
#define INDEX(x) ( x&(RX_QUEUE_SIZE-1) )
-/* pa(x)
+/* pa(x)
*
* x: address in AT697 address space
- *
+ *
* returns the address in the RASTA address space that can be used to access x with dma.
- *
+ *
*/
#ifdef USE_AT697_RAM
static inline unsigned int pa(unsigned int addr) {
- return ((addr & 0x0fffffff) | RASTA_PCI_BASE);
+ return ((addr & 0x0fffffff) | RASTA_PCI_BASE);
}
#else
static inline unsigned int pa(unsigned int addr) {
- return ((addr & 0x0fffffff) | 0x40000000);
+ return ((addr & 0x0fffffff) | 0x40000000);
}
#endif
@@ -188,7 +188,7 @@ struct grcan_priv {
unsigned int channel;
int flushing;
unsigned int corefreq_hz;
-
+
/* Circular DMA buffers */
void *_rx;
void *_tx;
@@ -200,13 +200,13 @@ struct grcan_priv {
int txblock, rxblock;
int txcomplete, rxcomplete;
int txerror, rxerror;
-
+
struct grcan_filter sfilter;
struct grcan_filter afilter;
int config_changed; /* 0=no changes, 1=changes ==> a Core reset is needed */
struct grcan_config config;
struct grcan_stats stats;
-
+
rtems_id rx_sem, tx_sem, txempty_sem, dev_sem;
};
@@ -238,9 +238,9 @@ static unsigned int grcan_hw_write_try(
int count);
static void grcan_hw_config(
- struct grcan_regs *regs,
+ struct grcan_regs *regs,
struct grcan_config *conf);
-
+
static void grcan_hw_accept(
struct grcan_regs *regs,
struct grcan_filter *afilter);
@@ -302,13 +302,13 @@ static rtems_device_driver grcan_start(struct grcan_priv *pDev)
{
unsigned int tmp;
IRQ_GLOBAL_PREPARE(oldLevel);
-
+
FUNCDBG();
-
+
/* Check that memory has been allocated successfully */
if ( !pDev->tx || !pDev->rx )
return RTEMS_NO_MEMORY;
-
+
/* Configure FIFO configuration register
* and Setup timing
*/
@@ -320,37 +320,37 @@ static rtems_device_driver grcan_start(struct grcan_priv *pDev)
/* Setup receiver */
pDev->regs->rx0addr = MEMAREA_TO_HW((unsigned int)pDev->rx);
pDev->regs->rx0size = pDev->rxbuf_size;
-
+
/* Setup Transmitter */
pDev->regs->tx0addr = MEMAREA_TO_HW((unsigned int)pDev->tx);
pDev->regs->tx0size = pDev->txbuf_size;
-
+
/* Setup acceptance filters */
grcan_hw_accept(pDev->regs,&pDev->afilter);
-
+
/* Sync filters */
grcan_hw_sync(pDev->regs,&pDev->sfilter);
-
+
/* Clear status bits */
tmp = READ_REG(&pDev->regs->stat);
pDev->regs->stat = 0;
-
+
/* Setup IRQ handling */
-
- /* Clear all IRQs */
+
+ /* Clear all IRQs */
tmp = READ_REG(&pDev->regs->pir);
pDev->regs->picr = 0x1ffff;
-
+
/* unmask TxLoss|TxErrCntr|RxErrCntr|TxAHBErr|RxAHBErr|OR|OFF|PASS */
pDev->regs->imr = 0x1601f;
-
+
/* Enable routing of the IRQs */
IRQ_GLOBAL_DISABLE(oldLevel);
IRQ_UNMASK(pDev->irq+GRCAN_IRQ_TXSYNC);
IRQ_UNMASK(pDev->irq+GRCAN_IRQ_RXSYNC);
IRQ_UNMASK(pDev->irq+GRCAN_IRQ_IRQ);
IRQ_GLOBAL_ENABLE(oldLevel);
-
+
/* Reset some software data */
/*pDev->txerror = 0;
pDev->rxerror = 0;*/
@@ -358,11 +358,11 @@ static rtems_device_driver grcan_start(struct grcan_priv *pDev)
/* Enable receiver/transmitter */
pDev->regs->rx0ctrl = GRCAN_RXCTRL_ENABLE;
pDev->regs->tx0ctrl = GRCAN_TXCTRL_ENABLE;
-
+
/* Enable HurriCANe core */
pDev->regs->ctrl = GRCAN_CTRL_ENABLE;
-
- /* Leave transmitter disabled, it is enabled when
+
+ /* Leave transmitter disabled, it is enabled when
* trying to send something.
*/
return RTEMS_SUCCESSFUL;
@@ -371,19 +371,19 @@ static rtems_device_driver grcan_start(struct grcan_priv *pDev)
static void grcan_stop(struct grcan_priv *pDev)
{
FUNCDBG();
-
+
/* Mask all IRQs */
pDev->regs->imr = 0;
IRQ_MASK(pDev->irq+GRCAN_IRQ_TXSYNC);
IRQ_MASK(pDev->irq+GRCAN_IRQ_RXSYNC);
IRQ_MASK(pDev->irq+GRCAN_IRQ_IRQ);
-
+
/* Disable receiver & transmitter */
pDev->regs->rx0ctrl = 0;
pDev->regs->tx0ctrl = 0;
-
+
/* Reset semaphores to the initial state and wakeing
- * all threads waiting for an IRQ. The threads that
+ * all threads waiting for an IRQ. The threads that
* get woken up must check for RTEMS_UNSATISFIED in
* order to determine that they should return to
* user space with error status.
@@ -394,40 +394,40 @@ static void grcan_stop(struct grcan_priv *pDev)
}
static void grcan_hw_config(
- struct grcan_regs *regs,
+ struct grcan_regs *regs,
struct grcan_config *conf
)
{
unsigned int config=0;
-
+
/* Reset HurriCANe Core */
regs->ctrl = 0;
-
+
if ( conf->silent )
config |= GRCAN_CFG_SILENT;
-
+
if ( conf->abort )
config |= GRCAN_CFG_ABORT;
-
+
if ( conf->selection.selection )
config |= GRCAN_CFG_SELECTION;
-
+
if ( conf->selection.enable0 )
config |= GRCAN_CFG_ENABLE0;
-
+
if ( conf->selection.enable1 )
config |= GRCAN_CFG_ENABLE1;
-
+
/* Timing */
config |= (conf->timing.bpr<<GRCAN_CFG_BPR_BIT) & GRCAN_CFG_BPR;
config |= (conf->timing.rsj<<GRCAN_CFG_RSJ_BIT) & GRCAN_CFG_RSJ;
config |= (conf->timing.ps1<<GRCAN_CFG_PS1_BIT) & GRCAN_CFG_PS1;
config |= (conf->timing.ps2<<GRCAN_CFG_PS2_BIT) & GRCAN_CFG_PS2;
config |= (conf->timing.scaler<<GRCAN_CFG_SCALER_BIT) & GRCAN_CFG_SCALER;
-
+
/* Write configuration */
regs->conf = config;
-
+
/* Enable HurriCANe Core */
regs->ctrl = GRCAN_CTRL_ENABLE;
}
@@ -439,9 +439,9 @@ static void grcan_hw_accept(
{
/* Disable Sync mask totaly (if we change scode or smask
* in an unfortunate way we may trigger a sync match)
- */
+ */
regs->rx0mask = 0xffffffff;
-
+
/* Set Sync Filter in a controlled way */
regs->rx0code = afilter->code;
regs->rx0mask = afilter->mask;
@@ -454,9 +454,9 @@ static void grcan_hw_sync(
{
/* Disable Sync mask totaly (if we change scode or smask
* in an unfortunate way we may trigger a sync match)
- */
+ */
regs->smask = 0xffffffff;
-
+
/* Set Sync Filter in a controlled way */
regs->scode = sfilter->code;
regs->smask = sfilter->mask;
@@ -467,14 +467,14 @@ static unsigned int grcan_hw_rxavail(
unsigned int wp,
unsigned int size
)
-{
+{
if ( rp == wp ) {
- /* read pointer and write pointer is equal only
+ /* read pointer and write pointer is equal only
* when RX buffer is empty.
*/
return 0;
}
-
+
if ( wp > rp ) {
return (wp-rp)/GRCAN_MSG_SIZE;
}else{
@@ -489,21 +489,21 @@ static unsigned int grcan_hw_txspace(
)
{
unsigned int left;
-
+
if ( rp == wp ) {
- /* read pointer and write pointer is equal only
+ /* read pointer and write pointer is equal only
* when TX buffer is empty.
*/
return size/GRCAN_MSG_SIZE-WRAP_AROUND_TX_MSGS;
}
-
+
/* size - 4 - abs(read-write) */
if ( wp > rp ) {
left = size-(wp-rp);
}else{
left = rp-wp;
}
-
+
return left/GRCAN_MSG_SIZE-WRAP_AROUND_TX_MSGS;
}
@@ -535,7 +535,7 @@ static int grcan_calc_timing(
int best_tseg=0, best_brp=0, best_rate=0, brp=0;
int tseg=0, tseg1=0, tseg2=0;
int sjw = 1;
-
+
/* Default to 90% */
if ( (sampl_pt < 50) || (sampl_pt>99) ){
sampl_pt = GRCAN_SAMPLING_POINT;
@@ -545,8 +545,8 @@ static int grcan_calc_timing(
/* invalid speed mode */
return -1;
}
-
- /* find best match, return -2 if no good reg
+
+ /* find best match, return -2 if no good reg
* combination is available for this frequency
*/
@@ -563,7 +563,7 @@ static int grcan_calc_timing(
tseg++)
{
brp = core_hz / ((1 + tseg / 2) * baud) + tseg % 2;
- if ((brp <= 0) ||
+ if ((brp <= 0) ||
( (brp > 256*1) && (brp <= 256*2) && (brp&0x1) ) ||
( (brp > 256*2) && (brp <= 256*4) && (brp&0x3) ) ||
( (brp > 256*4) && (brp <= 256*8) && (brp&0x7) ) ||
@@ -611,7 +611,7 @@ static int grcan_calc_timing(
tseg1 = MAX_TSEG1;
tseg2 = best_tseg - tseg1 - 2;
}
-
+
/* Get scaler and BRP from pseudo BRP */
if ( best_brp <= 256 ){
timing->scaler = best_brp;
@@ -626,7 +626,7 @@ static int grcan_calc_timing(
timing->scaler = ((best_brp+1)>>3) -1;
timing->bpr = 3;
}
-
+
timing->ps1 = tseg1+1;
timing->ps2 = tseg2;
timing->rsj = sjw;
@@ -637,7 +637,7 @@ static int grcan_calc_timing(
static unsigned int grcan_hw_read_try(
struct grcan_priv *pDev,
struct grcan_regs *regs,
- CANMsg *buffer,
+ CANMsg *buffer,
int max
)
{
@@ -645,14 +645,14 @@ static unsigned int grcan_hw_read_try(
CANMsg *dest;
struct grcan_msg *source,tmp;
unsigned int wp,rp,size,rxmax,addr,trunk_msg_cnt;
-
+
FUNCDBG();
-
+
wp = READ_REG(&regs->rx0wr);
rp = READ_REG(&regs->rx0rd);
-
+
/*
- * Due to hardware wrap around simplification write pointer will
+ * Due to hardware wrap around simplification write pointer will
* never reach the read pointer, at least a gap of 8 bytes.
* The only time they are equal is when the read pointer has
* reached the write pointer (empty buffer)
@@ -663,24 +663,24 @@ static unsigned int grcan_hw_read_try(
* Read as much as possible from DMA buffer
*/
size = READ_REG(&regs->rx0size);
-
+
/* Get number of bytes available in RX buffer */
trunk_msg_cnt = grcan_hw_rxavail(rp,wp,size);
-
- /* truncate size if user space buffer hasn't room for
+
+ /* truncate size if user space buffer hasn't room for
* all received chars.
*/
if ( trunk_msg_cnt > max )
trunk_msg_cnt = max;
-
+
/* Read until i is 0 */
i=trunk_msg_cnt;
-
+
addr = (unsigned int)pDev->rx;
source = (struct grcan_msg *)(addr + rp);
dest = buffer;
rxmax = addr + (size-GRCAN_MSG_SIZE);
-
+
/* Read as many can messages as possible */
while(i>0){
/* Read CAN message from DMA buffer */
@@ -697,14 +697,14 @@ static unsigned int grcan_hw_read_try(
dest->len = tmp.head[1] >> 28;
for(j=0; j<dest->len; j++)
dest->data[j] = READ_DMA_BYTE(&source->data[j]);
-
+
/* wrap around if neccessary */
source = ( (unsigned int)source >= rxmax ) ? (struct grcan_msg *)addr : source+1;
dest++; /* straight user buffer */
i--;
}
/* Increment Hardware READ pointer (mark read byte as read)
- * ! wait for registers to be safely re-configurable
+ * ! wait for registers to be safely re-configurable
*/
regs->rx0ctrl = 0; /* DISABLE RX CHANNEL */
i=0;
@@ -731,31 +731,31 @@ static unsigned int grcan_hw_write_try(
int space_left;
unsigned int tmp;
int i;
-
+
DBGC(DBG_TX,"\n");
/*FUNCDBG();*/
-
+
rp = READ_REG(&regs->tx0rd);
wp = READ_REG(&regs->tx0wr);
size = READ_REG(&regs->tx0size);
-
+
space_left = grcan_hw_txspace(rp,wp,size);
-
+
/* is circular fifo full? */
if ( space_left < 1 )
return 0;
-
+
/* Truncate size */
if ( space_left > count )
space_left = count;
ret = space_left;
-
+
addr = (unsigned int)pDev->tx;
-
+
dest = (struct grcan_msg *)(addr + wp);
source = (CANMsg *)buffer;
txmax = addr + (size-GRCAN_MSG_SIZE);
-
+
while ( space_left>0 ) {
/* Convert and write CAN message to DMA buffer */
if ( source->extended ){
@@ -773,9 +773,9 @@ static unsigned int grcan_hw_write_try(
dest = ((unsigned int)dest >= txmax) ? (struct grcan_msg *)addr : dest+1;
space_left--;
}
-
- /* Update write pointer
- * ! wait for registers to be safely re-configurable
+
+ /* Update write pointer
+ * ! wait for registers to be safely re-configurable
*/
regs->tx0ctrl = 0; /* DISABLE TX CHANNEL */
i=0;
@@ -796,19 +796,19 @@ static int grcan_wait_rxdata(
unsigned int irq_trunk, dataavail;
int wait;
IRQ_GLOBAL_PREPARE(oldLevel);
-
+
FUNCDBG();
- /*** block until receive IRQ received
- * Set up a valid IRQ point so that an IRQ is received
+ /*** block until receive IRQ received
+ * Set up a valid IRQ point so that an IRQ is received
* when one or more messages are received
*/
IRQ_GLOBAL_DISABLE(oldLevel);
-
+
size = READ_REG(&pDev->regs->rx0size);
rp = READ_REG(&pDev->regs->rx0rd);
wp = READ_REG(&pDev->regs->rx0wr);
-
+
/**** Calculate IRQ Pointer ****/
irq = wp + min*GRCAN_MSG_SIZE;
/* wrap irq around */
@@ -816,18 +816,18 @@ static int grcan_wait_rxdata(
irq_trunk = irq-size;
}else
irq_trunk = irq;
-
+
/* init IRQ HW */
pDev->regs->rx0irq = irq_trunk;
-
+
/* Clear pending Rx IRQ */
pDev->regs->picr = GRCAN_RXIRQ_IRQ;
-
+
wp = READ_REG(&pDev->regs->rx0wr);
-
+
/* Calculate messages available */
dataavail = grcan_hw_rxavail(rp,wp,size);
-
+
if ( dataavail < min ){
/* Still empty, proceed with sleep - Turn on IRQ (unmask irq) */
pDev->regs->imr = READ_REG(&pDev->regs->imr) | GRCAN_RXIRQ_IRQ;
@@ -837,20 +837,20 @@ static int grcan_wait_rxdata(
wait=0;
}
IRQ_GLOBAL_ENABLE(oldLevel);
-
+
/* Wait for IRQ to fire only if has been triggered */
if ( wait ){
if ( rtems_semaphore_obtain(pDev->rx_sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT) == RTEMS_UNSATISFIED )
return -1; /* Device driver has been closed or stopped, return with error status */
}
-
+
return 0;
}
/* Wait until min bytes available in TX circular buffer.
* The IRQ RxIrq is used to pin point the location of
- *
- * min must be at least WRAP_AROUND_TX_BYTES bytes less
+ *
+ * min must be at least WRAP_AROUND_TX_BYTES bytes less
* than max buffer for this algo to work.
*
*/
@@ -863,19 +863,19 @@ static int grcan_wait_txspace(
unsigned int irq, rp, wp, size, space_left;
unsigned int irq_trunk;
IRQ_GLOBAL_PREPARE(oldLevel);
-
+
DBGC(DBG_TX,"\n");
/*FUNCDBG();*/
-
+
IRQ_GLOBAL_DISABLE(oldLevel);
/*pDev->regs->tx0ctrl = GRCAN_TXCTRL_ENABLE;*/
-
+
size = READ_REG(&pDev->regs->tx0size);
- wp = READ_REG(&pDev->regs->tx0wr);
-
+ wp = READ_REG(&pDev->regs->tx0wr);
+
rp = READ_REG(&pDev->regs->tx0rd);
-
+
/**** Calculate IRQ Pointer ****/
irq = rp + min*GRCAN_MSG_SIZE;
/* wrap irq around */
@@ -883,24 +883,24 @@ static int grcan_wait_txspace(
irq_trunk = irq - size;
}else
irq_trunk = irq;
-
+
/* trigger HW to do a IRQ when enough room in buffer */
pDev->regs->tx0irq = irq_trunk;
-
+
/* Clear pending Tx IRQ */
pDev->regs->picr = GRCAN_TXIRQ_IRQ;
-
- /* One problem, if HW already gone past IRQ place the IRQ will
+
+ /* One problem, if HW already gone past IRQ place the IRQ will
* never be received resulting in a thread hang. We check if so
* before proceeding.
- *
- * has the HW already gone past the IRQ generation place?
+ *
+ * has the HW already gone past the IRQ generation place?
* == does min fit info tx buffer?
*/
rp = READ_REG(&pDev->regs->tx0rd);
-
+
space_left = grcan_hw_txspace(rp,wp,size);
-
+
if ( space_left < min ){
/* Still too full, proceed with sleep - Turn on IRQ (unmask irq) */
pDev->regs->imr = READ_REG(&pDev->regs->imr) | GRCAN_TXIRQ_IRQ;
@@ -910,17 +910,17 @@ static int grcan_wait_txspace(
wait=0;
}
IRQ_GLOBAL_ENABLE(oldLevel);
-
+
/* Wait for IRQ to fire only if it has been triggered */
if ( wait ){
if ( rtems_semaphore_obtain(pDev->tx_sem, RTEMS_WAIT, 100) ==
RTEMS_UNSATISFIED ){
- /* Device driver has flushed us, this may be due to another thread has
+ /* Device driver has flushed us, this may be due to another thread has
* closed the device, this is to avoid deadlock */
return -1;
}
}
-
+
/* At this point the TxIRQ has been masked, we ned not to mask it */
return 0;
}
@@ -931,10 +931,10 @@ static int grcan_tx_flush(struct grcan_priv *pDev)
unsigned int rp, wp;
IRQ_GLOBAL_PREPARE(oldLevel);
FUNCDBG();
-
+
/* loop until all data in circular buffer has been read by hw.
* (write pointer != read pointer )
- *
+ *
* Hardware doesn't update write pointer - we do
*/
while ( (wp=READ_REG(&pDev->regs->tx0wr)) != (rp=READ_REG(&pDev->regs->tx0rd)) ) {
@@ -942,7 +942,7 @@ static int grcan_tx_flush(struct grcan_priv *pDev)
IRQ_GLOBAL_DISABLE(oldLevel);
/* Clear pending TXEmpty IRQ */
pDev->regs->picr = GRCAN_TXEMPTY_IRQ;
-
+
if ( wp != READ_REG(&pDev->regs->tx0rd) ) {
/* Still not empty, proceed with sleep - Turn on IRQ (unmask irq) */
pDev->regs->imr = READ_REG(&pDev->regs->imr) | GRCAN_TXEMPTY_IRQ;
@@ -954,7 +954,7 @@ static int grcan_tx_flush(struct grcan_priv *pDev)
IRQ_GLOBAL_ENABLE(oldLevel);
if ( !wait )
break;
-
+
/* Wait for IRQ to wake us */
if ( rtems_semaphore_obtain(pDev->txempty_sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT) ==
RTEMS_UNSATISFIED ) {
@@ -967,7 +967,7 @@ static int grcan_tx_flush(struct grcan_priv *pDev)
static int grcan_alloc_buffers(struct grcan_priv *pDev, int rx, int tx)
{
FUNCDBG();
-
+
if ( tx ) {
#ifdef STATIC_TX_BUF_ADDR
pDev->_tx = STATIC_TX_BUF_ADDR(pDev->minor);
@@ -984,11 +984,11 @@ static int grcan_alloc_buffers(struct grcan_priv *pDev, int rx, int tx)
/* Align TX buffer */
pDev->tx = (struct grcan_msg *)
- (((unsigned int)pDev->_tx + (BUFFER_ALIGNMENT_NEEDS-1)) &
+ (((unsigned int)pDev->_tx + (BUFFER_ALIGNMENT_NEEDS-1)) &
~(BUFFER_ALIGNMENT_NEEDS-1));
#endif
}
-
+
if ( rx ) {
#ifdef STATIC_RX_BUF_ADDR
pDev->_rx = STATIC_RX_BUF_ADDR(pDev->minor);
@@ -1004,8 +1004,8 @@ static int grcan_alloc_buffers(struct grcan_priv *pDev, int rx, int tx)
return -1;
/* Align TX buffer */
- pDev->rx = (struct grcan_msg *)
- (((unsigned int)pDev->_rx + (BUFFER_ALIGNMENT_NEEDS-1)) &
+ pDev->rx = (struct grcan_msg *)
+ (((unsigned int)pDev->_rx + (BUFFER_ALIGNMENT_NEEDS-1)) &
~(BUFFER_ALIGNMENT_NEEDS-1));
#endif
}
@@ -1015,7 +1015,7 @@ static int grcan_alloc_buffers(struct grcan_priv *pDev, int rx, int tx)
static void grcan_free_buffers(struct grcan_priv *pDev, int rx, int tx)
{
FUNCDBG();
-
+
#ifndef STATIC_TX_BUF_ADDR
if ( tx && pDev->_tx ){
free(pDev->_tx);
@@ -1043,7 +1043,7 @@ static char *almalloc(int sz)
#endif
static rtems_device_driver grcan_initialize(
- rtems_device_major_number major,
+ rtems_device_major_number major,
rtems_device_minor_number unused,
void *arg
)
@@ -1059,9 +1059,9 @@ static rtems_device_driver grcan_initialize(
printk("grcan_initialize()\n\r");
FUNCDBG();
-
+
/* find GRCAN cores */
- if ( !grcan_cores ) {
+ if ( !grcan_cores ) {
grcan_core_cnt = amba_get_number_apbslv_devices(amba_bus,VENDOR_GAISLER,deviceid);
if ( grcan_core_cnt < 1 ){
deviceid = GAISLER_GRCAN;
@@ -1129,7 +1129,7 @@ static rtems_device_driver grcan_initialize(
pDev->open = 0;
pDev->corefreq_hz = sys_freq_hz;
GRCAN_DEVNAME_NO(fs_name,minor);
-
+
/* Find core address & IRQ */
if ( !grcan_cores ) {
amba_find_next_apbslv(amba_bus,VENDOR_GAISLER,deviceid,&dev,minor);
@@ -1139,28 +1139,28 @@ static rtems_device_driver grcan_initialize(
pDev->irq = grcan_cores[minor].irq;
pDev->regs = (struct grcan_regs *)grcan_cores[minor].base_address;
}
-
+
printk("Registering GRCAN core at [0x%x] irq %d, minor %d as %s\n\r",pDev->regs,pDev->irq,minor,fs_name);
-
+
status = rtems_io_register_name(fs_name, major, 0);
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
-
+
/* Reset Hardware before attaching IRQ handler */
grcan_hw_reset(pDev->regs);
-
+
/* Register interrupt handler */
GRCAN_REG_INT(GRCAN_PREFIX(_interrupt_handler), pDev->irq+GRCAN_IRQ_IRQ, pDev);
/*
GRCAN_REG_INT(grcan_interrupt_handler, pDev->irq+GRCAN_IRQ_TXSYNC, pDev);
GRCAN_REG_INT(grcan_interrupt_handler, pDev->irq+GRCAN_IRQ_RXSYNC, pDev);
*/
-
+
/* RX Semaphore created with count = 0 */
if ( rtems_semaphore_create(rtems_build_name('G', 'C', 'R', '0'+minor),
0,
RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|\
- RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
+ RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0,
&pDev->rx_sem) != RTEMS_SUCCESSFUL )
return RTEMS_INTERNAL_ERROR;
@@ -1169,7 +1169,7 @@ static rtems_device_driver grcan_initialize(
if ( rtems_semaphore_create(rtems_build_name('G', 'C', 'T', '0'+minor),
0,
RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|\
- RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
+ RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0,
&pDev->tx_sem) != RTEMS_SUCCESSFUL )
return RTEMS_INTERNAL_ERROR;
@@ -1178,7 +1178,7 @@ static rtems_device_driver grcan_initialize(
if ( rtems_semaphore_create(rtems_build_name('G', 'C', 'E', '0'+minor),
0,
RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|\
- RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
+ RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0,
&pDev->txempty_sem) != RTEMS_SUCCESSFUL )
return RTEMS_INTERNAL_ERROR;
@@ -1199,14 +1199,14 @@ static rtems_device_driver grcan_initialize(
static rtems_device_driver grcan_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) {
struct grcan_priv *pDev;
rtems_device_driver ret;
-
+
FUNCDBG();
if ( (minor < 0) || (minor>=grcan_core_cnt) ) {
DBG("Wrong minor %d\n", minor);
return RTEMS_INVALID_NUMBER;
}
-
+
pDev = &grcans[minor];
/* Wait until we get semaphore */
@@ -1214,7 +1214,7 @@ static rtems_device_driver grcan_open(rtems_device_major_number major, rtems_dev
RTEMS_SUCCESSFUL ){
return RTEMS_INTERNAL_ERROR;
}
-
+
/* is device busy/taken? */
if ( pDev->open ) {
ret=RTEMS_RESOURCE_IN_USE;
@@ -1239,26 +1239,26 @@ static rtems_device_driver grcan_open(rtems_device_major_number major, rtems_dev
pDev->txbuf_size = TX_BUF_SIZE;
pDev->rxbuf_size = RX_BUF_SIZE;
printk("Defaulting to rxbufsize: %d, txbufsize: %d\n",RX_BUF_SIZE,TX_BUF_SIZE);
-
+
/* Default to accept all messages */
pDev->afilter.mask = 0x00000000;
pDev->afilter.code = 0x00000000;
-
+
/* Default to disable sync messages (only trigger when id is set to all ones) */
pDev->sfilter.mask = 0xffffffff;
pDev->sfilter.code = 0x00000000;
-
+
/* Calculate default timing register values */
grcan_calc_timing(GRCAN_DEFAULT_BAUD,pDev->corefreq_hz,GRCAN_SAMPLING_POINT,&pDev->config.timing);
-
+
if ( grcan_alloc_buffers(pDev,1,1) ) {
ret=RTEMS_NO_MEMORY;
goto out;
}
-
+
/* Clear statistics */
memset(&pDev->stats,0,sizeof(struct grcan_stats));
-
+
ret = RTEMS_SUCCESSFUL;
out:
rtems_semaphore_release(pDev->dev_sem);
@@ -1268,16 +1268,16 @@ out:
static rtems_device_driver grcan_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{
struct grcan_priv *pDev = &grcans[minor];
-
+
FUNCDBG();
-
+
if ( pDev->started )
grcan_stop(pDev);
-
+
grcan_hw_reset(pDev->regs);
-
+
grcan_free_buffers(pDev,1,1);
-
+
/* Mark Device as closed */
pDev->open = 0;
@@ -1287,25 +1287,25 @@ static rtems_device_driver grcan_close(rtems_device_major_number major, rtems_de
static rtems_device_driver grcan_read(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{
struct grcan_priv *pDev = &grcans[minor];
- rtems_libio_rw_args_t *rw_args;
+ rtems_libio_rw_args_t *rw_args;
CANMsg *dest;
unsigned int count, left;
int req_cnt;
-
+
rw_args = (rtems_libio_rw_args_t *) arg;
dest = (CANMsg *) rw_args->buffer;
req_cnt = rw_args->count / sizeof(CANMsg);
FUNCDBG();
-
+
if ( (!dest) || (req_cnt<1) )
return RTEMS_INVALID_NAME;
-
+
if ( !pDev->started )
return RTEMS_RESOURCE_IN_USE;
/* FUNCDBG("grcan_read [%i,%i]: buf: 0x%x len: %i\n",major, minor, (unsigned int)rw_args->buffer,rw_args->count);*/
-
+
count = grcan_hw_read_try(pDev,pDev->regs,dest,req_cnt);
if ( !( pDev->rxblock && pDev->rxcomplete && (count!=req_cnt) ) ){
if ( count > 0 ) {
@@ -1313,7 +1313,7 @@ static rtems_device_driver grcan_read(rtems_device_major_number major, rtems_dev
rw_args->bytes_moved = count * sizeof(CANMsg);
return RTEMS_SUCCESSFUL;
}
-
+
/* nothing read, shall we block? */
if ( !pDev->rxblock ) {
/* non-blocking mode */
@@ -1323,13 +1323,13 @@ static rtems_device_driver grcan_read(rtems_device_major_number major, rtems_dev
}
while(count == 0 || (pDev->rxcomplete && (count!=req_cnt)) ){
-
+
if ( !pDev->rxcomplete ){
left = 1; /* return as soon as there is one message available */
}else{
left = req_cnt - count; /* return as soon as all data are available */
- /* never wait for more than the half the maximum size of the receive buffer
+ /* never wait for more than the half the maximum size of the receive buffer
* Why? We need some time to copy buffer before to catch up with hw, otherwise
* we would have to copy everything when the data has been received.
*/
@@ -1339,14 +1339,14 @@ static rtems_device_driver grcan_read(rtems_device_major_number major, rtems_dev
}
if ( grcan_wait_rxdata(pDev,left) ) {
- /* The wait has been aborted, probably due to
+ /* The wait has been aborted, probably due to
* the device driver has been closed by another
* thread.
*/
rw_args->bytes_moved = count * sizeof(CANMsg);
return RTEMS_UNSATISFIED;
}
-
+
/* Try read bytes from circular buffer */
count += grcan_hw_read_try(
pDev,
@@ -1358,7 +1358,7 @@ static rtems_device_driver grcan_read(rtems_device_major_number major, rtems_dev
rw_args->bytes_moved = count * sizeof(CANMsg);
return RTEMS_SUCCESSFUL;
}
-
+
static rtems_device_driver grcan_write(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{
struct grcan_priv *pDev = &grcans[minor];
@@ -1366,22 +1366,22 @@ static rtems_device_driver grcan_write(rtems_device_major_number major, rtems_de
CANMsg *source;
unsigned int count, left;
int req_cnt;
-
+
DBGC(DBG_TX,"\n");
/*FUNCDBG();*/
-
+
if ( !pDev->started || pDev->config.silent || pDev->flushing )
return RTEMS_RESOURCE_IN_USE;
-
+
rw_args = (rtems_libio_rw_args_t *) arg;
req_cnt = rw_args->count / sizeof(CANMsg);
source = (CANMsg *) rw_args->buffer;
-
+
/* check proper length and buffer pointer */
if (( req_cnt < 1) || (source == NULL) ){
return RTEMS_INVALID_NAME;
}
-
+
count = grcan_hw_write_try(pDev,pDev->regs,source,req_cnt);
if ( !(pDev->txblock && pDev->txcomplete && (count!=req_cnt)) ) {
if ( count > 0 ) {
@@ -1389,7 +1389,7 @@ static rtems_device_driver grcan_write(rtems_device_major_number major, rtems_de
rw_args->bytes_moved = count * sizeof(CANMsg);
return RTEMS_SUCCESSFUL;
}
-
+
/* nothing written, shall we block? */
if ( !pDev->txblock ) {
/* non-blocking mode */
@@ -1397,29 +1397,29 @@ static rtems_device_driver grcan_write(rtems_device_major_number major, rtems_de
return RTEMS_TIMEOUT;
}
}
-
+
/* if in txcomplete mode we need to transmit all chars */
while((count == 0) || (pDev->txcomplete && (count!=req_cnt)) ){
/*** block until room to fit all or as much of transmit buffer as possible IRQ comes
- * Set up a valid IRQ point so that an IRQ is received
+ * Set up a valid IRQ point so that an IRQ is received
* when we can put a chunk of data into transmit fifo
*/
if ( !pDev->txcomplete ){
left = 1; /* wait for anything to fit buffer */
}else{
left = req_cnt - count; /* wait for all data to fit in buffer */
-
- /* never wait for more than the half the maximum size of the transmitt buffer
+
+ /* never wait for more than the half the maximum size of the transmitt buffer
* Why? We need some time to fill buffer before hw catches up.
*/
if ( left > ((pDev->txbuf_size/GRCAN_MSG_SIZE)/2) ){
left = (pDev->txbuf_size/GRCAN_MSG_SIZE)/2;
}
}
-
+
/* Wait until more room in transmit buffer */
if ( grcan_wait_txspace(pDev,left) ){
- /* The wait has been aborted, probably due to
+ /* The wait has been aborted, probably due to
* the device driver has been closed by another
* thread. To avoid deadlock we return directly
* with error status.
@@ -1427,15 +1427,15 @@ static rtems_device_driver grcan_write(rtems_device_major_number major, rtems_de
rw_args->bytes_moved = count * sizeof(CANMsg);
return RTEMS_UNSATISFIED;
}
-
+
if ( pDev->txerror ){
/* Return number of bytes sent, compare write pointers */
pDev->txerror = 0;
-#if 0
+#if 0
#error HANDLE AMBA error
#endif
}
-
+
/* Try read bytes from circular buffer */
count += grcan_hw_write_try(
pDev,
@@ -1444,7 +1444,7 @@ static rtems_device_driver grcan_write(rtems_device_major_number major, rtems_de
req_cnt-count);
}
/* no need to unmask IRQ as IRQ Handler do that for us. */
-
+
rw_args->bytes_moved = count * sizeof(CANMsg);
return RTEMS_SUCCESSFUL;
}
@@ -1462,9 +1462,9 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
struct grcan_stats *stats;
struct grcan_filter *filter;
IRQ_GLOBAL_PREPARE(oldLevel);
-
+
FUNCDBG();
-
+
if (!ioarg)
return RTEMS_INVALID_NAME;
@@ -1473,50 +1473,50 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
case GRCAN_IOC_START:
if ( pDev->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
if ( (status=grcan_start(pDev)) != RTEMS_SUCCESSFUL ){
return status;
}
/* Read and write are now open... */
pDev->started = 1;
break;
-
+
case GRCAN_IOC_STOP:
if ( !pDev->started )
return RTEMS_RESOURCE_IN_USE;
-
+
grcan_stop(pDev);
pDev->started = 0;
break;
-
+
case GRCAN_IOC_ISSTARTED:
if ( !pDev->started )
return RTEMS_RESOURCE_IN_USE;
break;
-
+
case GRCAN_IOC_FLUSH:
if ( !pDev->started || pDev->flushing || pDev->config.silent )
return RTEMS_RESOURCE_IN_USE;
-
+
pDev->flushing = 1;
tmp = grcan_tx_flush(pDev);
pDev->flushing = 0;
if ( tmp ) {
- /* The wait has been aborted, probably due to
+ /* The wait has been aborted, probably due to
* the device driver has been closed by another
* thread.
*/
return RTEMS_UNSATISFIED;
}
break;
-
-#if 0
+
+#if 0
/* Set physical link */
case GRCAN_IOC_SET_LINK:
#ifdef REDUNDANT_CHANNELS
if ( pDev->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
/* switch HW channel */
pDev->channel = (unsigned int)ioargs->buffer;
#else
@@ -1530,17 +1530,17 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
return RTEMS_RESOURCE_IN_USE;
pDev->config.silent = (int)ioarg->buffer;
pDev->config_changed = 1;
- break;
+ break;
case GRCAN_IOC_SET_ABORT:
if ( pDev->started )
return RTEMS_RESOURCE_IN_USE;
pDev->config.abort = (int)ioarg->buffer;
- /* This Configuration parameter doesn't need HurriCANe reset
+ /* This Configuration parameter doesn't need HurriCANe reset
* ==> no pDev->config_changed = 1;
*/
break;
-
+
case GRCAN_IOC_SET_SELECTION:
if ( pDev->started )
return RTEMS_RESOURCE_IN_USE;
@@ -1548,19 +1548,19 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
selection = (struct grcan_selection *)ioarg->buffer;
if ( !selection )
return RTEMS_INVALID_NAME;
-
+
pDev->config.selection = *selection;
pDev->config_changed = 1;
break;
-
+
case GRCAN_IOC_SET_RXBLOCK:
pDev->rxblock = (int)ioarg->buffer;
break;
-
+
case GRCAN_IOC_SET_TXBLOCK:
pDev->txblock = (int)ioarg->buffer;
break;
-
+
case GRCAN_IOC_SET_TXCOMPLETE:
pDev->txcomplete = (int)ioarg->buffer;
break;
@@ -1568,14 +1568,14 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
case GRCAN_IOC_SET_RXCOMPLETE:
pDev->rxcomplete = (int)ioarg->buffer;
break;
-
+
case GRCAN_IOC_GET_STATS:
stats = (struct grcan_stats *)ioarg->buffer;
if ( !stats )
return RTEMS_INVALID_NAME;
*stats = pDev->stats;
break;
-
+
case GRCAN_IOC_CLR_STATS:
IRQ_GLOBAL_DISABLE(oldLevel);
memset(&pDev->stats,0,sizeof(struct grcan_stats));
@@ -1583,36 +1583,36 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
break;
case GRCAN_IOC_SET_SPEED:
-
+
/* cannot change speed during run mode */
if ( pDev->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
/* get speed rate from argument */
speed = (unsigned int)ioarg->buffer;
ret = grcan_calc_timing(speed,pDev->corefreq_hz,GRCAN_SAMPLING_POINT,&timing);
if ( ret )
return RTEMS_INVALID_NAME; /* EINVAL */
-
+
/* save timing/speed */
pDev->config.timing = timing;
pDev->config_changed = 1;
break;
-
+
case GRCAN_IOC_SET_BTRS:
- /* Set BTR registers manually
+ /* Set BTR registers manually
* Read GRCAN/HurriCANe Manual.
*/
if ( pDev->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
if ( !ioarg->buffer )
return RTEMS_INVALID_NAME;
-
+
pDev->config.timing = *(struct grcan_timing *)ioarg->buffer;
pDev->config_changed = 1;
break;
-
+
case GRCAN_IOC_SET_AFILTER:
filter = (struct grcan_filter *)ioarg->buffer;
if ( !filter ){
@@ -1623,23 +1623,23 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
/* Save filter */
pDev->afilter = *filter;
}
- /* Set hardware acceptance filter */
+ /* Set hardware acceptance filter */
grcan_hw_accept(pDev->regs,&pDev->afilter);
break;
-
+
case GRCAN_IOC_SET_SFILTER:
filter = (struct grcan_filter *)ioarg->buffer;
if ( !filter ){
/* disable TX/RX SYNC filtering */
- pDev->sfilter.mask = 0xffffffff;
+ pDev->sfilter.mask = 0xffffffff;
pDev->sfilter.mask = 0;
-
+
/* disable Sync interrupt */
pDev->regs->imr = READ_REG(&pDev->regs->imr) & ~(GRCAN_RXSYNC_IRQ|GRCAN_TXSYNC_IRQ);
}else{
/* Save filter */
pDev->sfilter = *filter;
-
+
/* Enable Sync interrupt */
pDev->regs->imr = READ_REG(&pDev->regs->imr) | (GRCAN_RXSYNC_IRQ|GRCAN_TXSYNC_IRQ);
}
@@ -1653,7 +1653,7 @@ static rtems_device_driver grcan_ioctl(rtems_device_major_number major, rtems_de
/* Read out the statsu register from the GRCAN core */
data[0] = READ_REG(&pDev->regs->stat);
break;
-
+
default:
return RTEMS_NOT_DEFINED;
}
@@ -1679,23 +1679,23 @@ static void grcan_interrupt(struct grcan_priv *pDev)
{
unsigned int status = READ_REG(&pDev->regs->pimsr);
unsigned int canstat = READ_REG(&pDev->regs->stat);
-
+
/* Spurious IRQ call? */
if ( !status && !canstat )
return;
-
+
FUNCDBG();
-
+
/* Increment number of interrupts counter */
pDev->stats.ints++;
-
+
if ( (status & GRCAN_ERR_IRQ) || (canstat & GRCAN_STAT_PASS) ){
/* Error-Passive interrupt */
pDev->stats.passive_cnt++;
}
if ( (status & GRCAN_OFF_IRQ) || (canstat & GRCAN_STAT_OFF) ){
- /* Bus-off condition interrupt
+ /* Bus-off condition interrupt
* The link is brought down by hardware, we wake all threads
* that is blocked in read/write calls and stop futher calls
* to read/write until user has called ioctl(fd,START,0).
@@ -1705,12 +1705,12 @@ static void grcan_interrupt(struct grcan_priv *pDev)
status=0x1ffff; /* clear all interrupts */
goto out;
}
-
+
if ( (status & GRCAN_OR_IRQ) || (canstat & GRCAN_STAT_OR) ){
/* Over-run during reception interrupt */
pDev->stats.overrun_cnt++;
}
-
+
if ( (status & GRCAN_RXAHBERR_IRQ) ||
(status & GRCAN_TXAHBERR_IRQ) ||
(canstat & GRCAN_STAT_AHBERR) ){
@@ -1718,40 +1718,40 @@ static void grcan_interrupt(struct grcan_priv *pDev)
printk("AHBERROR: status: 0x%x, canstat: 0x%x\n",status,canstat);
pDev->stats.ahberr_cnt++;
}
-
+
if ( status & GRCAN_TXLOSS_IRQ ) {
pDev->stats.txloss_cnt++;
}
-
+
if ( status & GRCAN_RXIRQ_IRQ ){
/* RX IRQ pointer interrupt */
/*printk("RxIrq 0x%x\n",status);*/
pDev->regs->imr = READ_REG(&pDev->regs->imr) & ~GRCAN_RXIRQ_IRQ;
rtems_semaphore_release(pDev->rx_sem);
}
-
+
if ( status & GRCAN_TXIRQ_IRQ ){
/* TX IRQ pointer interrupt */
pDev->regs->imr = READ_REG(&pDev->regs->imr) & ~GRCAN_TXIRQ_IRQ;
rtems_semaphore_release(pDev->tx_sem);
}
-
+
if ( status & GRCAN_TXSYNC_IRQ ){
/* TxSync message transmitted interrupt */
pDev->stats.txsync_cnt++;
}
-
+
if ( status & GRCAN_RXSYNC_IRQ ){
/* RxSync message received interrupt */
pDev->stats.rxsync_cnt++;
}
-
+
if ( status & GRCAN_TXEMPTY_IRQ ){
pDev->regs->imr = READ_REG(&pDev->regs->imr) & ~GRCAN_TXEMPTY_IRQ;
rtems_semaphore_release(pDev->txempty_sem);
}
-
-out:
+
+out:
/* Clear IRQs */
pDev->regs->picr = status;
}
@@ -1760,21 +1760,21 @@ static int grcan_register_internal(void)
{
rtems_status_code r;
rtems_device_major_number m;
-
- if ((r = rtems_io_register_driver(0, &grcan_driver, &m)) !=
+
+ if ((r = rtems_io_register_driver(0, &grcan_driver, &m)) !=
RTEMS_SUCCESSFUL) {
switch(r) {
case RTEMS_TOO_MANY:
- DBG2("failed RTEMS_TOO_MANY\n");
+ DBG2("failed RTEMS_TOO_MANY\n");
break;
case RTEMS_INVALID_NUMBER:
- DBG2("failed RTEMS_INVALID_NUMBER\n");
+ DBG2("failed RTEMS_INVALID_NUMBER\n");
break;
case RTEMS_RESOURCE_IN_USE:
- DBG2("failed RTEMS_RESOURCE_IN_USE\n");
+ DBG2("failed RTEMS_RESOURCE_IN_USE\n");
break;
default:
- DBG("failed %i\n",r);
+ DBG("failed %i\n",r);
break;
}
return 1;
@@ -1788,7 +1788,7 @@ static int grcan_register_internal(void)
int GRCAN_PREFIX(_register_abs)(struct grcan_device_info *devices, int dev_cnt)
{
FUNCDBG();
-
+
if ( !devices || (dev_cnt<0) )
return 1;
grcan_cores = devices;
@@ -1802,7 +1802,7 @@ int GRCAN_PREFIX(_register_abs)(struct grcan_device_info *devices, int dev_cnt)
int GRCAN_PREFIX(_register)(amba_confarea_type *abus)
{
FUNCDBG();
-
+
if ( !abus )
return 1;
amba_bus = abus;
diff --git a/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c b/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c
index 96755547fb..f9b126f552 100644
--- a/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c
+++ b/c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c
@@ -6,28 +6,28 @@
/*#define USE_AT697_RAM 1 */
-/* memarea_to_hw(x)
+/* memarea_to_hw(x)
*
* x: address in AT697 address space
- *
+ *
* returns the address in the RASTA address space that can be used to access x with dma.
- *
+ *
*/
#ifdef USE_AT697_RAM
static inline unsigned int memarea_to_hw(unsigned int addr) {
- return ((addr & 0x0fffffff) | RASTA_PCI_BASE);
+ return ((addr & 0x0fffffff) | RASTA_PCI_BASE);
}
#else
static inline unsigned int memarea_to_hw(unsigned int addr) {
- return ((addr & 0x0fffffff) | RASTA_LOCAL_SRAM);
+ return ((addr & 0x0fffffff) | RASTA_LOCAL_SRAM);
}
#endif
#define MEMAREA_TO_HW(x) memarea_to_hw(x)
#define IRQ_CLEAR_PENDING(irqno)
-#define IRQ_UNMASK(irqno)
-#define IRQ_MASK(irqno)
+#define IRQ_UNMASK(irqno)
+#define IRQ_MASK(irqno)
#define IRQ_GLOBAL_PREPARE(level) rtems_interrupt_level level
#define IRQ_GLOBAL_DISABLE(level) rtems_interrupt_disable(level)
@@ -65,8 +65,8 @@ void (*grcan_rasta_int_reg)(void *handler, int irq, void *arg) = 0;
#define STATIC_RX_BUF_ADDR(core) \
((unsigned int *) \
(grcan_rasta_rambase+(core)*(STATIC_TX_BUF_SIZE+STATIC_RX_BUF_SIZE)+STATIC_RX_BUF_SIZE))
-
-
+
+
#define GRCAN_DEVNAME "/dev/grcan0"
#define GRCAN_DEVNAME_NO(devstr,no) ((devstr)[10]='0'+(no))
diff --git a/c/src/lib/libbsp/sparc/shared/can/occan.c b/c/src/lib/libbsp/sparc/shared/can/occan.c
index 2a62f586f5..8b6dbfd32a 100644
--- a/c/src/lib/libbsp/sparc/shared/can/occan.c
+++ b/c/src/lib/libbsp/sparc/shared/can/occan.c
@@ -18,11 +18,11 @@
#include <rtems/bspIo.h> /* printk */
#include <leon.h>
-#include <ambapp.h>
+#include <ambapp.h>
#include <occan.h>
/* RTEMS -> ERRNO decoding table
-
+
rtems_assoc_t errno_assoc[] = {
{ "OK", RTEMS_SUCCESSFUL, 0 },
{ "BUSY", RTEMS_RESOURCE_IN_USE, EBUSY },
@@ -88,7 +88,7 @@ rtems_assoc_t errno_assoc[] = {
#ifdef DEBUG
#define DBG(fmt, vargs...) printk(fmt, ## vargs )
#else
- #define DBG(fmt, vargs...)
+ #define DBG(fmt, vargs...)
#endif
/* fifo interface */
@@ -104,7 +104,7 @@ typedef struct {
/* PELICAN */
#ifdef OCCAN_BYTE_REGS
typedef struct {
- unsigned char
+ unsigned char
mode,
cmd,
status,
@@ -120,7 +120,7 @@ typedef struct {
errwarn,
rx_err_cnt,
tx_err_cnt,
- rx_fi_xff; /* this is also acceptance code 0 in reset mode */
+ rx_fi_xff; /* this is also acceptance code 0 in reset mode */
union{
struct {
unsigned char id[2];
@@ -151,7 +151,7 @@ typedef struct {
} pelican_regs;
#else
typedef struct {
- unsigned char
+ unsigned char
mode, unused0[3],
cmd, unused1[3],
status, unused2[3],
@@ -167,7 +167,7 @@ typedef struct {
errwarn,unused12[3],
rx_err_cnt,unused13[3],
tx_err_cnt,unused14[3],
- rx_fi_xff, unused15[3]; /* this is also acceptance code 0 in reset mode */
+ rx_fi_xff, unused15[3]; /* this is also acceptance code 0 in reset mode */
/* make sure to use pointers when writing (byte access) to these registers */
union{
struct {
@@ -216,13 +216,13 @@ typedef struct {
} occan_speed_regs;
typedef struct {
- /* hardware shortcuts */
+ /* hardware shortcuts */
pelican_regs *regs;
int irq;
occan_speed_regs timing;
int channel; /* 0=default, 1=second bus */
int single_mode;
-
+
/* driver state */
rtems_id devsem;
rtems_id txsem;
@@ -233,11 +233,11 @@ typedef struct {
int txblk;
unsigned int status;
occan_stats stats;
-
+
/* rx&tx fifos */
occan_fifo *rxfifo;
occan_fifo *txfifo;
-
+
/* Config */
unsigned int speed; /* speed in HZ */
unsigned char acode[4];
@@ -393,7 +393,7 @@ static unsigned int sys_freq_hz;
static void pelican_init(occan_priv *priv){
/* Reset core */
priv->regs->mode = PELICAN_MOD_RESET;
-
+
/* wait for core to reset complete */
/*usleep(1);*/
}
@@ -414,21 +414,21 @@ static void pelican_open(occan_priv *priv){
priv->amask[1] = 0xff;
priv->amask[2] = 0xff;
priv->amask[3] = 0xff;
-
+
/* Set clock divider to extended mode, clkdiv not connected
*/
priv->regs->clkdiv = (1<<PELICAN_CDR_MODE_BITS) | (DEFAULT_CLKDIV & PELICAN_CDR_DIV);
-
+
ret = occan_calc_speedregs(sys_freq_hz,priv->speed,&priv->timing);
if ( ret ){
/* failed to set speed for this system freq, try with 50K instead */
priv->speed = OCCAN_SPEED_50K;
occan_calc_speedregs(sys_freq_hz,priv->speed,&priv->timing);
}
-
+
/* disable all interrupts */
priv->regs->inten = 0;
-
+
/* clear pending interrupts by reading */
tmp = READ_REG(&priv->regs->intflags);
}
@@ -436,22 +436,22 @@ static void pelican_open(occan_priv *priv){
static int pelican_start(occan_priv *priv){
unsigned char tmp;
/* Start HW communication */
-
+
if ( !priv->rxfifo || !priv->txfifo )
return -1;
/* In case we were started before and stopped we
- * should empty the TX fifo or try to resend those
+ * should empty the TX fifo or try to resend those
* messages. We make it simple...
*/
occan_fifo_clr(priv->txfifo);
-
+
/* Clear status bits */
priv->status = 0;
-
+
/* clear pending interrupts */
tmp = READ_REG(&priv->regs->intflags);
-
+
/* clear error counters */
priv->regs->rx_err_cnt = 0;
priv->regs->tx_err_cnt = 0;
@@ -467,28 +467,28 @@ static int pelican_start(occan_priv *priv){
#endif
/* set the speed regs of the CAN core */
occan_set_speedregs(priv,&priv->timing);
-
+
DBG("OCCAN: start: set timing regs btr0: 0x%x, btr1: 0x%x\n\r",READ_REG(&priv->regs->bustim0),READ_REG(&priv->regs->bustim1));
-
+
/* Set default acceptance filter */
pelican_set_accept(priv,priv->acode,priv->amask);
/* turn on interrupts */
priv->regs->inten = PELICAN_IE_RX | PELICAN_IE_TX | PELICAN_IE_ERRW |
PELICAN_IE_ERRP | PELICAN_IE_BUS;
-
+
#ifdef DEBUG
/* print setup before starting */
pelican_regs_print(priv->regs);
occan_stat_print(&priv->stats);
#endif
-
- /* core already in reset mode,
- * ¤ Exit reset mode
+
+ /* core already in reset mode,
+ * ¤ Exit reset mode
* ¤ Enter Single/Dual mode filtering.
*/
priv->regs->mode = (priv->single_mode << 3);
-
+
return 0;
}
@@ -500,38 +500,38 @@ static void pelican_stop(occan_priv *priv){
pelican_regs_print(priv->regs);
occan_stat_print(&priv->stats);
#endif
-
+
/* put core in reset mode */
priv->regs->mode = PELICAN_MOD_RESET;
/* turn off interrupts */
priv->regs->inten = 0;
-
+
priv->status |= OCCAN_STATUS_RESET;
}
-/* Try to send message "msg", if hardware txfifo is
+/* Try to send message "msg", if hardware txfifo is
* full, then -1 is returned.
*
- * Be sure to have disabled CAN interrupts when
+ * Be sure to have disabled CAN interrupts when
* entering this function.
*/
static int pelican_send(occan_priv *can, CANMsg *msg){
unsigned char tmp,status;
pelican_regs *regs = can->regs;
-
+
/* is there room in send buffer? */
status = READ_REG(&regs->status);
if ( !(status & PELICAN_STAT_TXBUF) ){
/* tx fifo taken, we have to wait */
return -1;
}
-
+
tmp = msg->len & 0xf;
if ( msg->rtr )
tmp |= 0x40;
-
+
if ( msg->extended ){
/* Extended Frame */
regs->rx_fi_xff = 0x80 | tmp;
@@ -553,7 +553,7 @@ static int pelican_send(occan_priv *can, CANMsg *msg){
WRITE_REG(&regs->msg.tx_sff.data[tmp],msg->data[tmp]);
}
}
-
+
/* let HW know of new message */
if ( msg->sshot ){
regs->cmd = PELICAN_CMD_TXREQ | PELICAN_CMD_ABORT;
@@ -561,7 +561,7 @@ static int pelican_send(occan_priv *can, CANMsg *msg){
/* normal case -- try resend until sent */
regs->cmd = PELICAN_CMD_TXREQ;
}
-
+
return 0;
}
@@ -569,17 +569,17 @@ static int pelican_send(occan_priv *can, CANMsg *msg){
static void pelican_set_accept(occan_priv *priv, unsigned char *acode, unsigned char *amask){
unsigned char *acode0, *acode1, *acode2, *acode3;
unsigned char *amask0, *amask1, *amask2, *amask3;
-
+
acode0 = &priv->regs->rx_fi_xff;
acode1 = (unsigned char *)&priv->regs->msg.rst_accept.code[0];
acode2 = (unsigned char *)&priv->regs->msg.rst_accept.code[1];
acode3 = (unsigned char *)&priv->regs->msg.rst_accept.code[2];
-
+
amask0 = (unsigned char *)&priv->regs->msg.rst_accept.mask[0];
amask1 = (unsigned char *)&priv->regs->msg.rst_accept.mask[1];
amask2 = (unsigned char *)&priv->regs->msg.rst_accept.mask[2];
amask3 = (unsigned char *)&priv->regs->msg.rst_accept.mask[3];
-
+
/* Set new mask & code */
*acode0 = acode[0];
*acode1 = acode[1];
@@ -617,7 +617,7 @@ static void pelican_regs_print(pelican_regs *regs){
printk(" AMR1: 0x%02x (0x%lx)\n\r",READ_REG(&regs->msg.rst_accept.mask[1]),(unsigned int)&regs->msg.rst_accept.mask[1]);
printk(" AMR2: 0x%02x (0x%lx)\n\r",READ_REG(&regs->msg.rst_accept.mask[2]),(unsigned int)&regs->msg.rst_accept.mask[2]);
printk(" AMR3: 0x%02x (0x%lx)\n\r",READ_REG(&regs->msg.rst_accept.mask[3]),(unsigned int)&regs->msg.rst_accept.mask[3]);
-
+
}else{
printk(" RXFI_XFF: 0x%02x\n\r",READ_REG(&regs->rx_fi_xff));
}
@@ -645,7 +645,7 @@ static void pelican_regadr_print(pelican_regs *regs){
/* in reset mode it is possible to read acceptance filters */
printk(" RXFI_XFF: 0x%lx\n\r",(unsigned int)&regs->rx_fi_xff);
-
+
/* reset registers */
printk(" ACR0: 0x%lx\n\r",(unsigned int)&regs->rx_fi_xff);
printk(" ACR1: 0x%lx\n\r",(unsigned int)&regs->msg.rst_accept.code[0]);
@@ -655,7 +655,7 @@ static void pelican_regadr_print(pelican_regs *regs){
printk(" AMR1: 0x%lx\n\r",(unsigned int)&regs->msg.rst_accept.mask[1]);
printk(" AMR2: 0x%lx\n\r",(unsigned int)&regs->msg.rst_accept.mask[2]);
printk(" AMR3: 0x%lx\n\r",(unsigned int)&regs->msg.rst_accept.mask[3]);
-
+
/* TX Extended */
printk(" EFFTX_ID[0]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.id[0]);
printk(" EFFTX_ID[1]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.id[1]);
@@ -664,12 +664,12 @@ static void pelican_regadr_print(pelican_regs *regs){
printk(" EFFTX_DATA[0]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[0]);
printk(" EFFTX_DATA[1]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[1]);
- printk(" EFFTX_DATA[2]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[2]);
- printk(" EFFTX_DATA[3]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[3]);
- printk(" EFFTX_DATA[4]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[4]);
- printk(" EFFTX_DATA[5]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[5]);
- printk(" EFFTX_DATA[6]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[6]);
- printk(" EFFTX_DATA[7]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[7]);
+ printk(" EFFTX_DATA[2]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[2]);
+ printk(" EFFTX_DATA[3]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[3]);
+ printk(" EFFTX_DATA[4]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[4]);
+ printk(" EFFTX_DATA[5]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[5]);
+ printk(" EFFTX_DATA[6]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[6]);
+ printk(" EFFTX_DATA[7]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_eff.data[7]);
/* RX Extended */
printk(" EFFRX_ID[0]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.id[0]);
@@ -679,12 +679,12 @@ static void pelican_regadr_print(pelican_regs *regs){
printk(" EFFRX_DATA[0]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[0]);
printk(" EFFRX_DATA[1]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[1]);
- printk(" EFFRX_DATA[2]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[2]);
- printk(" EFFRX_DATA[3]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[3]);
- printk(" EFFRX_DATA[4]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[4]);
- printk(" EFFRX_DATA[5]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[5]);
- printk(" EFFRX_DATA[6]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[6]);
- printk(" EFFRX_DATA[7]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[7]);
+ printk(" EFFRX_DATA[2]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[2]);
+ printk(" EFFRX_DATA[3]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[3]);
+ printk(" EFFRX_DATA[4]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[4]);
+ printk(" EFFRX_DATA[5]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[5]);
+ printk(" EFFRX_DATA[6]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[6]);
+ printk(" EFFRX_DATA[7]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_eff.data[7]);
/* RX Extended */
@@ -693,12 +693,12 @@ static void pelican_regadr_print(pelican_regs *regs){
printk(" SFFRX_DATA[0]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[0]);
printk(" SFFRX_DATA[1]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[1]);
- printk(" SFFRX_DATA[2]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[2]);
- printk(" SFFRX_DATA[3]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[3]);
- printk(" SFFRX_DATA[4]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[4]);
- printk(" SFFRX_DATA[5]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[5]);
- printk(" SFFRX_DATA[6]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[6]);
- printk(" SFFRX_DATA[7]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[7]);
+ printk(" SFFRX_DATA[2]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[2]);
+ printk(" SFFRX_DATA[3]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[3]);
+ printk(" SFFRX_DATA[4]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[4]);
+ printk(" SFFRX_DATA[5]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[5]);
+ printk(" SFFRX_DATA[6]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[6]);
+ printk(" SFFRX_DATA[7]: 0x%lx\n\r",(unsigned int)&regs->msg.rx_sff.data[7]);
/* TX Extended */
printk(" SFFTX_ID[0]: 0x%lx\n\r",(unsigned int)&regs->msg.tx_sff.id[0]);
@@ -756,8 +756,8 @@ static int occan_calc_speedregs(unsigned int clock_hz, unsigned int rate, occan_
/* invalid speed mode */
return -1;
}
-
- /* find best match, return -2 if no good reg
+
+ /* find best match, return -2 if no good reg
* combination is available for this frequency */
/* some heuristic specials */
@@ -823,14 +823,14 @@ static int occan_calc_speedregs(unsigned int clock_hz, unsigned int rate, occan_
result->btr0 = (sjw<<OCCAN_BUSTIM_SJW_BIT) | (best_brp&OCCAN_BUSTIM_BRP);
result->btr1 = (0<<7) | (tseg2<<OCCAN_BUSTIM_TSEG2_BIT) | tseg1;
-
+
return 0;
}
static int occan_set_speedregs(occan_priv *priv, occan_speed_regs *timing){
if ( !timing || !priv || !priv->regs)
return -1;
-
+
priv->regs->bustim0 = timing->btr0;
priv->regs->bustim1 = timing->btr1;
return 0;
@@ -851,27 +851,27 @@ static unsigned int pelican_speed_auto_steplist [] = {
static int pelican_speed_auto(occan_priv *priv){
return -1;
-
-#if 0
+
+#if 0
int i=0;
occan_speed_regs timing;
unsigned int speed;
unsigned char tmp;
while ( (speed=pelican_speed_auto_steplist[i]) > 0){
-
+
/* Reset core */
priv->regs->mode = PELICAN_MOD_RESET;
-
+
/* tell int handler about the auto speed detection test */
-
-
+
+
/* wait for a moment (10ms) */
/*usleep(10000);*/
-
+
/* No acceptance filter */
pelican_set_accept(priv);
-
+
/* calc timing params for this */
if ( occan_calc_speedregs(sys_freq_hz,speed,&timing) ){
/* failed to get good timings for this frequency
@@ -879,34 +879,34 @@ static int pelican_speed_auto(occan_priv *priv){
*/
continue;
}
-
+
timing.sam = 0;
-
+
/* set timing params for this speed */
occan_set_speedregs(priv,&timing);
-
+
/* Empty previous messages in hardware RX fifo */
/*
while( READ_REG(&priv->regs->) ){
-
+
}
*/
-
+
/* Clear pending interrupts */
tmp = READ_REG(&priv->regs->intflags);
-
+
/* enable RX & ERR interrupt */
- priv->regs->inten =
-
+ priv->regs->inten =
+
/* Get out of reset state */
priv->regs->mode = PELICAN_MOD_LISTEN;
-
+
/* wait for frames or errors */
while(1){
/* sleep 10ms */
-
+
}
-
+
}
#endif
}
@@ -918,9 +918,9 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
occan_priv *can;
char fs_name[20];
rtems_status_code status;
-
+
strcpy(fs_name,OCCAN_DEVNAME);
-
+
/* find device on amba bus */
dev_cnt = amba_get_number_ahbslv_devices(amba_bus,VENDOR_GAISLER,GAISLER_OCCAN);
if ( dev_cnt < 1 ){
@@ -932,11 +932,11 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
/* Detect System Frequency from initialized timer */
#ifndef SYS_FREQ_HZ
#if defined(LEON3)
- /* LEON3: find timer address via AMBA Plug&Play info */
+ /* LEON3: find timer address via AMBA Plug&Play info */
{
amba_apb_device gptimer;
LEON3_Timer_Regs_Map *tregs;
-
+
if ( amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_GPTIMER,&gptimer) == 1 ){
tregs = (LEON3_Timer_Regs_Map *)gptimer.start;
sys_freq_hz = (tregs->scaler_reload+1)*1000*1000;
@@ -945,7 +945,7 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
sys_freq_hz = 40000000; /* Default to 40MHz */
printk("OCCAN: Failed to detect system frequency\n\r");
}
-
+
}
#elif defined(LEON2)
/* LEON2: use hardcoded address to get to timer */
@@ -960,9 +960,9 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
/* Use hardcoded frequency */
sys_freq_hz = SYS_FREQ_HZ;
#endif
-
+
DBG("OCCAN: Detected %dHz system frequency\n\r",sys_freq_hz);
-
+
/* OCCAN speciality:
* Mulitple cores are supported through the same amba AHB interface.
* The number of "sub cores" can be detected by decoding the AMBA
@@ -971,48 +971,48 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
*
* Now, lets detect sub cores.
*/
-
+
for(subcore_cnt=devi=0; devi<dev_cnt; devi++){
amba_find_next_ahbslv(amba_bus,VENDOR_GAISLER,GAISLER_OCCAN,&ambadev,devi);
subcore_cnt += (ambadev.ver & 0x7)+1;
}
-
+
printk("OCCAN: Found %d devs, totally %d sub cores\n\r",dev_cnt,subcore_cnt);
-
+
/* allocate memory for cores */
can_cores = subcore_cnt;
cans = calloc(subcore_cnt*sizeof(occan_priv),1);
-
+
minor=0;
for(devi=0; devi<dev_cnt; devi++){
-
+
/* Get AHB device info */
amba_find_next_ahbslv(amba_bus,VENDOR_GAISLER,GAISLER_OCCAN,&ambadev,devi);
subcores = (ambadev.ver & 0x7)+1;
DBG("OCCAN: on dev %d found %d sub cores\n\r",devi,subcores);
-
+
/* loop all subcores, at least 1 */
for(subi=0; subi<subcores; subi++){
can = &cans[minor];
#ifdef OCCAN_BYTE_REGS
- /* regs is byte regs */
+ /* regs is byte regs */
can->regs = (void *)(ambadev.start[0] + OCCAN_NCORE_OFS*subi);
#else
/* regs is word regs, accessed 0x100 from base address */
can->regs = (void *)(ambadev.start[0] + OCCAN_NCORE_OFS*subi+ OCCAN_WORD_REG_OFS);
#endif
-
+
/* remember IRQ number */
can->irq = ambadev.irq+subi;
-
+
/* bind filesystem name to device */
OCCAN_DEVNAME_NO(fs_name,minor);
printk("OCCAN: Registering %s to [%d %d] @ 0x%lx irq %d\n\r",fs_name,major,minor,(unsigned int)can->regs,can->irq);
status = rtems_io_register_name(fs_name, major, minor);
if (RTEMS_SUCCESSFUL != status )
rtems_fatal_error_occurred(status);
-
+
/* initialize software */
can->open = 0;
can->rxfifo = NULL;
@@ -1022,7 +1022,7 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
1,
RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | RTEMS_NO_INHERIT_PRIORITY | \
RTEMS_NO_PRIORITY_CEILING,
- 0,
+ 0,
&can->devsem);
if ( status != RTEMS_SUCCESSFUL ){
printk("OCCAN: Failed to create dev semaphore for minor %d, (%d)\n\r",minor,status);
@@ -1030,10 +1030,10 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
}
status = rtems_semaphore_create(
rtems_build_name('C', 't', 'x', '0'+minor),
- 0,
+ 0,
RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | RTEMS_NO_INHERIT_PRIORITY | \
RTEMS_NO_PRIORITY_CEILING,
- 0,
+ 0,
&can->txsem);
if ( status != RTEMS_SUCCESSFUL ){
printk("OCCAN: Failed to create tx semaphore for minor %d, (%d)\n\r",minor,status);
@@ -1041,7 +1041,7 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
}
status = rtems_semaphore_create(
rtems_build_name('C', 'r', 'x', '0'+minor),
- 0,
+ 0,
RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | RTEMS_NO_INHERIT_PRIORITY | \
RTEMS_NO_PRIORITY_CEILING,
0,
@@ -1050,34 +1050,34 @@ static rtems_device_driver occan_initialize(rtems_device_major_number major, rte
printk("OCCAN: Failed to create rx semaphore for minor %d, (%d)\n\r",minor,status);
return RTEMS_UNSATISFIED;
}
-
+
/* hardware init/reset */
pelican_init(can);
-
+
/* Setup interrupt handler for each channel */
OCCAN_REG_INT(OCCAN_PREFIX(_interrupt_handler), can->irq, can);
-
+
minor++;
#ifdef DEBUG_PRINT_REGMAP
pelican_regadr_print(can->regs);
#endif
}
}
-
+
return RTEMS_SUCCESSFUL;
}
static rtems_device_driver occan_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg){
occan_priv *can;
-
+
DBG("OCCAN: Opening %d\n\r",minor);
-
+
if ( minor >= can_cores )
return RTEMS_UNSATISFIED; /* NODEV */
-
+
/* get can device */
can = &cans[minor];
-
+
/* already opened? */
rtems_semaphore_obtain(can->devsem,RTEMS_WAIT, RTEMS_NO_TIMEOUT);
if ( can->open ){
@@ -1093,7 +1093,7 @@ static rtems_device_driver occan_open(rtems_device_major_number major, rtems_dev
can->open = 0;
return RTEMS_NO_MEMORY; /* ENOMEM */
}
-
+
can->txfifo = occan_fifo_create(DEFAULT_TX_FIFO_LEN);
if ( !can->txfifo ){
occan_fifo_free(can->rxfifo);
@@ -1101,7 +1101,7 @@ static rtems_device_driver occan_open(rtems_device_major_number major, rtems_dev
can->open = 0;
return RTEMS_NO_MEMORY; /* ENOMEM */
}
-
+
DBG("OCCAN: Opening %d success\n\r",minor);
can->started = 0;
@@ -1109,10 +1109,10 @@ static rtems_device_driver occan_open(rtems_device_major_number major, rtems_dev
can->txblk = 1; /* Default to Blocking mode */
can->rxblk = 1; /* Default to Blocking mode */
can->single_mode = 1; /* single mode acceptance filter */
-
+
/* reset stat counters */
memset(&can->stats,0,sizeof(occan_stats));
-
+
/* HW must be in reset mode here (close and initializes resets core...)
*
* 1. set default modes/speeds
@@ -1124,23 +1124,23 @@ static rtems_device_driver occan_open(rtems_device_major_number major, rtems_dev
static rtems_device_driver occan_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg){
occan_priv *can = &cans[minor];
-
+
DBG("OCCAN: Closing %d\n\r",minor);
-
+
/* stop if running */
if ( can->started )
pelican_stop(can);
-
+
/* Enter Reset Mode */
can->regs->mode = PELICAN_MOD_RESET;
-
+
/* free fifo memory */
occan_fifo_free(can->rxfifo);
occan_fifo_free(can->txfifo);
-
+
can->rxfifo = NULL;
can->txfifo = NULL;
-
+
return RTEMS_SUCCESSFUL;
}
@@ -1150,31 +1150,31 @@ static rtems_device_driver occan_read(rtems_device_major_number major, rtems_dev
CANMsg *dstmsg, *srcmsg;
rtems_interrupt_level oldLevel;
int left;
-
+
if ( !can->started ){
DBG("OCCAN: cannot read from minor %d when not started\n\r",minor);
return RTEMS_RESOURCE_IN_USE; /* -EBUSY*/
}
-
+
/* does at least one message fit */
left = rw_args->count;
if ( left < sizeof(CANMsg) ){
DBG("OCCAN: minor %d length of buffer must be at least %d, our is %d\n\r",minor,sizeof(CANMsg),left);
return RTEMS_INVALID_NAME; /* -EINVAL */
}
-
+
/* get pointer to start where to put CAN messages */
dstmsg = (CANMsg *)rw_args->buffer;
if ( !dstmsg ){
DBG("OCCAN: minor %d read: input buffer is NULL\n\r",minor);
return RTEMS_INVALID_NAME; /* -EINVAL */
- }
+ }
while (left >= sizeof(CANMsg) ){
-
+
/* turn off interrupts */
rtems_interrupt_disable(oldLevel);
-
+
/* A bus off interrupt may have occured after checking can->started */
if ( can->status & (OCCAN_STATUS_ERR_BUSOFF|OCCAN_STATUS_RESET) ){
rtems_interrupt_enable(oldLevel);
@@ -1182,7 +1182,7 @@ static rtems_device_driver occan_read(rtems_device_major_number major, rtems_dev
rw_args->bytes_moved = rw_args->count-left;
return RTEMS_IO_ERROR; /* EIO */
}
-
+
srcmsg = occan_fifo_claim_get(can->rxfifo);
if ( !srcmsg ){
/* no more messages in reception fifo.
@@ -1195,41 +1195,41 @@ static rtems_device_driver occan_read(rtems_device_major_number major, rtems_dev
rtems_interrupt_enable(oldLevel);
break;
}
-
+
/* turn on interrupts again */
rtems_interrupt_enable(oldLevel);
-
+
DBG("OCCAN: Waiting for RX int\n\r");
-
+
/* wait for incomming messages */
rtems_semaphore_obtain(can->rxsem,RTEMS_WAIT,RTEMS_NO_TIMEOUT);
-
+
/* did we get woken up by a BUS OFF error? */
if ( can->status & (OCCAN_STATUS_ERR_BUSOFF|OCCAN_STATUS_RESET) ){
DBG("OCCAN: Blocking read got woken up by BUS OFF error\n\r");
/* At this point it should not matter how many messages we handled */
- rw_args->bytes_moved = rw_args->count-left;
+ rw_args->bytes_moved = rw_args->count-left;
return RTEMS_IO_ERROR; /* EIO */
}
-
+
/* no errors detected, it must be a message */
continue;
}
-
+
/* got message, copy it to userspace buffer */
*dstmsg = *srcmsg;
-
+
/* Return borrowed message, RX interrupt can use it again */
occan_fifo_get(can->rxfifo);
-
+
/* turn on interrupts again */
rtems_interrupt_enable(oldLevel);
-
+
/* increase pointers */
left -= sizeof(CANMsg);
dstmsg++;
}
-
+
/* save number of read bytes. */
rw_args->bytes_moved = rw_args->count-left;
if ( rw_args->bytes_moved == 0 ){
@@ -1245,22 +1245,22 @@ static rtems_device_driver occan_write(rtems_device_major_number major, rtems_de
CANMsg *msg,*fifo_msg;
rtems_interrupt_level oldLevel;
int left;
-
+
DBG("OCCAN: Writing %d bytes from 0x%lx (%d)\n\r",rw_args->count,rw_args->buffer,sizeof(CANMsg));
-
+
if ( !can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
- left = rw_args->count;
+
+ left = rw_args->count;
if ( (left < sizeof(CANMsg)) || (!rw_args->buffer) ){
return RTEMS_INVALID_NAME; /* EINVAL */
}
-
+
msg = (CANMsg *)rw_args->buffer;
-
+
/* limit CAN message length to 8 */
msg->len = (msg->len > 8) ? 8 : msg->len;
-
+
#ifdef DEBUG_VERBOSE
pelican_regs_print(can->regs);
occan_stat_print(&can->stats);
@@ -1268,7 +1268,7 @@ static rtems_device_driver occan_write(rtems_device_major_number major, rtems_de
/* turn off interrupts */
rtems_interrupt_disable(oldLevel);
-
+
/* A bus off interrupt may have occured after checking can->started */
if ( can->status & (OCCAN_STATUS_ERR_BUSOFF|OCCAN_STATUS_RESET) ){
rtems_interrupt_enable(oldLevel);
@@ -1283,35 +1283,35 @@ static rtems_device_driver occan_write(rtems_device_major_number major, rtems_de
if ( occan_fifo_empty(can->txfifo) ){
/*pelican_regs_print(cans[minor+1].regs);*/
if ( !pelican_send(can,msg) ) {
- /* First message put directly into HW TX fifo
+ /* First message put directly into HW TX fifo
* This will turn TX interrupt on.
*/
left -= sizeof(CANMsg);
msg++;
-
+
/* bump stat counters */
can->stats.tx_msgs++;
-
+
DBG("OCCAN: Sending direct via HW\n\r");
}
}
/* Put messages into software fifo */
while ( left >= sizeof(CANMsg) ){
-
+
/* limit CAN message length to 8 */
msg->len = (msg->len > 8) ? 8 : msg->len;
-
+
fifo_msg = occan_fifo_put_claim(can->txfifo,0);
if ( !fifo_msg ){
-
+
DBG("OCCAN: FIFO is full\n\r");
/* Block only if no messages previously sent
* and no in blocking mode
*/
if ( !can->txblk || (left != rw_args->count) )
break;
-
+
/* turn on interupts again and wait
INT_ON
WAIT FOR FREE BUF;
@@ -1319,11 +1319,11 @@ static rtems_device_driver occan_write(rtems_device_major_number major, rtems_de
CHECK_IF_FIFO_EMPTY ==> SEND DIRECT VIA HW;
*/
rtems_interrupt_enable(oldLevel);
-
+
DBG("OCCAN: Waiting for tx int\n\r");
-
+
rtems_semaphore_obtain(can->txsem, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
-
+
/* did we get woken up by a BUS OFF error? */
if ( can->status & (OCCAN_STATUS_ERR_BUSOFF|OCCAN_STATUS_RESET) ){
DBG("OCCAN: Blocking write got woken up by BUS OFF error or RESET event\n\r");
@@ -1331,44 +1331,44 @@ static rtems_device_driver occan_write(rtems_device_major_number major, rtems_de
rw_args->bytes_moved = rw_args->count-left;
return RTEMS_IO_ERROR; /* EIO */
}
-
+
rtems_interrupt_disable(oldLevel);
-
+
if ( occan_fifo_empty(can->txfifo) ){
if ( !pelican_send(can,msg) ) {
- /* First message put directly into HW TX fifo
+ /* First message put directly into HW TX fifo
* This will turn TX interrupt on.
*/
left -= sizeof(CANMsg);
msg++;
-
+
/* bump stat counters */
can->stats.tx_msgs++;
-
+
DBG("OCCAN: Sending direct2 via HW\n\r");
}
}
continue;
}
-
+
/* copy message into fifo area */
*fifo_msg = *msg;
-
+
/* tell interrupt handler about the message */
occan_fifo_put(can->txfifo);
-
+
DBG("OCCAN: Put info fifo SW\n\r");
-
+
/* Prepare insert of next message */
msg++;
left-=sizeof(CANMsg);
}
-
+
rtems_interrupt_enable(oldLevel);
-
+
rw_args->bytes_moved = rw_args->count-left;
DBG("OCCAN: Sent %d\n\r",rw_args->bytes_moved);
-
+
if ( left == rw_args->count )
return RTEMS_TIMEOUT; /* ETIMEDOUT should be EAGAIN/EWOULDBLOCK */
return RTEMS_SUCCESSFUL;
@@ -1383,38 +1383,38 @@ static rtems_device_driver occan_ioctl(rtems_device_major_number major, rtems_de
struct occan_afilter *afilter;
occan_stats *dststats;
unsigned int rxcnt,txcnt;
-
+
DBG("OCCAN: IOCTL %d\n\r",ioarg->command);
-
+
ioarg->ioctl_return = 0;
switch(ioarg->command){
case OCCAN_IOC_SET_SPEED:
-
+
/* cannot change speed during run mode */
if ( can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
/* get speed rate from argument */
speed = (unsigned int)ioarg->buffer;
ret = occan_calc_speedregs(sys_freq_hz,speed,&timing);
if ( ret )
return RTEMS_INVALID_NAME; /* EINVAL */
-
+
/* set the speed regs of the CAN core */
/* occan_set_speedregs(can,timing); */
-
+
/* save timing/speed */
can->speed = speed;
can->timing = timing;
break;
-
+
case OCCAN_IOC_SET_BTRS:
- /* Set BTR registers manually
+ /* Set BTR registers manually
* Read OCCAN Manual.
*/
if ( can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
can->speed = 0; /* custom */
can->timing.btr1 = (unsigned int)ioarg->buffer & 0xff;
can->timing.btr0 = ((unsigned int)ioarg->buffer>>8) & 0xff;
@@ -1426,114 +1426,114 @@ static rtems_device_driver occan_ioctl(rtems_device_major_number major, rtems_de
can->timing.sam = (btr1 >> 7) & 0x1;
*/
break;
-
+
case OCCAN_IOC_SPEED_AUTO:
return RTEMS_NOT_IMPLEMENTED;
if ( can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
if ( (speed=pelican_speed_auto(can)) < 0 ){
/* failed */
return RTEMS_IO_ERROR;
}
-
+
/* set new speed */
can->speed = speed;
-
+
if ( (int *)ioarg->buffer ){
*(int *)ioarg->buffer = speed;
}
return RTEMS_SUCCESSFUL;
break;
-
+
case OCCAN_IOC_SET_BUFLEN:
/* set rx & tx fifo buffer length */
if ( can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
rxcnt = (unsigned int)ioarg->buffer & 0x0000ffff;
txcnt = (unsigned int)ioarg->buffer >> 16;
-
+
occan_fifo_free(can->rxfifo);
occan_fifo_free(can->txfifo);
-
+
/* allocate new buffers */
can->rxfifo = occan_fifo_create(rxcnt);
can->txfifo = occan_fifo_create(txcnt);
-
+
if ( !can->rxfifo || !can->txfifo )
return RTEMS_NO_MEMORY; /* ENOMEM */
break;
-
+
case OCCAN_IOC_GET_CONF:
return RTEMS_NOT_IMPLEMENTED;
break;
-
+
case OCCAN_IOC_GET_STATS:
dststats = (occan_stats *)ioarg->buffer;
if ( !dststats )
return RTEMS_INVALID_NAME; /* EINVAL */
-
+
/* copy data stats into userspace buffer */
if ( can->rxfifo )
can->stats.rx_sw_dovr = can->rxfifo->ovcnt;
*dststats = can->stats;
break;
-
+
case OCCAN_IOC_GET_STATUS:
/* return the status of the */
if ( !ioarg->buffer )
return RTEMS_INVALID_NAME;
-
+
*(unsigned int *)ioarg->buffer = can->status;
break;
-
+
/* Set physical link */
case OCCAN_IOC_SET_LINK:
#ifdef REDUNDANT_CHANNELS
if ( can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
/* switch HW channel */
can->channel = (unsigned int)ioargs->buffer;
#else
return RTEMS_NOT_IMPLEMENTED;
#endif
break;
-
+
case OCCAN_IOC_SET_FILTER:
if ( can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
-
+
afilter = (struct occan_afilter *)ioarg->buffer;
-
+
if ( !afilter )
return RTEMS_INVALID_NAME; /* EINVAL */
-
+
/* copy acceptance filter */
can->acode[0] = afilter->code[0];
can->acode[1] = afilter->code[1];
can->acode[2] = afilter->code[2];
can->acode[3] = afilter->code[3];
-
+
can->amask[0] = afilter->mask[0];
can->amask[1] = afilter->mask[1];
can->amask[2] = afilter->mask[2];
- can->amask[3] = afilter->mask[3];
-
+ can->amask[3] = afilter->mask[3];
+
can->single_mode = ( afilter->single_mode ) ? 1 : 0;
-
- /* Acceptance filter is written to hardware
+
+ /* Acceptance filter is written to hardware
* when starting.
*/
/* pelican_set_accept(can,can->acode,can->amask);*/
break;
-
+
case OCCAN_IOC_SET_BLK_MODE:
can->rxblk = (unsigned int)ioarg->buffer & OCCAN_BLK_MODE_RX;
can->txblk = ((unsigned int)ioarg->buffer & OCCAN_BLK_MODE_TX) >> 1;
break;
-
+
case OCCAN_IOC_START:
if ( can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
@@ -1541,7 +1541,7 @@ static rtems_device_driver occan_ioctl(rtems_device_major_number major, rtems_de
return RTEMS_NO_MEMORY; /* failed because of no memory, can happen if SET_BUFLEN failed */
can->started = 1;
break;
-
+
case OCCAN_IOC_STOP:
if ( !can->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */
@@ -1562,29 +1562,29 @@ static void occan_interrupt(occan_priv *can){
int signal_rx=0, signal_tx=0;
unsigned char tmp, errcode, arbcode;
int tx_error_cnt,rx_error_cnt;
-
+
can->stats.ints++;
-
+
while ( (iflags = READ_REG(&can->regs->intflags)) != 0 ){
/* still interrupts to handle */
-
+
if ( iflags & PELICAN_IF_RX ){
/* the rx fifo is not empty
- * put 1 message into rxfifo for later use
+ * put 1 message into rxfifo for later use
*/
-
+
/* get empty (or make room) message */
msg = occan_fifo_put_claim(can->rxfifo,1);
tmp = READ_REG(&regs->rx_fi_xff);
msg->extended = tmp >> 7;
msg->rtr = (tmp >> 6) & 1;
msg->len = tmp = tmp & 0x0f;
-
+
if ( msg->extended ){
/* extended message */
- msg->id = READ_REG(&regs->msg.rx_eff.id[0])<<(5+8+8) |
- READ_REG(&regs->msg.rx_eff.id[1])<<(5+8) |
- READ_REG(&regs->msg.rx_eff.id[2])<<5 |
+ msg->id = READ_REG(&regs->msg.rx_eff.id[0])<<(5+8+8) |
+ READ_REG(&regs->msg.rx_eff.id[1])<<(5+8) |
+ READ_REG(&regs->msg.rx_eff.id[2])<<5 |
READ_REG(&regs->msg.rx_eff.id[3])>>3;
while(tmp--){
msg->data[tmp] = READ_REG(&regs->msg.rx_eff.data[tmp]);
@@ -1601,9 +1601,9 @@ static void occan_interrupt(occan_priv *can){
*/
}else{
/* standard message */
- msg->id = READ_REG(&regs->msg.rx_sff.id[0])<<3 |
+ msg->id = READ_REG(&regs->msg.rx_sff.id[0])<<3 |
READ_REG(&regs->msg.rx_sff.id[1])>>5;
-
+
while(tmp--){
msg->data[tmp] = READ_REG(&regs->msg.rx_sff.data[tmp]);
}
@@ -1618,29 +1618,29 @@ static void occan_interrupt(occan_priv *can){
msg->data[7] = READ_REG(&regs->msg.rx_sff.data[7]);
*/
}
-
+
/* Re-Enable RX buffer for a new message */
regs->cmd = PELICAN_CMD_RELRXBUF;
-
+
/* make message available to the user */
occan_fifo_put(can->rxfifo);
-
+
/* bump stat counters */
can->stats.rx_msgs++;
-
+
/* signal the semaphore only once */
signal_rx = 1;
}
-
+
if ( iflags & PELICAN_IF_TX ){
/* there is room in tx fifo of HW */
-
+
if ( !occan_fifo_empty(can->txfifo) ){
/* send 1 more messages */
msg = occan_fifo_claim_get(can->txfifo);
-
+
if ( pelican_send(can,msg) ){
- /* ERROR! We got an TX interrupt telling us
+ /* ERROR! We got an TX interrupt telling us
* tx fifo is empty, yet it is not.
*
* Complain about this max 10 times
@@ -1651,86 +1651,86 @@ static void occan_interrupt(occan_priv *can){
can->status |= OCCAN_STATUS_QUEUE_ERROR;
can->stats.tx_buf_error++;
}
-
+
/* free software-fifo space taken by sent message */
occan_fifo_get(can->txfifo);
-
+
/* bump stat counters */
can->stats.tx_msgs++;
-
+
/* wake any sleeping thread waiting for "fifo not full" */
signal_tx = 1;
}
}
-
+
if ( iflags & PELICAN_IF_ERRW ){
tx_error_cnt = READ_REG(&regs->tx_err_cnt);
rx_error_cnt = READ_REG(&regs->rx_err_cnt);
-
+
/* 1. if bus off tx error counter = 127 */
if ( (tx_error_cnt > 96) || (rx_error_cnt > 96) ){
/* in Error Active Warning area or BUS OFF */
can->status |= OCCAN_STATUS_WARN;
-
+
/* check reset bit for reset mode */
if ( READ_REG(&regs->mode) & PELICAN_MOD_RESET ){
/* in reset mode ==> bus off */
can->status |= OCCAN_STATUS_ERR_BUSOFF | OCCAN_STATUS_RESET;
-
+
/***** pelican_stop(can) ******
* turn off interrupts
* enter reset mode (HW already done that for us)
*/
regs->inten = 0;
-
+
/* Indicate that we are not started any more.
- * This will make write/read return with EBUSY
+ * This will make write/read return with EBUSY
* on read/write attempts.
*
* User must issue a ioctl(START) to get going again.
*/
can->started = 0;
-
- /* signal any waiting read/write threads, so that they
+
+ /* signal any waiting read/write threads, so that they
* can handle the bus error.
*/
signal_rx = 1;
signal_tx = 1;
-
+
/* ingnore any old pending interrupt */
break;
}
-
+
}else{
/* not in Upper Error Active area any more */
can->status &= ~(OCCAN_STATUS_WARN);
}
can->stats.err_warn++;
}
-
+
if ( iflags & PELICAN_IF_DOVR){
can->status |= OCCAN_STATUS_OVERRUN;
can->stats.err_dovr++;
DBG("OCCAN_INT: DOVR\n\r");
}
-
+
if ( iflags & PELICAN_IF_ERRP){
- /* Let the error counters decide what kind of
+ /* Let the error counters decide what kind of
* interrupt it was. In/Out of EPassive area.
*/
tx_error_cnt = READ_REG(&regs->tx_err_cnt);
rx_error_cnt = READ_REG(&regs->rx_err_cnt);
-
+
if ( (tx_error_cnt > 127) || (rx_error_cnt > 127) ){
can->status |= OCCAN_STATUS_ERR_PASSIVE;
}else{
can->status &= ~(OCCAN_STATUS_ERR_PASSIVE);
}
-
+
/* increase Error Passive In/out interrupt counter */
can->stats.err_errp++;
}
-
+
if ( iflags & PELICAN_IF_ARB){
arbcode = READ_REG(&regs->arbcode);
can->stats.err_arb_bitnum[arbcode & PELICAN_ARB_BITS]++;
@@ -1739,7 +1739,7 @@ static void occan_interrupt(occan_priv *can){
}
if ( iflags & PELICAN_IF_BUS){
- /* Some kind of BUS error, only used for
+ /* Some kind of BUS error, only used for
* statistics. Error Register is decoded
* and put into can->stats.
*/
@@ -1758,27 +1758,27 @@ static void occan_interrupt(occan_priv *can){
can->stats.err_bus_other++;
break;
}
-
+
/* Get Direction (TX/RX) */
if ( errcode & PELICAN_ECC_DIR ){
can->stats.err_bus_rx++;
}else{
can->stats.err_bus_tx++;
}
-
+
/* Get Segment in frame that went wrong */
can->stats.err_bus_segs[errcode & PELICAN_ECC_SEG]++;
-
+
/* total number of bus errors */
can->stats.err_bus++;
}
}
-
+
/* signal Binary semaphore, messages available! */
if ( signal_rx ){
rtems_semaphore_release(can->rxsem);
}
-
+
if ( signal_tx ){
rtems_semaphore_release(can->txsem);
}
@@ -1787,7 +1787,7 @@ static void occan_interrupt(occan_priv *can){
#ifdef OCCAN_DEFINE_INTHANDLER
static void occan_interrupt_handler(rtems_vector_number v){
int minor;
-
+
/* convert to */
for(minor = 0; minor < can_cores; minor++) {
if ( v == (cans[minor].irq+0x10) ) {
@@ -1805,7 +1805,7 @@ static rtems_driver_address_table occan_driver = OCCAN_DRIVER_TABLE_ENTRY;
int OCCAN_PREFIX(_register)(amba_confarea_type *bus){
rtems_status_code r;
rtems_device_major_number m;
-
+
amba_bus = bus;
if ( !bus )
return 1;
@@ -1816,7 +1816,7 @@ int OCCAN_PREFIX(_register)(amba_confarea_type *bus){
switch(r) {
case RTEMS_TOO_MANY:
printk("OCCAN rtems_io_register_driver failed: RTEMS_TOO_MANY\n\r"); break;
- case RTEMS_INVALID_NUMBER:
+ case RTEMS_INVALID_NUMBER:
printk("OCCAN rtems_io_register_driver failed: RTEMS_INVALID_NUMBER\n\r"); break;
case RTEMS_RESOURCE_IN_USE:
printk("OCCAN rtems_io_register_driver failed: RTEMS_RESOURCE_IN_USE\n\r"); break;
@@ -1830,7 +1830,7 @@ int OCCAN_PREFIX(_register)(amba_confarea_type *bus){
/*******************************************************************************
- * FIFO IMPLEMENTATION
+ * FIFO IMPLEMENTATION
*/
static occan_fifo *occan_fifo_create(int cnt){
@@ -1865,17 +1865,17 @@ static int occan_fifo_empty(occan_fifo *fifo){
static CANMsg *occan_fifo_put_claim(occan_fifo *fifo, int force){
if ( !fifo )
return NULL;
-
+
if ( occan_fifo_full(fifo) ){
-
+
if ( !force )
return NULL;
-
+
/* all buffers already used ==> overwrite the oldest */
fifo->ovcnt++;
occan_fifo_get(fifo);
}
-
+
return fifo->head;
}
@@ -1883,10 +1883,10 @@ static CANMsg *occan_fifo_put_claim(occan_fifo *fifo, int force){
static void occan_fifo_put(occan_fifo *fifo){
if ( occan_fifo_full(fifo) )
return;
-
+
/* wrap around */
fifo->head = (fifo->head >= &fifo->base[fifo->cnt-1])? fifo->base : fifo->head+1;
-
+
if ( fifo->head == fifo->tail )
fifo->full = 1;
}
@@ -1894,7 +1894,7 @@ static void occan_fifo_put(occan_fifo *fifo){
static CANMsg *occan_fifo_claim_get(occan_fifo *fifo){
if ( occan_fifo_empty(fifo) )
return NULL;
-
+
/* return oldest message */
return fifo->tail;
}
@@ -1906,7 +1906,7 @@ static void occan_fifo_get(occan_fifo *fifo){
if ( occan_fifo_empty(fifo) )
return;
-
+
/* increment indexes */
fifo->tail = (fifo->tail >= &fifo->base[fifo->cnt-1])? fifo->base : fifo->tail+1;
fifo->full = 0;
diff --git a/c/src/lib/libbsp/sparc/shared/can/occan_pci.c b/c/src/lib/libbsp/sparc/shared/can/occan_pci.c
index f68d04e9ca..2dd2e5be21 100644
--- a/c/src/lib/libbsp/sparc/shared/can/occan_pci.c
+++ b/c/src/lib/libbsp/sparc/shared/can/occan_pci.c
@@ -7,11 +7,11 @@
/* Set registered device name */
#define OCCAN_DEVNAME "/dev/occanpci0"
#define OCCAN_DEVNAME_NO(devstr,no) ((devstr)[13]='0'+(no))
-
+
/* Any non-static function will begin with */
#define OCCAN_PREFIX(name) occanpci##name
-/* do nothing, assume that the interrupt handler is called
+/* do nothing, assume that the interrupt handler is called
* setup externally calling b1553_interrupt_handler.
*/
#define OCCAN_REG_INT(handler,irq,arg) \
@@ -32,7 +32,7 @@ void occanpci_interrupt_handler(int irq, void *arg);
#include "occan.c"
-/* Define method that sets redundant channel
+/* Define method that sets redundant channel
* The channel select register:
* 0x00 = byte regs
* 0x40 = channel select
@@ -49,15 +49,15 @@ static void inline occanpci_set_channel(occan_priv *priv, int channel){
int occan_pci_register(amba_confarea_type *bus)
{
/* Setup configuration */
-
+
/* Register the driver */
return OCCAN_PREFIX(_register)(bus);
}
-/* Call this from PCI interrupt handler
+/* Call this from PCI interrupt handler
* irq = the irq number of the HW device local to that IRQMP controller
- *
+ *
*/
void occanpci_interrupt_handler(int irq, void *arg){
occan_interrupt(arg);