diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-11-15 21:35:01 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2000-11-15 21:35:01 +0000 |
commit | 23bdd25eef21040009b8384e23f9ff2128aedcdd (patch) | |
tree | ff1ef4059b94127016e9aa9aeb56873fe50b55f7 /c/src/lib/libbsp/sparc/leon | |
parent | 2000-11-14 Jiri Gaisler <jgais@ws.estec.esa.nl> (diff) | |
download | rtems-23bdd25eef21040009b8384e23f9ff2128aedcdd.tar.bz2 |
2000-11-14 Jiri Gaisler <jgais@ws.estec.esa.nl>
* wrapup/Makefile.am: Pick up cache code from libcpu and pick
up .o's instead of .rel's from libcpu.
Diffstat (limited to '')
-rw-r--r-- | c/src/lib/libbsp/sparc/leon/ChangeLog | 5 | ||||
-rw-r--r-- | c/src/lib/libbsp/sparc/leon/wrapup/Makefile.am | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/sparc/leon/ChangeLog b/c/src/lib/libbsp/sparc/leon/ChangeLog index 055626b1cb..da7b542402 100644 --- a/c/src/lib/libbsp/sparc/leon/ChangeLog +++ b/c/src/lib/libbsp/sparc/leon/ChangeLog @@ -1,5 +1,10 @@ 2000-11-14 Jiri Gaisler <jgais@ws.estec.esa.nl> + * wrapup/Makefile.am: Pick up cache code from libcpu and pick + up .o's instead of .rel's from libcpu. + +2000-11-14 Jiri Gaisler <jgais@ws.estec.esa.nl> + * startup/boardinit.S: St 32-bit ram width by default. 2000-11-13 Jiri Gaisler <jgais@ws.estec.esa.nl> diff --git a/c/src/lib/libbsp/sparc/leon/wrapup/Makefile.am b/c/src/lib/libbsp/sparc/leon/wrapup/Makefile.am index 56ffe742f3..bf82dfb0a2 100644 --- a/c/src/lib/libbsp/sparc/leon/wrapup/Makefile.am +++ b/c/src/lib/libbsp/sparc/leon/wrapup/Makefile.am @@ -10,11 +10,11 @@ AUTOMAKE_OPTIONS = foreign 1.4 BSP_PIECES = startup console clock timer gnatsupp $(NETWORK) # pieces to pick up out of libcpu/sparc -CPU_PIECES = reg_win syscall +CPU_PIECES = cache reg_win syscall # bummer; have to use $foreach since % pattern subst rules only replace 1x OBJS = $(foreach piece, $(BSP_PIECES), $(wildcard ../$(piece)/$(ARCH)/*.o)) \ - $(foreach piece, $(CPU_PIECES), ../../../../libcpu/$(RTEMS_CPU)/$(piece)/$(ARCH)/$(piece).rel) + $(foreach piece, $(CPU_PIECES), ../../../../libcpu/$(RTEMS_CPU)/$(piece)/$(ARCH)/*.o) LIB = $(ARCH)/libbsp.a include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg |