diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-02-24 12:45:00 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-02-24 16:12:02 +0100 |
| commit | a4bc90af4ee55e72b18de4b64da6338634490760 (patch) | |
| tree | 64cd9a60f941054d469ce5061d9d77847de2e308 /c/src/lib/libbsp/sparc/erc32 | |
| parent | score: Fix thread TLS area initialization (diff) | |
| download | rtems-a4bc90af4ee55e72b18de4b64da6338634490760.tar.bz2 | |
sparc: Fix CPU counter support
The SPARC processors supported by RTEMS have no built-in CPU counter
support. We have to use some hardware counter module for this purpose.
The BSP must provide a 32-bit register which contains the current CPU
counter value and a function for the difference calculation. It can use
for example the GPTIMER instance used for the clock driver.
Diffstat (limited to 'c/src/lib/libbsp/sparc/erc32')
| -rw-r--r-- | c/src/lib/libbsp/sparc/erc32/Makefile.am | 1 | ||||
| -rw-r--r-- | c/src/lib/libbsp/sparc/erc32/clock/ckinit.c | 16 |
2 files changed, 16 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/sparc/erc32/Makefile.am b/c/src/lib/libbsp/sparc/erc32/Makefile.am index 08c6a8b0e6..677c44e2b7 100644 --- a/c/src/lib/libbsp/sparc/erc32/Makefile.am +++ b/c/src/lib/libbsp/sparc/erc32/Makefile.am @@ -35,7 +35,6 @@ libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \ ../../shared/sbrk.c startup/setvec.c startup/spurious.c \ startup/erc32mec.c startup/boardinit.S startup/bspidle.c \ startup/bspdelay.c ../../sparc/shared/startup/early_malloc.c -libbsp_a_SOURCES += ../../shared/cpucounterread.c # ISR Handler libbsp_a_SOURCES += ../../sparc/shared/irq_asm.S # gnatsupp diff --git a/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c b/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c index 1287645064..111a63d2ca 100644 --- a/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c +++ b/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c @@ -24,6 +24,7 @@ #include <bsp.h> #include <bspopts.h> +#include <rtems/counter.h> #if SIMSPARC_FAST_IDLE==1 #define CLOCK_DRIVER_USE_FAST_IDLE 1 @@ -63,6 +64,16 @@ uint32_t bsp_clock_nanoseconds_since_last_tick(void) #define Clock_driver_nanoseconds_since_last_tick \ bsp_clock_nanoseconds_since_last_tick +static CPU_Counter_ticks erc32_counter_difference( + CPU_Counter_ticks second, + CPU_Counter_ticks first +) +{ + CPU_Counter_ticks period = rtems_configuration_get_microseconds_per_tick(); + + return (first + period - second) % period; +} + #define Clock_driver_support_initialize_hardware() \ do { \ /* approximately 1 us per countdown */ \ @@ -80,6 +91,11 @@ uint32_t bsp_clock_nanoseconds_since_last_tick(void) ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | \ ERC32_MEC_TIMER_COUNTER_RELOAD_AT_ZERO \ ); \ + _SPARC_Counter_initialize( \ + &ERC32_MEC.Real_Time_Clock_Counter, \ + erc32_counter_difference \ + ); \ + rtems_counter_initialize_converter(1000000); \ } while (0) #define Clock_driver_support_shutdown_hardware() \ |