2001-01-24 Ralf Corsepius <corsepiu@faw.uni-ulm.de>

	* Makefile.am, README, console/console-io.c, start/start.S,
	startup/linkcmds: Update to make shsim closer to functional.

6 files changed, 125 insertions, 63 deletions

diff --git a/c/src/lib/libbsp/sh/shsim/ChangeLog b/c/src/lib/libbsp/sh/shsim/ChangeLog
index 82745bcf1e..f9e3b20537 100644
--- a/c/src/lib/libbsp/sh/shsim/ChangeLog
+++ b/c/src/lib/libbsp/sh/shsim/ChangeLog
@@ -1,3 +1,8 @@
+2001-01-24	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
+
+	* Makefile.am, README, console/console-io.c, start/start.S,
+	startup/linkcmds: Update to make shsim closer to functional.
+
 2001-01-03	Joel Sherrill <joel@OARcorp.com>
 
 	* console/console-io.c: Added console_initialize_hardware().
diff --git a/c/src/lib/libbsp/sh/shsim/Makefile.am b/c/src/lib/libbsp/sh/shsim/Makefile.am
index a0320f099b..1dd00f6334 100644
--- a/c/src/lib/libbsp/sh/shsim/Makefile.am
+++ b/c/src/lib/libbsp/sh/shsim/Makefile.am
@@ -7,12 +7,11 @@ ACLOCAL_AMFLAGS = -I ../../../../../../aclocal
 
 # wrapup is the one that actually builds and installs the library
 #  from the individual .rel files built in other directories
-#SUBDIRS = include start startup clock console timer wrapup
 SUBDIRS = include start startup clock console wrapup
 
 include $(top_srcdir)/../../bsp.am
 
-EXTRA_DIST = bsp_specs times
+EXTRA_DIST = bsp_specs
 
 include $(top_srcdir)/../../../../../../automake/subdirs.am
 include $(top_srcdir)/../../../../../../automake/local.am
diff --git a/c/src/lib/libbsp/sh/shsim/README b/c/src/lib/libbsp/sh/shsim/README
index b1143cd94b..217db75fac 100644
--- a/c/src/lib/libbsp/sh/shsim/README
+++ b/c/src/lib/libbsp/sh/shsim/README
@@ -6,9 +6,31 @@ Simple BSP for the SH simulator built into gdb.
 
 Simulator Invocation
 ====================
-target sim
+sh-rtems[elf|]-gdb <executable>
+(gdb) target sim
+(gdb) set archi [sh|sh2]
+(gdb) load <executable>
+(gdb) run
 
 Status
 ======
-Does not link yet.  libcpu/sh code needs to be addressed so we can
-get context switch code.
+
+* The simulator invocation procedure outlined above produces error messages
+with gdb-5.0, nevertheless seems to work. With gdb versions > 5.0 these
+error messages are gone. I.e. if you plan to seriously work with the gdb
+simulator better use gdb versions > 5.0.
+
+* gdb's simulator is not able to correctly emulate memory areas esp. shadowing
+and non-consecutive memory. I.e. access to memory areas besides area 0 will 
+(bogusly) generate SIGBUS exceptions.  This includes access to area 5 
+(On-chip peripherials) and prevents simulation of configuration of
+accesses to on-chip peripherials.
+
+* Due to limitations of the simulator you will only be able to run
+applications which do not try to access any SH control registers.
+
+Currently, this excludes all applications, which apply timers and serial 
+devices, i.e. almost any real world application.
+
+* The simulator currently uses gdb's trap34 interface for console I/O. This
+could be replaced with polled sci1 I/O for SHes > SH1.
diff --git a/c/src/lib/libbsp/sh/shsim/console/console-io.c b/c/src/lib/libbsp/sh/shsim/console/console-io.c
index 9eba19becc..ec3caafb00 100644
--- a/c/src/lib/libbsp/sh/shsim/console/console-io.c
+++ b/c/src/lib/libbsp/sh/shsim/console/console-io.c
@@ -24,6 +24,10 @@
 #define SYS_read        3
 #define SYS_write       4
 
+int errno ;
+
+extern int __trap34(int, int, void*, int );
+
 /*
  *  console_initialize_hardware
  *
@@ -47,7 +51,8 @@ void console_outbyte_polled(
   char ch
 )
 {
- return __trap34 (SYS_write, 1, &ch, 1);
+  __trap34 (SYS_write, 1, &ch, 1);
+  return;
 }
 
 /*
diff --git a/c/src/lib/libbsp/sh/shsim/start/start.S b/c/src/lib/libbsp/sh/shsim/start/start.S
index 9b5c0798a8..00a85358d3 100644
--- a/c/src/lib/libbsp/sh/shsim/start/start.S
+++ b/c/src/lib/libbsp/sh/shsim/start/start.S
@@ -1,29 +1,64 @@
-	.section .text
-	.global	start
-start:
+/*
+ *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
+ *           Bernd Becker (becker@faw.uni-ulm.de)
+ *
+ *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *
+ *  COPYRIGHT (c) 1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+
+	BEGIN_CODE
+	PUBLIC(start)
+SYM (start):
+        ! install the stack pointer
 	mov.l	stack_k,r15
 
 	! zero out bss
 	mov.l	edata_k,r0
 	mov.l	end_k,r1
 	mov	#0,r2
-start_l:
-	 mov.l	r2,@r0
+0:
+	mov.l	r2,@r0
 	add	#4,r0
 	cmp/ge	r0,r1
-	bt	start_l
+	bt	0b
 
-#if defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY)
-	mov.l set_fpscr_k, r1
-	jsr @r1
-	mov #0,r4
-	lds r3,fpscr
-#endif /*  defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) */
+	! copy the vector table from rom to ram
+	mov.l   vects_k,r0   	! vectab
+	mov	#0,r1		! address of boot vector table
+	mov     #0,r2		! number of bytes copied
+	mov.w   vects_size,r3   ! size of entries in vectab
+1:
+	mov.l   @r1+,r4
+	mov.l   r4,@r0
+	add     #4,r0
+	add     #1,r2
+	cmp/hi  r3,r2
+	bf      1b
+
+	mov.l   vects_k,r0   	! update vbr to point to vectab
+	ldc     r0,vbr
 
 	! call the mainline	
-	mov.l	boot_card_k,r0
-	jsr	@r0
-	or	r0,r0
+	mov #0,r4		! argc
+	mov.l main_k,r0
+	jsr @r0
+	mov #0,r5		! argv
 
 	! call exit
 	mov	r0,r4
@@ -31,25 +66,31 @@ start_l:
 	jsr	@r0
 	or	r0,r0
 
+	END_CODE
+
 	.align 2
-#if defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
-set_fpscr_k:
-	.long	___set_fpscr
-#endif /*  defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(SH4_SINGLE_ONLY) */
 stack_k:
-	.long	_stack	
+	.long	SYM(stack)	
 edata_k:
-	.long	_edata
+	.long	SYM(edata)
 end_k:
-	.long	_end
-boot_card_k:
-	.long	_boot_card
+	.long	SYM(end)
+main_k:
+	.long	SYM(boot_card)
 exit_k:
-	.long	_exit
+	.long	SYM(exit)
+
+vects_k:
+	.long	SYM(vectab)
+vects_size:
+	.word	255
 
 #ifdef __ELF__
 	.section .stack,"aw"
 #else
 	.section .stack
 #endif
-_stack:	.long	0xdeaddead
+SYM(stack):
+	.long	0xdeaddead
+monvects_k:
+	.long	SYM(monvects)
diff --git a/c/src/lib/libbsp/sh/shsim/startup/linkcmds b/c/src/lib/libbsp/sh/shsim/startup/linkcmds
index a0a099f4ee..d89e79e7ff 100644
--- a/c/src/lib/libbsp/sh/shsim/startup/linkcmds
+++ b/c/src/lib/libbsp/sh/shsim/startup/linkcmds
@@ -1,35 +1,24 @@
 /*
- * This is an adapted linker script from egcs-1.0.1 
+ * Memory layout for an SH 7032 with main memory in area 0
  *
- * Memory layout for an SH 7032 with main memory in area 2
- * This memory layout it very similar to that used for Hitachi's
- * EVB with CMON in rom
+ * NOTES: 
+ * + All RAM/ROM areas are mapped onto area 0, because gdb's simulator
+ * is not able to simulate memory areas but area 0. Area 5 (on-chip
+ * peripherials) can not be mapped onto area 0 and will cause SIGILL 
+ * exceptions.
+ * + Assumed to be compatible with other SH-cpu family members (eg. SH7045)
  *
- * NOTE: The ram start address may vary, all other start addresses are fixed
- *       Not suiteable for gdb's simulator
+ *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de)
  *
- *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
- *           Bernd Becker (becker@faw.uni-ulm.de)
- *
- *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
+ *  COPYRIGHT (c) 2001, Ralf Corsepius, Ulm, Germany
  *
  *  This program is distributed in the hope that it will be useful,
  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  *
- *
- *  COPYRIGHT (c) 1998.
- *  On-Line Applications Research Corporation (OAR).
- *  Copyright assigned to U.S. Government, 1994.
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.OARcorp.com/rtems/license.html.
- *
  *  $Id$
  */
 
-OUTPUT_FORMAT("coff-sh")
 OUTPUT_ARCH(sh)
 ENTRY(_start)
 
@@ -37,33 +26,34 @@ MEMORY
 {
   rom           : o = 0x00000000, l = 128k
   onchip_peri	: o = 0x05000000, l = 512
-  ram           : o = 0x0A040000, l = 256k
+  ram           : o = 0x00040000, l = 256k
 
-  onchip_ram    : o = 0x0f000000, l = 8k
+  onchip_ram    : o = 0x00080000, l = 8k
 }
 
 SECTIONS
 {
   /* boot vector table */
-  .monvects 0x00000000 (NOLOAD): {
+  .monvects 0x00000000 (NOLOAD) :
+  { 
     _monvects = . ;
   } > rom
 
   /* monitor play area */
-  .monram 0x0A040000 (NOLOAD) : 
+  .monram 0x00040000 (NOLOAD) : 
   {
   _ramstart = .;
   } > ram 
 
   /* monitor vector table */
-  .vects   0x0A042000 (NOLOAD) : {
+  .vects   0x00042000 (NOLOAD) : {
     _vectab = . ;
     *(.vects);
   }
 
   /* Read-only sections, merged into text segment: */
 
-  . = 0x0a044000 ;
+  . = 0x00044000 ;
   .interp        : { *(.interp) 	}
   .hash          : { *(.hash)		}
   .dynsym        : { *(.dynsym)		}
@@ -153,15 +143,15 @@ SECTIONS
   _end = . ;
   PROVIDE (end = .);
 
-  _HeapBase = . ;
+  _HeapStart = . ;
   . = . + 1024 * 20 ;
   PROVIDE( _HeapEnd = . );
 
-  _WorkSpaceBase = . ;
-  . = 0x0a080000 ;
+  _WorkSpaceStart = . ;
+  . = 0x00080000 ;
   PROVIDE(_WorkSpaceEnd = .);
 
-  _CPU_Interrupt_stack_low  = 0x0f000000 ;
+  _CPU_Interrupt_stack_low  = 0x00080000 ;
   _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ;
 
   /* Stabs debugging sections.  */
@@ -198,6 +188,6 @@ SECTIONS
   .debug_typenames 0 : { *(.debug_typenames) }
   .debug_varnames  0 : { *(.debug_varnames) }
 
-  .stack 0x0f001ff0 : { _stack = .; *(.stack) } > onchip_ram
+  .stack 0x00081ff0 : { _stack = .; *(.stack) } > onchip_ram
   /* These must appear regardless of  .  */
 }