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authorChris Johns <chrisj@rtems.org>2017-12-23 18:18:56 +1100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-01-25 08:45:26 +0100
commit2afb22b7e1ebcbe40373ff7e0efae7d207c655a9 (patch)
tree44759efe9374f13200a97e96d91bd9a2b7e5ce2a /c/src/lib/libbsp/sh/gensh1/include
parentMAINTAINERS: Add myself to Write After Approval. (diff)
downloadrtems-2afb22b7e1ebcbe40373ff7e0efae7d207c655a9.tar.bz2
Remove make preinstall
A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
Diffstat (limited to 'c/src/lib/libbsp/sh/gensh1/include')
-rw-r--r--c/src/lib/libbsp/sh/gensh1/include/bsp.h86
-rw-r--r--c/src/lib/libbsp/sh/gensh1/include/rtems/score/iosh7032.h220
-rw-r--r--c/src/lib/libbsp/sh/gensh1/include/rtems/score/ispsh7032.h162
-rw-r--r--c/src/lib/libbsp/sh/gensh1/include/sh/sci.h82
-rw-r--r--c/src/lib/libbsp/sh/gensh1/include/sh/sh7_pfc.h115
-rw-r--r--c/src/lib/libbsp/sh/gensh1/include/sh/sh7_sci.h79
-rw-r--r--c/src/lib/libbsp/sh/gensh1/include/tm27.h1
7 files changed, 0 insertions, 745 deletions
diff --git a/c/src/lib/libbsp/sh/gensh1/include/bsp.h b/c/src/lib/libbsp/sh/gensh1/include/bsp.h
deleted file mode 100644
index 2c0da4b074..0000000000
--- a/c/src/lib/libbsp/sh/gensh1/include/bsp.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * generic sh1
- *
- * This include file contains all board IO definitions.
- */
-
-/*
- * Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de)
- *
- * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- * COPYRIGHT (c) 1998.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_SH_GENSH1_BSP_H
-#define LIBBSP_SH_GENSH1_BSP_H
-
-#include <rtems.h>
-#include <termios.h> /* for tcflag_t */
-
-#include <bspopts.h>
-#include <bsp/default-initial-extension.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* EDIT: To activate the sci driver, change the define below */
-#if 1
-#include <rtems/devnull.h>
-#define BSP_CONSOLE_DEVNAME "/dev/null"
-#define BSP_CONSOLE_DRIVER_TABLE_ENTRY DEVNULL_DRIVER_TABLE_ENTRY
-#else
-#include <sh/sci.h>
-#define BSP_CONSOLE_DEVNAME "/dev/sci0"
-#define BSP_CONSOLE_DRIVER_TABLE_ENTRY DEVSCI_DRIVER_TABLE_ENTRY
-#endif
-
-/* Constants */
-
-/*
- * Defined in the linker script 'linkcmds'
- */
-
-extern void *CPU_Interrupt_stack_low;
-extern void *CPU_Interrupt_stack_high;
-
-/*
- * Device Driver Table Entries
- */
-
-/*
- * We redefine CONSOLE_DRIVER_TABLE_ENTRY to redirect /dev/console
- */
-#undef CONSOLE_DRIVER_TABLE_ENTRY
-#define CONSOLE_DRIVER_TABLE_ENTRY \
- BSP_CONSOLE_DRIVER_TABLE_ENTRY, \
- { console_initialize, console_open, console_close, \
- console_read, console_write, console_control }
-
-/*
- * BSP methods that cross file boundaries.
- */
-void bsp_hw_init(void);
-
-extern int _sci_get_brparms(
- tcflag_t cflag,
- unsigned char *smr,
- unsigned char *brr
-);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/c/src/lib/libbsp/sh/gensh1/include/rtems/score/iosh7032.h b/c/src/lib/libbsp/sh/gensh1/include/rtems/score/iosh7032.h
deleted file mode 100644
index 3750024a64..0000000000
--- a/c/src/lib/libbsp/sh/gensh1/include/rtems/score/iosh7032.h
+++ /dev/null
@@ -1,220 +0,0 @@
-/*
- * This include file contains information pertaining to the Hitachi SH
- * processor.
- *
- * NOTE: NOT ALL VALUES HAVE BEEN CHECKED !!
- *
- * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
- * Bernd Becker (becker@faw.uni-ulm.de)
- *
- * Based on "iosh7030.h" distributed with Hitachi's EVB's tutorials, which
- * contained no copyright notice.
- *
- * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- * COPYRIGHT (c) 1998.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef __IOSH7030_H
-#define __IOSH7030_H
-
-/*
- * After each line is explained whether the access is char short or long.
- * The functions read/writeb, w, l, 8, 16, 32 can be found
- * in exec/score/cpu/sh/sh_io.h
- *
- * 8 bit == char ( readb, writeb, read8, write8)
- * 16 bit == short ( readw, writew, read16, write16 )
- * 32 bit == long ( readl, writel, read32, write32 )
- */
-
-#define SCI0_SMR 0x05fffec0 /* char */
-#define SCI0_BRR 0x05fffec1 /* char */
-#define SCI0_SCR 0x05fffec2 /* char */
-#define SCI0_TDR 0x05fffec3 /* char */
-#define SCI0_SSR 0x05fffec4 /* char */
-#define SCI0_RDR 0x05fffec5 /* char */
-
-#define SCI1_SMR 0x05fffec8 /* char */
-#define SCI1_BRR 0x05fffec9 /* char */
-#define SCI1_SCR 0x05fffeca /* char */
-#define SCI1_TDR 0x05fffecb /* char */
-#define SCI1_SSR 0x05fffecc /* char */
-#define SCI1_RDR 0x05fffecd /* char */
-
-
-#define ADDRAH 0x05fffee0 /* char */
-#define ADDRAL 0x05fffee1 /* char */
-#define ADDRBH 0x05fffee2 /* char */
-#define ADDRBL 0x05fffee3 /* char */
-#define ADDRCH 0x05fffee4 /* char */
-#define ADDRCL 0x05fffee5 /* char */
-#define ADDRDH 0x05fffee6 /* char */
-#define ADDRDL 0x05fffee7 /* char */
-#define AD_DRA 0x05fffee0 /* short */
-#define AD_DRB 0x05fffee2 /* short */
-#define AD_DRC 0x05fffee4 /* short */
-#define AD_DRD 0x05fffee6 /* short */
-#define ADCSR 0x05fffee8 /* char */
-#define ADCR 0x05fffee9 /* char */
-
-/*ITU SHARED*/
-#define ITU_TSTR 0x05ffff00 /* char */
-#define ITU_TSNC 0x05ffff01 /* char */
-#define ITU_TMDR 0x05ffff02 /* char */
-#define ITU_TFCR 0x05ffff03 /* char */
-
-/*ITU CHANNEL 0*/
-#define ITU_TCR0 0x05ffff04 /* char */
-#define ITU_TIOR0 0x05ffff05 /* char */
-#define ITU_TIER0 0x05ffff06 /* char */
-#define ITU_TSR0 0x05ffff07 /* char */
-#define ITU_TCNT0 0x05ffff08 /* short */
-#define ITU_GRA0 0x05ffff0a /* short */
-#define ITU_GRB0 0x05ffff0c /* short */
-
- /*ITU CHANNEL 1*/
-#define ITU_TCR1 0x05ffff0E /* char */
-#define ITU_TIOR1 0x05ffff0F /* char */
-#define ITU_TIER1 0x05ffff10 /* char */
-#define ITU_TSR1 0x05ffff11 /* char */
-#define ITU_TCNT1 0x05ffff12 /* short */
-#define ITU_GRA1 0x05ffff14 /* short */
-#define ITU_GRB1 0x05ffff16 /* short */
-
-
- /*ITU CHANNEL 2*/
-#define ITU_TCR2 0x05ffff18 /* char */
-#define ITU_TIOR2 0x05ffff19 /* char */
-#define ITU_TIER2 0x05ffff1A /* char */
-#define ITU_TSR2 0x05ffff1B /* char */
-#define ITU_TCNT2 0x05ffff1C /* short */
-#define ITU_GRA2 0x05ffff1E /* short */
-#define ITU_GRB2 0x05ffff20 /* short */
-
- /*ITU CHANNEL 3*/
-#define ITU_TCR3 0x05ffff22 /* char */
-#define ITU_TIOR3 0x05ffff23 /* char */
-#define ITU_TIER3 0x05ffff24 /* char */
-#define ITU_TSR3 0x05ffff25 /* char */
-#define ITU_TCNT3 0x05ffff26 /* short */
-#define ITU_GRA3 0x05ffff28 /* short */
-#define ITU_GRB3 0x05ffff2A /* short */
-#define ITU_BRA3 0x05ffff2C /* short */
-#define ITU_BRB3 0x05ffff2E /* short */
-
- /*ITU CHANNELS 0-4 SHARED*/
-#define ITU_TOCR 0x05ffff31 /* char */
-
- /*ITU CHANNEL 4*/
-#define ITU_TCR4 0x05ffff32 /* char */
-#define ITU_TIOR4 0x05ffff33 /* char */
-#define ITU_TIER4 0x05ffff34 /* char */
-#define ITU_TSR4 0x05ffff35 /* char */
-#define ITU_TCNT4 0x05ffff36 /* short */
-#define ITU_GRA4 0x05ffff38 /* short */
-#define ITU_GRB4 0x05ffff3A /* short */
-#define ITU_BRA4 0x05ffff3C /* short */
-#define ITU_BRB4 0x05ffff3E /* short */
-
- /*DMAC CHANNELS 0-3 SHARED*/
-#define DMAOR 0x05ffff48 /* short */
-
- /*DMAC CHANNEL 0*/
-#define DMA_SAR0 0x05ffff40 /* long */
-#define DMA_DAR0 0x05ffff44 /* long */
-#define DMA_TCR0 0x05ffff4a /* short */
-#define DMA_CHCR0 0x05ffff4e /* short */
-
- /*DMAC CHANNEL 1*/
-#define DMA_SAR1 0x05ffff50 /* long */
-#define DMA_DAR1 0x05ffff54 /* long */
-#define DMA_TCR1 0x05fffF5a /* short */
-#define DMA_CHCR1 0x05ffff5e /* short */
-
- /*DMAC CHANNEL 3*/
-#define DMA_SAR3 0x05ffff60 /* long */
-#define DMA_DAR3 0x05ffff64 /* long */
-#define DMA_TCR3 0x05fffF6a /* short */
-#define DMA_CHCR3 0x05ffff6e /* short */
-
-/*DMAC CHANNEL 4*/
-#define DMA_SAR4 0x05ffff70 /* long */
-#define DMA_DAR4 0x05ffff74 /* long */
-#define DMA_TCR4 0x05fffF7a /* short */
-#define DMA_CHCR4 0x05ffff7e /* short */
-
-/*INTC*/
-#define INTC_IPRA 0x05ffff84 /* short */
-#define INTC_IPRB 0x05ffff86 /* short */
-#define INTC_IPRC 0x05ffff88 /* short */
-#define INTC_IPRD 0x05ffff8A /* short */
-#define INTC_IPRE 0x05ffff8C /* short */
-#define INTC_ICR 0x05ffff8E /* short */
-
-/*UBC*/
-#define UBC_BARH 0x05ffff90 /* short */
-#define UBC_BARL 0x05ffff92 /* short */
-#define UBC_BAMRH 0x05ffff94 /* short */
-#define UBC_BAMRL 0x05ffff96 /* short */
-#define UBC_BBR 0x05ffff98 /* short */
-
-/*BSC*/
-#define BSC_BCR 0x05ffffA0 /* short */
-#define BSC_WCR1 0x05ffffA2 /* short */
-#define BSC_WCR2 0x05ffffA4 /* short */
-#define BSC_WCR3 0x05ffffA6 /* short */
-#define BSC_DCR 0x05ffffA8 /* short */
-#define BSC_PCR 0x05ffffAA /* short */
-#define BSC_RCR 0x05ffffAC /* short */
-#define BSC_RTCSR 0x05ffffAE /* short */
-#define BSC_RTCNT 0x05ffffB0 /* short */
-#define BSC_RTCOR 0x05ffffB2 /* short */
-
-/*WDT*/
-#define WDT_TCSR 0x05ffffB8 /* char */
-#define WDT_TCNT 0x05ffffB9 /* char */
-#define WDT_RSTCSR 0x05ffffBB /* char */
-
-/*POWER DOWN STATE*/
-#define PDT_SBYCR 0x05ffffBC /* char */
-
-/*PORT A*/
-#define PADR 0x05ffffC0 /* short */
-
-/*PORT B*/
-#define PBDR 0x05ffffC2 /* short */
-
- /*PORT C*/
-#define PCDR 0x05ffffD0 /* short */
-
-/*PFC*/
-#define PFC_PAIOR 0x05ffffC4 /* short */
-#define PFC_PBIOR 0x05ffffC6 /* short */
-#define PFC_PACR1 0x05ffffC8 /* short */
-#define PFC_PACR2 0x05ffffCA /* short */
-#define PFC_PBCR1 0x05ffffCC /* short */
-#define PFC_PBCR2 0x05ffffCE /* short */
-#define PFC_CASCR 0x05ffffEE /* short */
-
-/*TPC*/
-#define TPC_TPMR 0x05ffffF0 /* short */
-#define TPC_TPCR 0x05ffffF1 /* short */
-#define TPC_NDERH 0x05ffffF2 /* short */
-#define TPC_NDERL 0x05ffffF3 /* short */
-#define TPC_NDRB 0x05ffffF4 /* char */
-#define TPC_NDRA 0x05ffffF5 /* char */
-#define TPC_NDRB1 0x05ffffF6 /* char */
-#define TPC_NDRA1 0x05ffffF7 /* char */
-
-#endif
diff --git a/c/src/lib/libbsp/sh/gensh1/include/rtems/score/ispsh7032.h b/c/src/lib/libbsp/sh/gensh1/include/rtems/score/ispsh7032.h
deleted file mode 100644
index 9c7cee8bd6..0000000000
--- a/c/src/lib/libbsp/sh/gensh1/include/rtems/score/ispsh7032.h
+++ /dev/null
@@ -1,162 +0,0 @@
-/*
- * This include file contains information pertaining to the Hitachi SH
- * processor.
- *
- * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
- * Bernd Becker (becker@faw.uni-ulm.de)
- *
- * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- * COPYRIGHT (c) 1998.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef __CPU_ISPS_H
-#define __CPU_ISPS_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <rtems/score/types.h>
-
-extern void __ISR_Handler( uint32_t vector );
-
-
-/*
- * interrupt vector table offsets
- */
-#define NMI_ISP_V 11
-#define USB_ISP_V 12
-#define IRQ0_ISP_V 64
-#define IRQ1_ISP_V 65
-#define IRQ2_ISP_V 66
-#define IRQ3_ISP_V 67
-#define IRQ4_ISP_V 68
-#define IRQ5_ISP_V 69
-#define IRQ6_ISP_V 70
-#define IRQ7_ISP_V 71
-#define DMA0_ISP_V 72
-#define DMA1_ISP_V 74
-#define DMA2_ISP_V 76
-#define DMA3_ISP_V 78
-
-#define IMIA0_ISP_V 80
-#define IMIB0_ISP_V 81
-#define OVI0_ISP_V 82
-
-#define IMIA1_ISP_V 84
-#define IMIB1_ISP_V 85
-#define OVI1_ISP_V 86
-
-#define IMIA2_ISP_V 88
-#define IMIB2_ISP_V 89
-#define OVI2_ISP_V 90
-
-#define IMIA3_ISP_V 92
-#define IMIB3_ISP_V 93
-#define OVI3_ISP_V 94
-
-#define IMIA4_ISP_V 96
-#define IMIB4_ISP_V 97
-#define OVI4_ISP_V 98
-
-#define ERI0_ISP_V 100
-#define RXI0_ISP_V 101
-#define TXI0_ISP_V 102
-#define TEI0_ISP_V 103
-
-#define ERI1_ISP_V 104
-#define RXI1_ISP_V 105
-#define TXI1_ISP_V 106
-#define TEI1_ISP_V 107
-
-#define PRT_ISP_V 108
-#define ADU_ISP_V 109
-#define WDT_ISP_V 112
-#define DREF_ISP_V 113
-
-
-/* dummy ISP */
-extern void _dummy_isp( void );
-
-/* Non Maskable Interrupt */
-extern void _nmi_isp( void );
-
-/* User Break Controller */
-extern void _usb_isp( void );
-
-/* External interrupts 0-7 */
-extern void _irq0_isp( void );
-extern void _irq1_isp( void );
-extern void _irq2_isp( void );
-extern void _irq3_isp( void );
-extern void _irq4_isp( void );
-extern void _irq5_isp( void );
-extern void _irq6_isp( void );
-extern void _irq7_isp( void );
-
-/* DMA - Controller */
-extern void _dma0_isp( void );
-extern void _dma1_isp( void );
-extern void _dma2_isp( void );
-extern void _dma3_isp( void );
-
-/* Interrupt Timer Unit */
-/* Timer 0 */
-extern void _imia0_isp( void );
-extern void _imib0_isp( void );
-extern void _ovi0_isp( void );
-/* Timer 1 */
-extern void _imia1_isp( void );
-extern void _imib1_isp( void );
-extern void _ovi1_isp( void );
-/* Timer 2 */
-extern void _imia2_isp( void );
-extern void _imib2_isp( void );
-extern void _ovi2_isp( void );
-/* Timer 3 */
-extern void _imia3_isp( void );
-extern void _imib3_isp( void );
-extern void _ovi3_isp( void );
-/* Timer 4 */
-extern void _imia4_isp( void );
-extern void _imib4_isp( void );
-extern void _ovi4_isp( void );
-
-/* seriell interfaces */
-extern void _eri0_isp( void );
-extern void _rxi0_isp( void );
-extern void _txi0_isp( void );
-extern void _tei0_isp( void );
-extern void _eri1_isp( void );
-extern void _rxi1_isp( void );
-extern void _txi1_isp( void );
-extern void _tei1_isp( void );
-
-/* Parity Control Unit of the Bus State Controllers */
-extern void _prt_isp( void );
-
-/* ADC */
-extern void _adu_isp( void );
-
-/* Watchdog Timer */
-extern void _wdt_isp( void );
-
-/* DRAM refresh control unit of bus state controller */
-extern void _dref_isp( void );
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/c/src/lib/libbsp/sh/gensh1/include/sh/sci.h b/c/src/lib/libbsp/sh/gensh1/include/sh/sci.h
deleted file mode 100644
index 5653afca3c..0000000000
--- a/c/src/lib/libbsp/sh/gensh1/include/sh/sci.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * Driver for the sh1 703x on-chip serial devices (sci)
- *
- * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
- * Bernd Becker (becker@faw.uni-ulm.de)
- *
- * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- * COPYRIGHT (c) 1998.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef _sh_sci_h
-#define _sh_sci_h
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*
- * Devices are set to 9600 bps, 8 databits, 1 stopbit, no
- * parity and asynchronous mode by default.
- *
- * NOTE:
- * The onboard serial devices of the SH do not support hardware
- * handshake.
- */
-
-#define DEVSCI_DRIVER_TABLE_ENTRY \
- { sh_sci_initialize, sh_sci_open, sh_sci_close, sh_sci_read, \
- sh_sci_write, sh_sci_control }
-
-extern rtems_device_driver sh_sci_initialize(
- rtems_device_major_number,
- rtems_device_minor_number,
- void *
-);
-
-extern rtems_device_driver sh_sci_open(
- rtems_device_major_number,
- rtems_device_minor_number,
- void *
-);
-
-extern rtems_device_driver sh_sci_close(
- rtems_device_major_number,
- rtems_device_minor_number,
- void *
-);
-
-extern rtems_device_driver sh_sci_read(
- rtems_device_major_number,
- rtems_device_minor_number,
- void *
-);
-
-extern rtems_device_driver sh_sci_write(
- rtems_device_major_number,
- rtems_device_minor_number,
- void *
-);
-
-extern rtems_device_driver sh_sci_control(
- rtems_device_major_number,
- rtems_device_minor_number,
- void *
-);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/c/src/lib/libbsp/sh/gensh1/include/sh/sh7_pfc.h b/c/src/lib/libbsp/sh/gensh1/include/sh/sh7_pfc.h
deleted file mode 100644
index 1045af6af8..0000000000
--- a/c/src/lib/libbsp/sh/gensh1/include/sh/sh7_pfc.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * Bit values for the pin function controller of the Hitachi SH703X
- *
- * From Hitachi tutorials
- *
- * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
- * Bernd Becker (becker@faw.uni-ulm.de)
- *
- * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- * COPYRIGHT (c) 1998.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef _sh7_pfc_h
-#define _sh7_pfc_h
-
-#include <rtems/score/iosh7032.h>
-
-/*
- * Port B IO Register (PBIOR)
- */
-#define PBIOR PFC_PBIOR
-#define PB15IOR 0x8000
-#define PB14IOR 0x4000
-#define PB13IOR 0x2000
-#define PB12IOR 0x1000
-#define PB11IOR 0x0800
-#define PB10IOR 0x0400
-#define PB9IOR 0x0200
-#define PB8IOR 0x0100
-#define PB7IOR 0x0080
-#define PB6IOR 0x0040
-#define PB5IOR 0x0020
-#define PB4IOR 0x0010
-#define PB3IOR 0x0008
-#define PB2IOR 0x0004
-#define PB1IOR 0x0002
-#define PB0IOR 0x0001
-
-/*
- * Port B Control Register (PBCR1)
- */
-#define PBCR1 PFC_PBCR1
-#define PB15MD1 0x8000
-#define PB15MD0 0x4000
-#define PB14MD1 0x2000
-#define PB14MD0 0x1000
-#define PB13MD1 0x0800
-#define PB13MD0 0x0400
-#define PB12MD1 0x0200
-#define PB12MD0 0x0100
-#define PB11MD1 0x0080
-#define PB11MD0 0x0040
-#define PB10MD1 0x0020
-#define PB10MD0 0x0010
-#define PB9MD1 0x0008
-#define PB9MD0 0x0004
-#define PB8MD1 0x0002
-#define PB8MD0 0x0001
-
-#define PB15MD PB15MD1|PB14MD0
-#define PB14MD PB14MD1|PB14MD0
-#define PB13MD PB13MD1|PB13MD0
-#define PB12MD PB12MD1|PB12MD0
-#define PB11MD PB11MD1|PB11MD0
-#define PB10MD PB10MD1|PB10MD0
-#define PB9MD PB9MD1|PB9MD0
-#define PB8MD PB8MD1|PB8MD0
-
-#define PB_TXD1 PB11MD1
-#define PB_RXD1 PB10MD1
-#define PB_TXD0 PB9MD1
-#define PB_RXD0 PB8MD1
-
-/*
- * Port B Control Register (PBCR2)
- */
-#define PBCR2 PFC_PBCR2
-#define PB7MD1 0x8000
-#define PB7MD0 0x4000
-#define PB6MD1 0x2000
-#define PB6MD0 0x1000
-#define PB5MD1 0x0800
-#define PB5MD0 0x0400
-#define PB4MD1 0x0200
-#define PB4MD0 0x0100
-#define PB3MD1 0x0080
-#define PB3MD0 0x0040
-#define PB2MD1 0x0020
-#define PB2MD0 0x0010
-#define PB1MD1 0x0008
-#define PB1MD0 0x0004
-#define PB0MD1 0x0002
-#define PB0MD0 0x0001
-
-#define PB7MD PB7MD1|PB7MD0
-#define PB6MD PB6MD1|PB6MD0
-#define PB5MD PB5MD1|PB5MD0
-#define PB4MD PB4MD1|PB4MD0
-#define PB3MD PB3MD1|PB3MD0
-#define PB2MD PB2MD1|PB2MD0
-#define PB1MD PB1MD1|PB1MD0
-#define PB0MD PB0MD1|PB0MD0
-
-#endif /* _sh7_pfc_h */
diff --git a/c/src/lib/libbsp/sh/gensh1/include/sh/sh7_sci.h b/c/src/lib/libbsp/sh/gensh1/include/sh/sh7_sci.h
deleted file mode 100644
index 0b80a485d3..0000000000
--- a/c/src/lib/libbsp/sh/gensh1/include/sh/sh7_sci.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Bit values for the serial control registers of the Hitachi SH703X
- *
- * From Hitachi tutorials
- *
- * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
- * Bernd Becker (becker@faw.uni-ulm.de)
- *
- * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- * COPYRIGHT (c) 1998.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef _sh7_sci_h
-#define _sh7_sci_h
-
-#include <rtems/score/iosh7032.h>
-
-/*
- * Serial mode register bits
- */
-
-#define SCI_SYNC_MODE 0x80
-#define SCI_SEVEN_BIT_DATA 0x40
-#define SCI_PARITY_ON 0x20
-#define SCI_ODD_PARITY 0x10
-#define SCI_STOP_BITS_2 0x08
-#define SCI_ENABLE_MULTIP 0x04
-#define SCI_PHI_64 0x03
-#define SCI_PHI_16 0x02
-#define SCI_PHI_4 0x01
-#define SCI_PHI_0 0x00
-
-/*
- * Serial register offsets, relative to SCI0_SMR or SCI1_SMR
- */
-
-#define SCI_SMR 0x00
-#define SCI_BRR 0x01
-#define SCI_SCR 0x02
-#define SCI_TDR 0x03
-#define SCI_SSR 0x04
-#define SCI_RDR 0x05
-
-/*
- * Serial control register bits
- */
-#define SCI_TIE 0x80 /* Transmit interrupt enable */
-#define SCI_RIE 0x40 /* Receive interrupt enable */
-#define SCI_TE 0x20 /* Transmit enable */
-#define SCI_RE 0x10 /* Receive enable */
-#define SCI_MPIE 0x08 /* Multiprocessor interrupt enable */
-#define SCI_TEIE 0x04 /* Transmit end interrupt enable */
-#define SCI_CKE1 0x02 /* Clock enable 1 */
-#define SCI_CKE0 0x01 /* Clock enable 0 */
-
-/*
- * Serial status register bits
- */
-#define SCI_TDRE 0x80 /* Transmit data register empty */
-#define SCI_RDRF 0x40 /* Receive data register full */
-#define SCI_ORER 0x20 /* Overrun error */
-#define SCI_FER 0x10 /* Framing error */
-#define SCI_PER 0x08 /* Parity error */
-#define SCI_TEND 0x04 /* Transmit end */
-#define SCI_MPB 0x02 /* Multiprocessor bit */
-#define SCI_MPBT 0x01 /* Multiprocessor bit transfer */
-
-#endif /* _sh7_sci_h */
diff --git a/c/src/lib/libbsp/sh/gensh1/include/tm27.h b/c/src/lib/libbsp/sh/gensh1/include/tm27.h
deleted file mode 100644
index 0dfa7bf628..0000000000
--- a/c/src/lib/libbsp/sh/gensh1/include/tm27.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <rtems/tm27-default.h>