diff options
| author | Hesham Almatary <heshamelmatary@gmail.com> | 2017-10-27 09:51:09 +1100 |
|---|---|---|
| committer | Hesham Almatary <heshamelmatary@gmail.com> | 2017-11-01 10:11:20 +1100 |
| commit | 8fa827cc83f40c831ace4a759d8c2f1280073ac6 (patch) | |
| tree | 3d35b0a5f5010750fa9358cdbea5f0745b6c4be2 /c/src/lib/libbsp/riscv/riscv_generic/start/start.S | |
| parent | cpukit: RISC-V - make riscv32 code work for riscv64 - v2 (diff) | |
| download | rtems-8fa827cc83f40c831ace4a759d8c2f1280073ac6.tar.bz2 | |
bsp: Make riscv_generic work for both riscv32 and riscv64 - v2
Update #3109
Diffstat (limited to '')
| -rw-r--r-- | c/src/lib/libbsp/riscv/riscv_generic/start/start.S (renamed from c/src/lib/libbsp/riscv32/riscv_generic/start/start.S) | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/c/src/lib/libbsp/riscv32/riscv_generic/start/start.S b/c/src/lib/libbsp/riscv/riscv_generic/start/start.S index 692afe560b..ccefb818bd 100644 --- a/c/src/lib/libbsp/riscv32/riscv_generic/start/start.S +++ b/c/src/lib/libbsp/riscv/riscv_generic/start/start.S @@ -28,11 +28,9 @@ */ #include <bsp/linker-symbols.h> #include <rtems/score/riscv-utility.h> +#include <rtems/score/cpu.h> #include <rtems/asm.h> -# define LREG lw -# define SREG sw - EXTERN(bsp_section_bss_begin) EXTERN(bsp_section_bss_end) EXTERN(ISR_Handler) @@ -90,8 +88,8 @@ SYM(_start): _loop_clear_bss: bge t0, t1, _end_clear_bss - sw x0, 0(t0) - addi t0, t0, 4 + SREG x0, 0(t0) + addi t0, t0, CPU_SIZEOF_POINTER j _loop_clear_bss _end_clear_bss: @@ -101,7 +99,7 @@ _end_clear_bss: j boot_card - .align 2 + .align 4 bsp_start_vector_table_begin: .word _RISCV_Exception_default /* User int */ .word _RISCV_Exception_default /* Supervisor int */ |