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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-07-19 12:11:19 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-07-25 10:07:43 +0200 |
| commit | 8db3f0e878b7f008ad05716f501220509662e2c4 (patch) | |
| tree | d55db59defa95096a3ef156427822a9f8744ab58 /c/src/lib/libbsp/riscv/riscv/Makefile.am | |
| parent | riscv: New CPU_Exception_frame (diff) | |
| download | rtems-8db3f0e878b7f008ad05716f501220509662e2c4.tar.bz2 | |
riscv: Rework exception handling
Remove _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector()
functions. Applications can install an exception handler via the fatal
error handler to handle synchronous exceptions.
Handle interrupt exceptions via _RISCV_Interrupt_dispatch() which must
be provided by the BSP.
Update #3433.
Diffstat (limited to '')
| -rw-r--r-- | c/src/lib/libbsp/riscv/riscv/Makefile.am | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/riscv/riscv/Makefile.am b/c/src/lib/libbsp/riscv/riscv/Makefile.am index c8299f3e72..159b4fe2c9 100644 --- a/c/src/lib/libbsp/riscv/riscv/Makefile.am +++ b/c/src/lib/libbsp/riscv/riscv/Makefile.am @@ -33,7 +33,7 @@ project_lib_LIBRARIES = librtemsbsp.a # Startup librtemsbsp_a_SOURCES = ../../../../../../bsps/shared/start/bspreset-empty.c -librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/bspstart-empty.c +librtemsbsp_a_SOURCES += ../../../../../../bsps/riscv/riscv/start/bspstart.c librtemsbsp_a_SOURCES += ../../../../../../bsps/riscv/riscv/start/bsp_fatal_halt.c # Shared |