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authorJoel Sherrill <joel.sherrill@OARcorp.com>2001-01-03 16:45:52 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2001-01-03 16:45:52 +0000
commit5e67b98dfd28eec5e3c79d15487f6a4970cada9b (patch)
tree2a3c9f844e3c1341185a51b652d0442414436bdb /c/src/lib/libbsp/powerpc
parent2001-01-03 Joel Sherrill <joel@OARcorp.com> (diff)
downloadrtems-5e67b98dfd28eec5e3c79d15487f6a4970cada9b.tar.bz2
2001-01-03 Joel Sherrill <joel@OARcorp.com>
* new_exception_processing/cpu.h, old_exception_processing/cpu.c: old_exception_processing/cpu.h, Added _CPU_Initialize_vectors(). In particular, spurious vector initialization had to be moved on old exception processing model.
Diffstat (limited to 'c/src/lib/libbsp/powerpc')
-rw-r--r--c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.h6
-rw-r--r--c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.c30
-rw-r--r--c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.h6
3 files changed, 34 insertions, 8 deletions
diff --git a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.h b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.h
index c6e6c3a23a..303c882740 100644
--- a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.h
+++ b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.h
@@ -612,7 +612,11 @@ SCORE_EXTERN struct {
#define CPU_MINIMUM_STACK_FRAME_SIZE 8
-/* ISR handler macros */
+/*
+ * ISR handler macros
+ */
+
+#define _CPU_Initialize_vectors()
/*
* Disable all interrupts for an RTEMS critical section. The previous
diff --git a/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.c b/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.c
index 5a5fadfd97..7745dc4251 100644
--- a/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.c
+++ b/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.c
@@ -58,7 +58,6 @@ void _CPU_Initialize(
void (*thread_dispatch) /* ignored on this CPU */
)
{
- proc_ptr handler = (proc_ptr)ppc_spurious;
int i;
#if (PPC_ABI != PPC_ABI_POWEROPEN)
register unsigned32 r2 = 0;
@@ -75,7 +74,7 @@ void _CPU_Initialize(
_CPU_IRQ_info.Nest_level = &_ISR_Nest_level;
_CPU_IRQ_info.Disable_level = &_Thread_Dispatch_disable_level;
- _CPU_IRQ_info.Vector_table = _ISR_Vector_table;
+ /* fill in _CPU_IRQ_info.Vector_table later */
#if (PPC_ABI == PPC_ABI_POWEROPEN)
_CPU_IRQ_info.Dispatch_r2 = ((unsigned32 *)_Thread_Dispatch)[1];
#endif
@@ -97,15 +96,34 @@ void _CPU_Initialize(
asm volatile("mtspr 0x112, %0" : "=r" (i) : "0" (i)); /* SPRG 2 */
#endif
- if ( cpu_table->spurious_handler )
- handler = (proc_ptr)cpu_table->spurious_handler;
+ _CPU_Table = *cpu_table;
+}
+
+/*
+ * _CPU_Initialize_vectors()
+ *
+ * Support routine to initialize the RTEMS vector table after it is allocated.
+ *
+ * PowerPC Specific Information:
+ *
+ * Complete initialization since the table is now allocated.
+ */
+
+void _CPU_Initialize_vectors(void)
+{
+ int i;
+ proc_ptr handler = (proc_ptr)ppc_spurious;
+
+ _CPU_IRQ_info.Vector_table = _ISR_Vector_table;
+
+ if ( _CPU_Table.spurious_handler )
+ handler = (proc_ptr)_CPU_Table.spurious_handler;
for (i = 0; i < PPC_INTERRUPT_MAX; i++)
_ISR_Vector_table[i] = handler;
- _CPU_Table = *cpu_table;
}
-
+
/*PAGE
*
* _CPU_ISR_Calculate_level
diff --git a/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.h b/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.h
index 1c468624fe..7a444a58b0 100644
--- a/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.h
+++ b/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.h
@@ -706,7 +706,11 @@ SCORE_EXTERN struct {
#define CPU_STACK_ALIGNMENT (PPC_STACK_ALIGNMENT)
-/* ISR handler macros */
+/*
+ * ISR handler macros
+ */
+
+void _CPU_Initialize_vectors(void);
/*
* Disable all interrupts for an RTEMS critical section. The previous