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authorThomas Doerfler <Thomas.Doerfler@embedded-brains.de>2007-07-04 12:25:49 +0000
committerThomas Doerfler <Thomas.Doerfler@embedded-brains.de>2007-07-04 12:25:49 +0000
commit73cdeb6a514de2310ab01d71ef2cff3155035c52 (patch)
tree02c265328a0f2615261db1bc6ad7a75d887f815f /c/src/lib/libbsp/powerpc
parent2007-06-22 Joel Sherrill <joel.sherrill@OARcorp.com> (diff)
downloadrtems-73cdeb6a514de2310ab01d71ef2cff3155035c52.tar.bz2
merged individual exception handler code to a common one.
Diffstat (limited to '')
-rw-r--r--c/src/lib/libbsp/powerpc/ChangeLog14
-rw-r--r--c/src/lib/libbsp/powerpc/acinclude.m42
-rw-r--r--c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am4
-rw-r--r--c/src/lib/libbsp/powerpc/shared/irq/irq.c4
-rw-r--r--c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S51
-rw-r--r--c/src/lib/libbsp/powerpc/shared/vectors/vectors.S81
-rw-r--r--c/src/lib/libbsp/powerpc/shared/vectors/vectors.h33
-rw-r--r--c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c30
8 files changed, 177 insertions, 42 deletions
diff --git a/c/src/lib/libbsp/powerpc/ChangeLog b/c/src/lib/libbsp/powerpc/ChangeLog
index ab2d44b60a..9f8dc5807b 100644
--- a/c/src/lib/libbsp/powerpc/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/ChangeLog
@@ -1,3 +1,17 @@
+2007-07-02 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
+
+ * acinclude.m4, shared/irq/irq_asm.S, shared/irq/irq.c,
+ * shared/vectors/vectors_entry.S, shared/vectors/vectors.h,
+ * shared/vectors/vectors_init.c, shared/vectors/vectors.S:
+ converted various BSP specific implementations into a more general
+ "shared" one
+
+2007-07-02 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
+
+ * vitex/:
+ integrated "virtex" BSP to support PPC core implemented in a
+ Xilinx virtex FPGA
+
2007-06-20 Joel Sherrill <joel.sherrill@oarcorp.com>
* shared/uboot_dump_bdinfo.c: New file.
diff --git a/c/src/lib/libbsp/powerpc/acinclude.m4 b/c/src/lib/libbsp/powerpc/acinclude.m4
index 03f267607d..7461b62eb2 100644
--- a/c/src/lib/libbsp/powerpc/acinclude.m4
+++ b/c/src/lib/libbsp/powerpc/acinclude.m4
@@ -24,6 +24,8 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR],
AC_CONFIG_SUBDIRS([score603e]);;
ss555 )
AC_CONFIG_SUBDIRS([ss555]);;
+ virtex )
+ AC_CONFIG_SUBDIRS([virtex]);;
*)
AC_MSG_ERROR([Invalid BSP]);;
esac
diff --git a/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am b/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am
index 8bdfcfc474..f8b1c23d8b 100644
--- a/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am
@@ -128,6 +128,7 @@ include_bsp_HEADERS += ../../powerpc/shared/vectors/vectors.h
noinst_PROGRAMS += vectors.rel
vectors_rel_SOURCES = ../../powerpc/shared/vectors/vectors.h \
../../powerpc/shared/vectors/vectors_init.c \
+ ../../powerpc/shared/vectors/vectors_entry.S \
../../powerpc/shared/vectors/vectors.S
vectors_rel_CPPFLAGS = $(AM_CPPFLAGS)
vectors_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
@@ -161,11 +162,12 @@ libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
- ../../../libcpu/@RTEMS_CPU@/mpc6xx/exceptions.rel \
+ ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel
EXTRA_DIST += BOOTING README.mtx603e README.MVME2100 README.MVME2300 \
+ README.MVME2400 \
README.OTHERBOARDS README.mcp750 README.MVME2307 README.dec21140
EXTRA_DIST += times.mcp750 times.mvme2307
diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq.c b/c/src/lib/libbsp/powerpc/shared/irq/irq.c
index be57fcb09f..e8c3803f64 100644
--- a/c/src/lib/libbsp/powerpc/shared/irq/irq.c
+++ b/c/src/lib/libbsp/powerpc/shared/irq/irq.c
@@ -333,14 +333,14 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
vectorDesc.on = nop_func;
vectorDesc.off = nop_func;
vectorDesc.isOn = connected;
- if (!mpc60x_set_exception (&vectorDesc)) {
+ if (!ppc_set_exception (&vectorDesc)) {
BSP_panic("Unable to initialize RTEMS decrementer raw exception\n");
}
vectorDesc.exceptIndex = ASM_EXT_VECTOR;
vectorDesc.hdl.vector = ASM_EXT_VECTOR;
vectorDesc.hdl.raw_hdl = external_exception_vector_prolog_code;
vectorDesc.hdl.raw_hdl_size = (unsigned) external_exception_vector_prolog_code_size;
- if (!mpc60x_set_exception (&vectorDesc)) {
+ if (!ppc_set_exception (&vectorDesc)) {
BSP_panic("Unable to initialize RTEMS external raw exception\n");
}
return 1;
diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S
index 4836c2a659..412a8e2214 100644
--- a/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S
+++ b/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S
@@ -30,7 +30,7 @@
.text
.p2align 5
-
+#if defined(ASM_DEC_VECTOR)
PUBLIC_VAR(decrementer_exception_vector_prolog_code)
SYM (decrementer_exception_vector_prolog_code):
@@ -45,9 +45,45 @@ SYM (decrementer_exception_vector_prolog_code):
PUBLIC_VAR (decrementer_exception_vector_prolog_code_size)
decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code
+#endif
+
+#if defined(ASM_PIT_VECTOR)
+ PUBLIC_VAR(pit_exception_vector_prolog_code)
+
+SYM (pit_exception_vector_prolog_code):
+ /*
+ * let room for exception frame
+ */
+ stwu r1, - (EXCEPTION_FRAME_END)(r1)
+ stw r4, GPR4_OFFSET(r1)
+ li r4, ASM_PIT_VECTOR
+ ba shared_raw_irq_code_entry
+
+ PUBLIC_VAR (pit_exception_vector_prolog_code_size)
+
+ pit_exception_vector_prolog_code_size = . - pit_exception_vector_prolog_code
+#endif
+
+#if defined(ASM_FIT_VECTOR)
+ PUBLIC_VAR(fit_exception_vector_prolog_code)
+SYM (fit_exception_vector_prolog_code):
+ /*
+ * let room for exception frame
+ */
+ stwu r1, - (EXCEPTION_FRAME_END)(r1)
+ stw r4, GPR4_OFFSET(r1)
+ li r4, ASM_FIT_VECTOR
+ ba shared_raw_irq_code_entry
+
+ PUBLIC_VAR (fit_exception_vector_prolog_code_size)
+
+ fit_exception_vector_prolog_code_size = . - fit_exception_vector_prolog_code
+#endif
+
PUBLIC_VAR(external_exception_vector_prolog_code)
+#if defined(ASM_EXT_VECTOR)
SYM (external_exception_vector_prolog_code):
/*
* let room for exception frame
@@ -60,6 +96,7 @@ SYM (external_exception_vector_prolog_code):
PUBLIC_VAR (external_exception_vector_prolog_code_size)
external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code
+#endif
PUBLIC_VAR(shared_raw_irq_code_entry)
PUBLIC_VAR(C_dispatch_irq_handler)
@@ -90,12 +127,14 @@ SYM (shared_raw_irq_code_entry):
stw r0, SRR0_FRAME_OFFSET(r1)
stw r3, SRR1_FRAME_OFFSET(r1)
+#if defined(PPC_MSR_EXC_BITS)
mfmsr r3
/*
* Enable data and instruction address translation, exception recovery
*/
- ori r3, r3, MSR_RI | MSR_IR | MSR_DR
+ ori r3, r3, PPC_MSR_EXC_BITS
mtmsr r3
+#endif
SYNC
/*
* Push C scratch registers on the current stack. It may
@@ -280,10 +319,12 @@ nested:
/*
* Disable data and instruction translation. Make path non recoverable...
*/
+#if defined(PPC_MSR_EXC_BITS)
mfmsr r3
- xori r3, r3, MSR_RI | MSR_IR | MSR_DR
+ xori r3, r3, PPC_MSR_EXC_BITS
mtmsr r3
SYNC
+#endif
/*
* Restore rfi related settings
*/
@@ -331,10 +372,12 @@ easy_exit:
* Disable nested exception processing, data and instruction
* translation.
*/
+#if defined(PPC_MSR_EXC_BITS)
mfmsr r3
- xori r3, r3, MSR_RI | MSR_IR | MSR_DR
+ xori r3, r3, PPC_MSR_EXC_BITS
mtmsr r3
SYNC
+#endif
/*
* Restore rfi related settings
*/
diff --git a/c/src/lib/libbsp/powerpc/shared/vectors/vectors.S b/c/src/lib/libbsp/powerpc/shared/vectors/vectors.S
index 97d7c6eea6..9901cb1595 100644
--- a/c/src/lib/libbsp/powerpc/shared/vectors/vectors.S
+++ b/c/src/lib/libbsp/powerpc/shared/vectors/vectors.S
@@ -12,22 +12,11 @@
#include <rtems/score/cpu.h>
#include <bsp/vectors.h>
#include <libcpu/raw_exception.h>
-
+
#define SYNC \
sync; \
isync
- PUBLIC_VAR (__rtems_start)
- .section .entry_point_section,"awx",@progbits
-/*
- * Entry point information used by bootloader code
- */
-SYM (__rtems_start):
- .long __rtems_entry_point
-
- /*
- * end of special Entry point section
- */
.text
/* 603e shadows GPR0..GPR3 for certain exceptions. We must switch
* that off before we can use the stack pointer. Note that this is
@@ -72,9 +61,16 @@ SYM (push_normalized_frame):
* r3 = exception vector entry point
* (256 * vector number) + few instructions
*/
+ /*
+ * FIXME: vectors should distingish
+ * all bits in mask 0x00003ff0
+ * and keep in mind that the LR/R3 contains the
+ * address BEHIND the entry code
+ */
mflr r3
/* mask upper bits in case vectors are in the high area (psim) */
rlwinm r3, r3, 32-5, 20, 31
+#if defined(ASM_VEC_VECTOR)
/*
* Remap altivec unavaliable (0xf20) to its vector number...
*/
@@ -82,6 +78,7 @@ SYM (push_normalized_frame):
bne 1f
li r3,ASM_VEC_VECTOR<<3
1:
+#endif
/*
* r3 = r3 >> 8 = vector #
*/
@@ -92,10 +89,27 @@ SYM (push_normalized_frame):
* save it nevertheless..
*/
stw r2, GPR2_OFFSET(r1)
+#if defined(ASM_VECTORS_CRITICAL)
+ lis r0,ASM_VECTORS_CRITICAL@h
+ ori r0,r0,ASM_VECTORS_CRITICAL@l
+ rlwnm. r0,r0,r3,0,0
+ beq 1f
+ /*
+ * NOTE: srr2/3 are stored in slots SRR0/1
+ * for critical exceptions
+ */
+ mfsrr2 r3
+ stw r3, SRR0_FRAME_OFFSET(r1)
+ mfsrr3 r3
+ stw r3, SRR1_FRAME_OFFSET(r1)
+ b 2f
+1:
+#endif
mfsrr0 r3
stw r3, SRR0_FRAME_OFFSET(r1)
mfsrr1 r3
stw r3, SRR1_FRAME_OFFSET(r1)
+2:
/*
* Save general purpose registers
* Already saved in prolog : R1, R3, LR.
@@ -123,14 +137,16 @@ SYM (push_normalized_frame):
* store it at the right place
*/
stw r3, GPR1_OFFSET(r1)
+
+#if defined(PPC_MSR_EXC_BITS)
/*
* Enable data and instruction address translation, exception nesting
*/
mfmsr r3
- ori r3,r3, MSR_RI | MSR_IR | MSR_DR
+ ori r3,r3, PPC_MSR_EXC_BITS
mtmsr r3
SYNC
-
+#endif
/*
* Call C exception handler
*/
@@ -161,15 +177,45 @@ SYM (push_normalized_frame):
lmw r4, GPR4_OFFSET(r1)
lwz r2, GPR2_OFFSET(r1)
- lwz r0, GPR0_OFFSET(r1)
/*
- * Disable data and instruction translation. Make path non recoverable...
+ * Disable data and instruction translation. Mark path non recoverable
*/
+#if defined(PPC_MSR_EXC_BITS)
mfmsr r3
- xori r3, r3, MSR_RI | MSR_IR | MSR_DR
+ xori r3, r3, PPC_MSR_EXC_BITS
mtmsr r3
SYNC
+#endif
+#if defined(ASM_VECTORS_CRITICAL)
+ /*
+ * determine, whether to restore from
+ * srr0/1 or srr2/3
+ */
+ lis r0,ASM_VECTORS_CRITICAL@h
+ lwz r3,EXCEPTION_NUMBER_OFFSET(r1)
+ ori r0,r0,ASM_VECTORS_CRITICAL@l
+ rlwnm. r0,r0,r3,0,0
+ beq 1f
+ /*
+ * NOTE: srr2/3 are stored in slots SRR0/1
+ * for critical exceptions
+ */
+ lwz r3, SRR1_FRAME_OFFSET(r1)
+ mtsrr3 r3
+ lwz r3, SRR0_FRAME_OFFSET(r1)
+ mtsrr2 r3
+ lwz r3, GPR3_OFFSET(r1)
+ lwz r0, GPR0_OFFSET(r1)
+ /* DONT add back the frame size but reload the value
+ * stored in the frame -- maybe the exception handler
+ * changed it with good reason (e.g., gdb pushed a dummy frame)
+ */
+ lwz r1, GPR1_OFFSET(r1)
+ SYNC
+ rfci
+1:
+#endif
/*
* Restore rfi related settings
*/
@@ -180,6 +226,7 @@ SYM (push_normalized_frame):
mtsrr0 r3
lwz r3, GPR3_OFFSET(r1)
+ lwz r0, GPR0_OFFSET(r1)
/* DONT add back the frame size but reload the value
* stored in the frame -- maybe the exception handler
* changed it with good reason (e.g., gdb pushed a dummy frame)
diff --git a/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h b/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h
index 55823893ce..e931db260b 100644
--- a/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h
+++ b/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h
@@ -12,8 +12,9 @@
*
* $Id$
*/
-#ifndef LIBBSP_POWERPC_MCP750_VECTORS_H
-#define LIBBSP_POWERPC_MCP750_VECTORS_H
+#ifndef LIBBSP_POWERPC_SHARED_VECTORS_H
+#define LIBBSP_POWERPC_SHARED_VECTORS_H
+#include <libcpu/raw_exception.h>
/*
* The callee (high level exception code written in C)
@@ -72,16 +73,26 @@
#ifndef ASM
/*
* default raw exception handlers
+ * The "*_size" symbol is generated by the linker; prevent it from
+ * being accessed in one of the short data areas by declaring
+ * it as an array
*/
extern void default_exception_vector_code_prolog();
+extern unsigned int default_exception_vector_code_prolog_size[];
extern void tgpr_clr_exception_vector_code_prolog();
-/* This symbol is generated by the linker; prevent it from
- * being accessed in one of the short data areas by declaring
- * it as an array
+extern unsigned int tgpr_clr_exception_vector_code_prolog_size[];
+/*
+ * FIXME: these should move to a "irq_asm.h"
*/
-extern int default_exception_vector_code_prolog_size[];
-extern int tgpr_clr_exception_vector_code_prolog_size[];
+extern void external_exception_vector_prolog_code();
+extern unsigned int external_exception_vector_prolog_code_size[];
+extern void decrementer_exception_vector_prolog_code();
+extern unsigned int decrementer_exception_vector_prolog_code_size[];
+extern void pit_exception_vector_prolog_code();
+extern unsigned int pit_exception_vector_prolog_code_size[];
+extern void fit_exception_vector_prolog_code();
+extern unsigned int fit_exception_vector_prolog_code_size[];
/* codemove is like memmove, but it also gets the cache line size
* as 4th parameter to synchronize them. If this last parameter is
@@ -91,6 +102,8 @@ extern int tgpr_clr_exception_vector_code_prolog_size[];
* next mutiple of 4.
*/
extern void * codemove(void *, const void *, unsigned int, unsigned long);
+extern void exception_nop_enable(const rtems_raw_except_connect_data* ptr);
+extern int exception_always_enabled(const rtems_raw_except_connect_data* ptr);
extern void initialize_exceptions();
typedef struct {
@@ -145,6 +158,12 @@ extern exception_handler_t globalExceptHdl;
typedef BSP_Exception_frame CPU_Exception_frame;
typedef exception_handler_t cpuExcHandlerType;
+/*
+ * dummy functions for exception interface
+ */
+void exception_nop_enable(const rtems_raw_except_connect_data* ptr);
+int exception_always_enabled(const rtems_raw_except_connect_data* ptr);
+
#endif /* ASM */
#endif /* LIBBSP_POWERPC_MCP750_VECTORS_H */
diff --git a/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c b/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c
index 75f57898c3..ffe295ff03 100644
--- a/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c
+++ b/c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c
@@ -25,7 +25,6 @@
static rtems_raw_except_global_settings exception_config;
static rtems_raw_except_connect_data exception_table[LAST_VALID_EXC + 1];
-extern exception_handler_t globalExceptHdl;
exception_handler_t globalExceptHdl;
/* T. Straumann: provide a stack trace
@@ -115,6 +114,7 @@ void C_exception_handler(BSP_Exception_frame* excPtr)
printk("\t CTR = %x\n", excPtr->EXC_CTR);
printk("\t XER = %x\n", excPtr->EXC_XER);
printk("\t LR = %x\n", excPtr->EXC_LR);
+ printk("\t MSR = %x\n", excPtr->EXC_MSR);
printk("\t DAR = %x\n", excPtr->EXC_DAR);
BSP_printStackTrace(excPtr);
@@ -133,16 +133,20 @@ void C_exception_handler(BSP_Exception_frame* excPtr)
}
}
-void nop_except_enable(const rtems_raw_except_connect_data* ptr)
+/***********************************************************
+ * dummy functions for on/off/isOn calls
+ * these functions just do nothing fulfill the semantic
+ * requirements to enable/disable a certain exception
+ */
+void exception_nop_enable(const rtems_raw_except_connect_data* ptr)
{
}
-int except_always_enabled(const rtems_raw_except_connect_data* ptr)
+
+int exception_always_enabled(const rtems_raw_except_connect_data* ptr)
{
return 1;
}
-int mpc60x_vector_is_valid(rtems_vector vector);
-
void initialize_exceptions()
{
int i;
@@ -174,10 +178,11 @@ void initialize_exceptions()
default: break;
}
for (i=0; i <= exception_config.exceptSize; i++) {
- if (!mpc60x_vector_is_valid (i)) {
+ if (!ppc_vector_is_valid (i)) {
continue;
}
exception_table[i].exceptIndex = i;
+#if defined(PPC_HAS_60X_VECTORS)
if ( has_shadowed_gprs
&& ( ASM_IMISS_VECTOR == i
|| ASM_DLMISS_VECTOR == i
@@ -185,14 +190,17 @@ void initialize_exceptions()
exception_table[i].hdl.raw_hdl = tgpr_clr_exception_vector_code_prolog;
exception_table[i].hdl.raw_hdl_size = (unsigned)tgpr_clr_exception_vector_code_prolog_size;
} else {
- exception_table[i].hdl = exception_config.defaultRawEntry.hdl;
+ exception_table[i].hdl = exception_config.defaultRawEntry.hdl;
}
+#else
+ exception_table[i].hdl = exception_config.defaultRawEntry.hdl;
+#endif
exception_table[i].hdl.vector = i;
- exception_table[i].on = nop_except_enable;
- exception_table[i].off = nop_except_enable;
- exception_table[i].isOn = except_always_enabled;
+ exception_table[i].on = exception_nop_enable;
+ exception_table[i].off = exception_nop_enable;
+ exception_table[i].isOn = exception_always_enabled;
}
- if (!mpc60x_init_exceptions(&exception_config)) {
+ if (!ppc_init_exceptions(&exception_config)) {
BSP_panic("Exception handling initialization failed\n");
}
#ifdef RTEMS_DEBUG