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author | Ric Claus <claus@slac.stanford.edu> | 2012-11-30 15:58:32 -0800 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2012-12-01 09:04:20 +0100 |
commit | 655bd396762cfce47959f019f8524974eb4d0983 (patch) | |
tree | d675863c2b027c7c719aa8bcbc022fa5b56c461b /c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c | |
parent | Virtex4 BSP: Various updates and improvements. (diff) | |
download | rtems-655bd396762cfce47959f019f8524974eb4d0983.tar.bz2 |
Virtex5 BSP: Various updates and improvements.
This BSP now uses the MPC6xx clock driver instead of a modified PPC403 clock
driver. Support for the MMU has been added, but is not enabled by default.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c')
-rw-r--r-- | c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c | 104 |
1 files changed, 65 insertions, 39 deletions
diff --git a/c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c b/c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c index 8847dc8b90..4aa89f7bdf 100644 --- a/c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c @@ -54,20 +54,23 @@ * Modifications for PPC405GP by Dennis Ehlin * Modifications for Virtex5 by Richard Claus <claus@slac.stanford.edu> */ - -#include <string.h> -#include <fcntl.h> - -#include <bsp.h> -#include <bsp/irq.h> -#include <bsp/vectors.h> +#include <rtems.h> +#include <rtems/config.h> #include <rtems/bspIo.h> #include <rtems/libio.h> #include <rtems/libcsupport.h> -#include <rtems/sptables.h> /* for RTEMS_VERSION */ + #include <libcpu/cpuIdent.h> #include <libcpu/spr.h> +#include <bsp.h> +#include <bsp/vectors.h> +#include <bsp/bootcard.h> +#include <bsp/irq.h> + +#include <string.h> +#include <fcntl.h> + #define DO_DOWN_ALIGN(x,a) ((x) & ~((a)-1)) #define DO_UP_ALIGN(x,a) DO_DOWN_ALIGN(((x) + (a) - 1 ),a) @@ -76,13 +79,6 @@ #define CPU_UP_ALIGN(x) DO_UP_ALIGN(x, CPU_ALIGNMENT) -/* Expected by clock.c */ -uint32_t bsp_clicks_per_usec; -bool bsp_timer_internal_clock; /* true, when timer runs with CPU clk */ -uint32_t bsp_timer_least_valid; -uint32_t bsp_timer_average_overhead; - - /* Defined in linkcmds linker script */ LINKER_SYMBOL(RamBase); LINKER_SYMBOL(RamSize); @@ -96,35 +92,37 @@ LINKER_SYMBOL(WorkAreaBase); LINKER_SYMBOL(MsgAreaBase); LINKER_SYMBOL(MsgAreaSize); LINKER_SYMBOL(__phy_ram_end); +LINKER_SYMBOL(bsp_exc_vector_base); +/* Expected by clock.c */ +uint32_t bsp_clicks_per_usec; +bool bsp_timer_internal_clock; /* true, when timer runs with CPU clk */ +uint32_t bsp_timer_least_valid; +uint32_t bsp_timer_average_overhead; + /* - * Provide weak aliases so that RTEMS distribution builds + * Bus Frequency */ -static void _noopfun(void) {} -static void _bsp_start(void) -{ - uintptr_t intrStackStart = CPU_UP_ALIGN((uint32_t)__bsp_ram_start); - uintptr_t intrStackSize = rtems_configuration_get_interrupt_stack_size(); +unsigned int BSP_bus_frequency; +/* + * processor clock frequency + */ +unsigned int BSP_processor_frequency; - /* - * Initialize default raw exception handlers. - * - * This BSP does not assume anything about firmware possibly loaded in the - * FPGA, so the external interrupt should not be enabled in order to avoid - * spurious interrupts. - */ - ppc_exc_initialize(PPC_INTERRUPT_DISABLE_MASK_DEFAULT & ~MSR_EE, - intrStackStart, - intrStackSize); +/* + * Time base divisior (bus freq / TB clock) + */ +unsigned int BSP_time_base_divisor; - /* Install our own set of exception vectors */ - BSP_rtems_irq_mngt_init(0); -} +/* + * Provide weak aliases so that RTEMS distribution builds + */ +static void _noopfun(void) {} void app_bsp_start(void) -__attribute__(( weak, alias("_bsp_start") )); +__attribute__(( weak, alias("_noopfun") )); void app_bsp_pretasking_hook(void) __attribute__(( weak, alias("_noopfun") )); @@ -147,20 +145,31 @@ static void __bsp_outchar_to_memory(char c) void BSP_ask_for_reset(void) { printk("\nSystem stopped, issue RESET"); + for(;;); } void BSP_panic(char *s) { - printk("\n%s PANIC %s\n", _RTEMS_version, s); + rtems_interrupt_level level; + + rtems_interrupt_disable(level); + + printk("\n%s PANIC %s\n", rtems_get_version_string(), s); + BSP_ask_for_reset(); } void _BSP_Fatal_error(unsigned int v) { - printk("\n%s FATAL ERROR %x\n", _RTEMS_version, v); + rtems_interrupt_level level; + + rtems_interrupt_disable(level); + + printk("\n%s FATAL ERROR %x\n", rtems_get_version_string(), v); + BSP_ask_for_reset(); } @@ -176,13 +185,14 @@ void bsp_start(void) { uintptr_t intrStackStart; uintptr_t intrStackSize; + ppc_cpu_id_t myCpu; ppc_cpu_revision_t myCpuRevision; /* Set the character output function; The application may override this */ BSP_output_char = __bsp_outchar_to_memory; - printk("\nWelcome to RTEMS %s\n", _RTEMS_version ); + printk("RTEMS %s\n", rtems_get_version_string()); /* * Get CPU identification dynamically. Note that the get_ppc_cpu_type() @@ -197,8 +207,13 @@ void bsp_start(void) * Initialize the device driver parameters */ + /* For mpc6xx clock driver: */ + BSP_bus_frequency = 465000000; + BSP_processor_frequency = 465000000; /* Measured with a DPM 440 2012/8/13 */ + BSP_time_base_divisor = 1000; + /* Timebase register ticks/microsecond; The application may override these */ - bsp_clicks_per_usec = 450; + bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000); bsp_timer_internal_clock = true; bsp_timer_average_overhead = 2; bsp_timer_least_valid = 3; @@ -208,6 +223,12 @@ void bsp_start(void) */ intrStackStart = CPU_UP_ALIGN((uint32_t)__bsp_ram_start); intrStackSize = rtems_configuration_get_interrupt_stack_size(); + + ppc_exc_initialize(PPC_INTERRUPT_DISABLE_MASK_DEFAULT, + intrStackStart, + intrStackSize); + + /* Let the user know what parameters we were compiled with */ printk(" Base/Start End Size\n" "RAM: 0x%08x 0x%x\n" "RTEMS: 0x%08x\n" @@ -224,6 +245,11 @@ void bsp_start(void) (uint32_t)MsgAreaBase, (uint32_t)MsgAreaSize, (uint32_t)__phy_ram_end); + /* + * Initialize RTEMS IRQ system + */ + BSP_rtems_irq_mngt_init(0); + /* Continue with application-specific initialization */ app_bsp_start(); } |