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authorSebastian Huber <sebastian.huber@embedded-brains.de>2018-04-20 10:35:35 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-04-20 13:52:14 +0200
commit99648958668d3a33ee57974479b36201fe303f34 (patch)
tree6f27ea790e2823c6156e71219a4f54680263fac6 /c/src/lib/libbsp/powerpc/tqm8xx
parentbsps: Move start files to bsps (diff)
downloadrtems-99648958668d3a33ee57974479b36201fe303f34.tar.bz2
bsps: Move startup files to bsps
Adjust build support files to new directory layout. This patch is a part of the BSP source reorganization. Update #3285.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/tqm8xx')
-rw-r--r--c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am14
-rw-r--r--c/src/lib/libbsp/powerpc/tqm8xx/startup/bsp_specs9
-rw-r--r--c/src/lib/libbsp/powerpc/tqm8xx/startup/bspgetworkarea.c34
-rw-r--r--c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c156
-rw-r--r--c/src/lib/libbsp/powerpc/tqm8xx/startup/cpuinit.c133
-rw-r--r--c/src/lib/libbsp/powerpc/tqm8xx/startup/linkcmds43
-rw-r--r--c/src/lib/libbsp/powerpc/tqm8xx/startup/mmutlbtab.c103
7 files changed, 7 insertions, 485 deletions
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am b/c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am
index e447672b8e..2e94f2beb4 100644
--- a/c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am
+++ b/c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am
@@ -3,7 +3,7 @@ ACLOCAL_AMFLAGS = -I ../../../../aclocal
include $(top_srcdir)/../../../../automake/compile.am
include $(top_srcdir)/../../bsp.am
-dist_project_lib_DATA = startup/bsp_specs
+dist_project_lib_DATA = ../../../../../../bsps/powerpc/tqm8xx/start/bsp_specs
noinst_PROGRAMS =
@@ -18,7 +18,7 @@ rtems_crti.$(OBJEXT): ../../../../../../bsps/powerpc/shared/start/rtems_crti.S
project_lib_DATA += rtems_crti.$(OBJEXT)
project_lib_DATA += linkcmds
-dist_project_lib_DATA += ../shared/startup/linkcmds.base
+dist_project_lib_DATA += ../../../../../../bsps/powerpc/shared/start/linkcmds.base
project_lib_LIBRARIES = librtemsbsp.a
librtemsbsp_a_SOURCES =
@@ -39,12 +39,12 @@ librtemsbsp_a_SOURCES += spi/spi.c
librtemsbsp_a_SOURCES += timer/timer.c
# startup
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/bspfatal-default.c
-librtemsbsp_a_SOURCES += ../shared/startup/bspidle.c
-librtemsbsp_a_SOURCES += startup/bspstart.c
-librtemsbsp_a_SOURCES += startup/bspgetworkarea.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/start/bspidle.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/tqm8xx/start/bspstart.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/tqm8xx/start/bspgetworkarea.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/getentropy/getentropy-cpucounter.c
-librtemsbsp_a_SOURCES += startup/mmutlbtab.c
-librtemsbsp_a_SOURCES += startup/cpuinit.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/tqm8xx/start/mmutlbtab.c
+librtemsbsp_a_SOURCES += ../../../../../../bsps/powerpc/tqm8xx/start/cpuinit.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/sbrk.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/bspreset-empty.c
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/startup/bsp_specs b/c/src/lib/libbsp/powerpc/tqm8xx/startup/bsp_specs
deleted file mode 100644
index b5cd6764ce..0000000000
--- a/c/src/lib/libbsp/powerpc/tqm8xx/startup/bsp_specs
+++ /dev/null
@@ -1,9 +0,0 @@
-%rename endfile old_endfile
-%rename startfile old_startfile
-
-*startfile:
-%{!qrtems: %(old_startfile)} \
-%{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s}}
-
-*endfile:
-%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s ecrtn%O%s}
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspgetworkarea.c b/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspgetworkarea.c
deleted file mode 100644
index 4a0a4db534..0000000000
--- a/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspgetworkarea.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/**
- * @file
- *
- * @ingroup tqm8xx
- *
- * @brief Source for BSP Get Work Area Memory
- */
-
-/*
- * Copyright (c) 2008, 2018 embedded brains GmbH. All rights reserved.
- *
- * embedded brains GmbH
- * Dornierstr. 4
- * 82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <bsp.h>
-#include <bsp/bootcard.h>
-#include <bsp/linker-symbols.h>
-
-void bsp_work_area_initialize(void)
-{
- char *ram_end = (char *) (TQM_BD_INFO.sdram_size - (uint32_t)TopRamReserved);
- void *area_start = bsp_section_work_begin;
- uintptr_t area_size = (uintptr_t) ram_end - (uintptr_t) area_start;
-
- bsp_work_area_initialize_default( area_start, area_size );
-}
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c b/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c
deleted file mode 100644
index df0581ce77..0000000000
--- a/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/**
- * @file
- *
- * @ingroup tqm8xx
- *
- * @brief Source for BSP startup code.
- */
-
-/*
- * Copyright (c) 2008
- * Embedded Brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * rtems@embedded-brains.de
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <stdlib.h>
-
-#include <rtems.h>
-#include <rtems/counter.h>
-
-#include <libcpu/powerpc-utility.h>
-
-#include <bsp.h>
-#include <bsp/vectors.h>
-#include <bsp/bootcard.h>
-#include <bsp/irq-generic.h>
-
-#ifdef BSP_HAS_TQMMON
-/*
- * FIXME: TQ Monitor structure
- */
-#endif /* BSP_HAS_TQMMON */
-
-/* Configuration parameters for console driver, ... */
-uint32_t BSP_bus_frequency;
-
-/* Configuration parameter for clock driver */
-uint32_t bsp_time_base_frequency;
-
-/* Legacy */
-uint32_t bsp_clicks_per_usec; /* for PIT driver: OSCCLK */
-
-static const char *bsp_tqm_get_cib_string( const char *cib_id)
-{
- char srch_pattern[10] = "";
- char *fnd_str;
- /*
- * create search pattern
- */
- strcat(srch_pattern,"-");
- strncat(srch_pattern,
- cib_id,
- sizeof(srch_pattern)-1-strlen(srch_pattern));
- strncat(srch_pattern,
- " ",
- sizeof(srch_pattern)-1-strlen(srch_pattern));
- /*
- * search for pattern in info block (CIB)
- */
- fnd_str = strstr((const char *)TQM_CONF_INFO_BLOCK_ADDR,srch_pattern);
-
- if (fnd_str == NULL) {
- return NULL;
- }
- else {
- /*
- * found? then advance behind search pattern
- */
- return fnd_str + strlen(srch_pattern);
- }
-}
-
-static rtems_status_code bsp_tqm_get_cib_uint32( const char *cib_id,
- uint32_t *result)
-{
- const char *item_ptr;
- char *end_ptr;
- item_ptr = bsp_tqm_get_cib_string(cib_id);
- if (item_ptr == NULL) {
- return RTEMS_INVALID_ID;
- }
- /*
- * convert string to uint32
- */
- *result = strtoul(item_ptr,&end_ptr,10);
- return RTEMS_SUCCESSFUL;
-}
-
-void bsp_start( void)
-{
-
- uintptr_t interrupt_stack_start = (uintptr_t) bsp_interrupt_stack_start;
- uintptr_t interrupt_stack_size = (uintptr_t) bsp_interrupt_stack_end
- - interrupt_stack_start;
-
- /*
- * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
- * function stores the result in global variables so that it can be used
- * later...
- */
- get_ppc_cpu_type();
- get_ppc_cpu_revision();
-
- /* Basic CPU initialization */
- cpu_init();
-
- /*
- * Enable instruction and data caches. Do not force writethrough mode.
- */
-
-#if BSP_INSTRUCTION_CACHE_ENABLED
- rtems_cache_enable_instruction();
-#endif
-
-#if BSP_DATA_CACHE_ENABLED
- rtems_cache_enable_data();
-#endif
-
- /*
- * This is evaluated during runtime, so it should be ok to set it
- * before we initialize the drivers.
- */
-
- /* Initialize some device driver parameters */
- /*
- * get the (internal) bus frequency
- * NOTE: the external bus may be clocked at a lower speed
- * but this does not concern the internal units like PIT,
- * DEC, baudrate generator etc)
- */
- if (RTEMS_SUCCESSFUL !=
- bsp_tqm_get_cib_uint32("cu",
- &BSP_bus_frequency)) {
- rtems_panic("Cannot determine BUS frequency\n");
- }
-
- bsp_time_base_frequency = BSP_bus_frequency / 16;
- bsp_clicks_per_usec = bsp_time_base_frequency / 1000000;
- rtems_counter_initialize_converter(bsp_time_base_frequency);
-
- /* Initialize exception handler */
- ppc_exc_initialize(interrupt_stack_start, interrupt_stack_size);
-
- /* Initalize interrupt support */
- bsp_interrupt_initialize();
-
-#ifdef SHOW_MORE_INIT_SETTINGS
- printk("Exit from bspstart\n");
-#endif
-}
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/startup/cpuinit.c b/c/src/lib/libbsp/powerpc/tqm8xx/startup/cpuinit.c
deleted file mode 100644
index 5d34e07cfb..0000000000
--- a/c/src/lib/libbsp/powerpc/tqm8xx/startup/cpuinit.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * cpuinit.c
- *
- * TQM8xx initialization routines.
- * derived from MBX8xx BSP
- * adapted to TQM8xx by Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
- *
- * Copyright (c) 1999, National Research Council of Canada
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <bsp.h>
-#include <bsp/tqm.h>
-
-
-/*
- * Initialize TQM8xx
- */
-void _InitTQM8xx (void)
-{
- register uint32_t r1;
-
- /*
- * Initialize the Instruction Support Control Register (ICTRL) to a
- * an appropriate value for normal operation. A different value,
- * such as 0x0, may be more appropriate for debugging.
- */
- r1 = 0x00000007;
- _mtspr( M8xx_ICTRL, r1 );
-
- /*
- * Disable and invalidate the instruction and data caches.
- */
- r1 = M8xx_CACHE_CMD_DISABLE;
- _mtspr( M8xx_IC_CST, r1 );
- _isync;
- r1 = M8xx_CACHE_CMD_UNLOCKALL;
- _mtspr( M8xx_IC_CST, r1 );
- _isync;
- r1 = M8xx_CACHE_CMD_INVALIDATE; /* invalidate all */
- _mtspr( M8xx_IC_CST, r1 );
- _isync;
-
- r1 = M8xx_CACHE_CMD_DISABLE;
- _mtspr( M8xx_DC_CST, r1 );
- _isync;
- r1 = M8xx_CACHE_CMD_UNLOCKALL;
- _mtspr( M8xx_DC_CST, r1 );
- _isync;
- r1 = M8xx_CACHE_CMD_INVALIDATE; /* invalidate all */
- _mtspr( M8xx_DC_CST, r1 );
- _isync;
-
- /*
- * Initialize the SIU Module Configuration Register (SIUMCR)
- * m8xx.siumcr = 0x00602900, the default value.
- */
- m8xx.siumcr = M8xx_SIUMCR_EARP0 | M8xx_SIUMCR_DBGC3 | M8xx_SIUMCR_DBPC0 |
- M8xx_SIUMCR_DPC | M8xx_SIUMCR_MLRC2 | M8xx_SIUMCR_SEME;
-
- /*
- * Initialize the System Protection Control Register (SYPCR).
- * The SYPCR can only be written once after Reset.
- * - Enable bus monitor
- * - Disable software watchdog timer
- * m8xx.sypcr = 0xFFFFFF88, the default MBX and firmware value.
- */
- m8xx.sypcr = M8xx_SYPCR_SWTC(0xFFFF) | M8xx_SYPCR_BMT(0xFF) |
- M8xx_SYPCR_BME | M8xx_SYPCR_SWF;
-
- /* Initialize the SIU Interrupt Edge Level Mask Register (SIEL) */
- m8xx.siel = 0xAAAA0000; /* Default MBX and firmware value. */
-
- /* Initialize the Transfer Error Status Register (TESR) */
- m8xx.tesr = 0xFFFFFFFF; /* Default firmware value. */
-
- /* Initialize the SDMA Configuration Register (SDCR) */
- m8xx.sdcr = 0x00000001; /* Default firmware value. */
-
- /*
- * Initialize the Timebase Status and Control Register (TBSCR)
- * m8xx.tbscr = 0x00C3, default MBX and firmware value.
- */
- m8xx.tbscrk = M8xx_UNLOCK_KEY; /* unlock TBSCR */
- m8xx.tbscr = M8xx_TBSCR_REFA | M8xx_TBSCR_REFB |
- M8xx_TBSCR_TBF | M8xx_TBSCR_TBE;
-
- /* Initialize the Real-Time Clock Status and Control Register (RTCSC) */
- m8xx.rtcsk = M8xx_UNLOCK_KEY; /* unlock RTCSC */
- m8xx.rtcsc = 0x00C3; /* Default MBX and firmware value. */
-
- /* Unlock other Real-Time Clock registers */
- m8xx.rtck = M8xx_UNLOCK_KEY; /* unlock RTC */
- m8xx.rtseck = M8xx_UNLOCK_KEY; /* unlock RTSEC */
- m8xx.rtcalk = M8xx_UNLOCK_KEY; /* unlock RTCAL */
-
- /* Initialize the Periodic Interrupt Status and Control Register (PISCR) */
- m8xx.piscrk = M8xx_UNLOCK_KEY; /* unlock PISCR */
- m8xx.piscr = 0x0083; /* Default MBX and firmware value. */
-
- /* Initialize the System Clock and Reset Control Register (SCCR)
- * Set the clock sources and division factors:
- * Timebase Source is GCLK2 / 16
- */
- m8xx.sccrk = M8xx_UNLOCK_KEY; /* unlock SCCR */
- m8xx.sccr |= 0x02000000;
-
- /* Unlock the timebase and decrementer registers. */
- m8xx.tbk = M8xx_UNLOCK_KEY;
- /*
- * Initialize decrementer register to a large value to
- * guarantee that a decrementer interrupt will not be
- * generated before the kernel is fully initialized.
- */
- r1 = 0x7FFFFFFF;
- _mtspr( M8xx_DEC, r1 );
-
- /* Initialize the timebase register (TB is 64 bits) */
- r1 = 0x00000000;
- _mtspr( M8xx_TBU_WR, r1 );
- _mtspr( M8xx_TBL_WR, r1 );
-}
-/*
- * further initialization (called from bsp_start)
- */
-void cpu_init(void)
-{
- /* mmu initialization */
- mmu_init();
-}
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/startup/linkcmds b/c/src/lib/libbsp/powerpc/tqm8xx/startup/linkcmds
deleted file mode 100644
index 7171d0230a..0000000000
--- a/c/src/lib/libbsp/powerpc/tqm8xx/startup/linkcmds
+++ /dev/null
@@ -1,43 +0,0 @@
-/**
- * @file
- *
- * TQM8xx
- */
-
-TopRamReserved = DEFINED(TopRamReserved) ? TopRamReserved : 0;
-
-MEMORY {
- EMPTY : ORIGIN = 0, LENGTH = 0
- RAM : ORIGIN = 0x10000, LENGTH = 128M - 64k
- immr : org = 0xfa200000, l = 16K
- ROM : ORIGIN = 0x40000000, LENGTH = 8M
-}
-
-REGION_ALIAS ("REGION_START", RAM);
-REGION_ALIAS ("REGION_FAST_TEXT", RAM);
-REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
-REGION_ALIAS ("REGION_TEXT", RAM);
-REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
-REGION_ALIAS ("REGION_RODATA", RAM);
-REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
-REGION_ALIAS ("REGION_FAST_DATA", RAM);
-REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
-REGION_ALIAS ("REGION_DATA", RAM);
-REGION_ALIAS ("REGION_DATA_LOAD", RAM);
-REGION_ALIAS ("REGION_BSS", RAM);
-REGION_ALIAS ("REGION_RWEXTRA", RAM);
-REGION_ALIAS ("REGION_WORK", RAM);
-REGION_ALIAS ("REGION_STACK", RAM);
-REGION_ALIAS ("REGION_NOCACHE", EMPTY);
-REGION_ALIAS ("REGION_NOCACHE_LOAD", EMPTY);
-REGION_ALIAS ("REGION_NVRAM", EMPTY);
-
-SECTIONS {
- dpram : {
- m8xx = .;
- _m8xx = .;
- /* . += (16 * 1024); this makes the mbx loader crash */
- } >immr
-}
-
-INCLUDE linkcmds.base
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/startup/mmutlbtab.c b/c/src/lib/libbsp/powerpc/tqm8xx/startup/mmutlbtab.c
deleted file mode 100644
index 8b1ad90036..0000000000
--- a/c/src/lib/libbsp/powerpc/tqm8xx/startup/mmutlbtab.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/*===============================================================*\
-| Project: RTEMS TQM8xx BSP |
-+-----------------------------------------------------------------+
-| This file has been adapted to MPC8xx by |
-| Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> |
-| Copyright (c) 2008 |
-| Embedded Brains GmbH |
-| Obere Lagerstr. 30 |
-| D-82178 Puchheim |
-| Germany |
-| rtems@embedded-brains.de |
-| |
-| See the other copyright notice below for the original parts. |
-+-----------------------------------------------------------------+
-| The license and distribution terms for this file may be |
-| found in the file LICENSE in this distribution or at |
-| |
-| http://www.rtems.org/license/LICENSE. |
-| |
-+-----------------------------------------------------------------+
-| this file contains the console driver |
-\*===============================================================*/
-/* derived from: */
-/*
- * mmutlbtab.c
- *
- * Copyright (c) 1999, National Research Council of Canada
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#include <bsp.h>
-#include <mpc8xx/mmu.h>
-/*
- * This MMU_TLB_table is used to statically initialize the Table Lookaside
- * Buffers in the MMU of the TQM8xx board.
- *
- * We initialize the entries in both the instruction and data TLBs
- * with the same values - a few bits relevant to the data TLB are unused
- * in the instruction TLB.
- *
- * An Effective Page Number (EPN), Tablewalk Control Register (TWC) and
- * Real Page Number (RPN) value are supplied in the table for each TLB entry.
- *
- * The instruction and data TLBs each can hold 32 entries, so _TLB_Table must
- * not have more than 32 lines in it!
- *
- * We set up the virtual memory map so that virtual address of a
- * location is equal to its real address.
- */
-MMU_TLB_table_t MMU_TLB_table[] = {
- /*
- * DRAM: Start address 0x00000000, 128M,
- * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy,
- * R/W,X for all, no ASID comparison, not cache-inhibited.
- * EPN TWC RPN
- */
- { 0x00000200, 0x0D, 0x000009FD }, /* DRAM - PS=8M */
- { 0x00800200, 0x0D, 0x008009FD }, /* DRAM - PS=8M */
- { 0x01000200, 0x0D, 0x010009FD }, /* DRAM - PS=8M */
- { 0x01800200, 0x0D, 0x018009FD }, /* DRAM - PS=8M */
- { 0x02000200, 0x0D, 0x020009FD }, /* DRAM - PS=8M */
- { 0x02800200, 0x0D, 0x028009FD }, /* DRAM - PS=8M */
- { 0x03000200, 0x0D, 0x030009FD }, /* DRAM - PS=8M */
- { 0x03800200, 0x0D, 0x038009FD }, /* DRAM - PS=8M */
- { 0x04000200, 0x0D, 0x040009FD }, /* DRAM - PS=8M */
- { 0x04800200, 0x0D, 0x048009FD }, /* DRAM - PS=8M */
- { 0x05000200, 0x0D, 0x050009FD }, /* DRAM - PS=8M */
- { 0x05800200, 0x0D, 0x058009FD }, /* DRAM - PS=8M */
- { 0x06000200, 0x0D, 0x060009FD }, /* DRAM - PS=8M */
- { 0x06800200, 0x0D, 0x068009FD }, /* DRAM - PS=8M */
- { 0x07000200, 0x0D, 0x070009FD }, /* DRAM - PS=8M */
- { 0x07800200, 0x0D, 0x078009FD }, /* DRAM - PS=8M */
- /*
- *
- * (IMMR-SPRs) Dual Port RAM: Start address 0xFA200000, 16K,
- * ASID=0x0, APG=0x0, guarded memory, write-through data cache policy,
- * R/W,X for all, no ASID comparison, cache-inhibited.
- *
- * Note: We use the value in MBXA/PG2, which is also the value that
- * EPPC-Bug programmed into our boards. The alternative is the value
- * in MBXA/PG1: 0xFFA00000. This value might well depend on the revision
- * of the firmware.
- * EPN TWC RPN
- */
- { 0xFA200200, 0x13, 0xFA2009FF }, /* IMMR - PS=16K */
- /*
- *
- * Flash: Start address 0x40000000, 8M,
- * ASID=0x0, APG=0x0, not guarded memory,
- * R/O,X for all, no ASID comparison, not cache-inhibited.
- * EPN TWC RPN
- */
- { 0x40000200, 0x0D, 0x40000CFD } /* Flash - PS=8M */
-};
-
-/*
- * MMU_N_TLB_Table_Entries is defined here because the size of the
- * MMU_TLB_table is only known in this file.
- */
-int MMU_N_TLB_Table_Entries = ( sizeof(MMU_TLB_table) / sizeof(MMU_TLB_table[0]) );