diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2009-08-26 13:31:40 +0000 |
---|---|---|
committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2009-08-26 13:31:40 +0000 |
commit | fc472c9796852e8ab3b097b13ef5bf4f2aa82a6e (patch) | |
tree | f468cb989d58e7ace9e444d3e0236730ac0ea66c /c/src/lib/libbsp/powerpc/tqm8xx/startup | |
parent | 2009-08-26 Joel Sherrill <joel.sherrill@oarcorp.com> (diff) | |
download | rtems-fc472c9796852e8ab3b097b13ef5bf4f2aa82a6e.tar.bz2 |
2009-08-26 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, startup/bspstart.c: Rename BSP specific idle thread to
bsp_idle_thread and split into its own file.
* startup/bspidle.c: New file.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/tqm8xx/startup')
-rw-r--r-- | c/src/lib/libbsp/powerpc/tqm8xx/startup/bspidle.c | 51 | ||||
-rw-r--r-- | c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c | 25 |
2 files changed, 51 insertions, 25 deletions
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspidle.c b/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspidle.c new file mode 100644 index 0000000000..29a2f0a8d8 --- /dev/null +++ b/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspidle.c @@ -0,0 +1,51 @@ +/** + * @file + * + * @ingroup tqm8xx + * + * @brief Source for BSP Idle Thread + */ + +/* + * Copyright (c) 2008 + * Embedded Brains GmbH + * Obere Lagerstr. 30 + * D-82178 Puchheim + * Germany + * rtems@embedded-brains.de + * + * The license and distribution terms for this file may be found in the file + * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE. + * + * $Id$ + */ + +#include <rtems.h> +#include <libcpu/powerpc-utility.h> + +#include <bsp.h> + +/** + * @brief BSP Idle thread body. + * + * Replaces the one in c/src/exec/score/src/threadidlebody.c + * The MSR[POW] bit is set to put the CPU into the low power mode + * defined in HID0. HID0 is set during starup in start.S. + */ +void *bsp_idle_thread( uintptr_t ignored ) +{ + + while (1) { + asm volatile ( + "mfmsr 3;" + "oris 3, 3, 4;" + "sync;" + "mtmsr 3;" + "isync;" + "ori 3, 3, 0;" + "ori 3, 3, 0" + ); + } + + return NULL; +} diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c b/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c index ddbce47774..b02ccdb057 100644 --- a/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c @@ -193,28 +193,3 @@ void bsp_start( void) printk("Exit from bspstart\n"); #endif } - -/** - * @brief Idle thread body. - * - * Replaces the one in c/src/exec/score/src/threadidlebody.c - * The MSR[POW] bit is set to put the CPU into the low power mode - * defined in HID0. HID0 is set during starup in start.S. - */ -void *_Thread_Idle_body( uintptr_t ignored ) -{ - - while (1) { - asm volatile ( - "mfmsr 3;" - "oris 3, 3, 4;" - "sync;" - "mtmsr 3;" - "isync;" - "ori 3, 3, 0;" - "ori 3, 3, 0" - ); - } - - return NULL; -} |