added printk support

added port init, added phy support
init mmu

3 files changed, 0 insertions, 822 deletions

diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.h b/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.h
deleted file mode 100644
index f590317c63..0000000000
--- a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.h
+++ /dev/null
@@ -1,204 +0,0 @@
-/*===============================================================*\
-| Project: RTEMS TQM8xx BSP                                       |
-+-----------------------------------------------------------------+
-| This file has been adapted to MPC8xx by                         |
-|    Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>         |
-|                    Copyright (c) 2008                           |
-|                    Embedded Brains GmbH                         |
-|                    Obere Lagerstr. 30                           |
-|                    D-82178 Puchheim                             |
-|                    Germany                                      |
-|                    rtems@embedded-brains.de                     |
-|                                                                 |
-| See the other copyright notice below for the original parts.    |
-+-----------------------------------------------------------------+
-| The license and distribution terms for this file may be         |
-| found in the file LICENSE in this distribution or at            |
-|                                                                 |
-| http://www.rtems.com/license/LICENSE.                           |
-|                                                                 |
-+-----------------------------------------------------------------+
-| this file contains the console driver                           |
-\*===============================================================*/
-/* derived from: generic MPC83xx BSP */
-/* irq.h
- *
- *  This include file describe the data structure and the functions implemented
- *  by rtems to write interrupt handlers.
- *
- *  CopyRight (C) 1999 valette@crf.canon.fr
- *
- *  This code is heavilly inspired by the public specification of STREAM V2
- *  that can be found at :
- *
- *      <http://www.chorus.com/Documentation/index.html> by following
- *  the STREAM API Specification Document link.
- *
- *  The license and distribution terms for this file may be
- *  found in found in the file LICENSE in this distribution or at
- *  http://www.rtems.com/license/LICENSE.
- *
- *  $Id$
- */
-
-#ifndef LIBBSP_POWERPC_TQM8XX_IRQ_IRQ_H
-#define LIBBSP_POWERPC_TQM8XX_IRQ_IRQ_H
-
-#include <rtems/irq.h>
-
-#ifndef ASM
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-extern volatile unsigned int ppc_cached_irq_mask;
-
-/*
- * Symblolic IRQ names and related definitions.
- */
-
-  /*
-   * SIU IRQ handler related definitions
-   */
-#define BSP_SIU_IRQ_NUMBER    		16 /* 16 reserved but in the future... */
-#define BSP_SIU_IRQ_LOWEST_OFFSET	0
-#define  BSP_SIU_IRQ_MAX_OFFSET	 	(BSP_SIU_IRQ_LOWEST_OFFSET + BSP_SIU_IRQ_NUMBER - 1)
-  /*
-   * CPM IRQ handlers related definitions
-   * CAUTION : BSP_CPM_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
-   */
-#define BSP_CPM_IRQ_NUMBER		32
-#define BSP_CPM_IRQ_LOWEST_OFFSET	(BSP_SIU_IRQ_NUMBER + BSP_SIU_IRQ_LOWEST_OFFSET)
-#define BSP_CPM_IRQ_MAX_OFFSET	 	(BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1)
-  /*
-   * PowerPc exceptions handled as interrupt where a rtems managed interrupt
-   * handler might be connected
-   */
-#define BSP_PROCESSOR_IRQ_NUMBER	1
-#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CPM_IRQ_MAX_OFFSET + 1)
-#define BSP_PROCESSOR_IRQ_MAX_OFFSET	(BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1)
-  /*
-   * Summary
-   */
-#define BSP_IRQ_NUMBER		(BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
-#define BSP_LOWEST_OFFSET	(BSP_SIU_IRQ_LOWEST_OFFSET)
-#define BSP_MAX_OFFSET		(BSP_PROCESSOR_IRQ_MAX_OFFSET)
-    /*
-     * Some SIU IRQ symbolic name definition. Please note that
-     * INT IRQ are defined but a single one will be used to
-     * redirect all CPM interrupt.
-     */
-#define BSP_SIU_EXT_IRQ_0      	0
-#define BSP_SIU_INT_IRQ_0       1
-
-#define BSP_SIU_EXT_IRQ_1      	2
-#define BSP_SIU_INT_IRQ_1       3
-
-#define BSP_SIU_EXT_IRQ_2      	4
-#define BSP_SIU_INT_IRQ_2       5
-
-#define BSP_SIU_EXT_IRQ_3      	6
-#define BSP_SIU_INT_IRQ_3       7
-
-#define BSP_SIU_EXT_IRQ_4      	8
-#define BSP_SIU_INT_IRQ_4       9
-
-#define BSP_SIU_EXT_IRQ_5      	10
-#define BSP_SIU_INT_IRQ_5       11
-
-#define BSP_SIU_EXT_IRQ_6      	12
-#define BSP_SIU_INT_IRQ_6       13
-
-#define BSP_SIU_EXT_IRQ_7      	14
-#define BSP_SIU_INT_IRQ_7       15
-  /*
-   * Symbolic name for CPM interrupt on SIU Internal level 2
-   */
-#define BSP_CPM_INTERRUPT	BSP_SIU_INT_IRQ_2
-#define BSP_PERIODIC_TIMER	BSP_SIU_INT_IRQ_6
-#define BSP_FAST_ETHERNET_CTRL	BSP_SIU_INT_IRQ_3
-  /*
-     * Some CPM IRQ symbolic name definition
-     */
-#define BSP_CPM_IRQ_ERROR		BSP_CPM_IRQ_LOWEST_OFFSET
-#define BSP_CPM_IRQ_PARALLEL_IO_PC4	(BSP_CPM_IRQ_LOWEST_OFFSET + 1)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC5	(BSP_CPM_IRQ_LOWEST_OFFSET + 2)
-#define BSP_CPM_IRQ_SMC2_OR_PIP		(BSP_CPM_IRQ_LOWEST_OFFSET + 3)
-#define BSP_CPM_IRQ_SMC1		(BSP_CPM_IRQ_LOWEST_OFFSET + 4)
-#define BSP_CPM_IRQ_SPI			(BSP_CPM_IRQ_LOWEST_OFFSET + 5)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC6	(BSP_CPM_IRQ_LOWEST_OFFSET + 6)
-#define BSP_CPM_IRQ_TIMER_4		(BSP_CPM_IRQ_LOWEST_OFFSET + 7)
-
-#define BSP_CPM_IRQ_PARALLEL_IO_PC7	(BSP_CPM_IRQ_LOWEST_OFFSET + 9)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC8	(BSP_CPM_IRQ_LOWEST_OFFSET + 10)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC9	(BSP_CPM_IRQ_LOWEST_OFFSET + 11)
-#define BSP_CPM_IRQ_TIMER_3		(BSP_CPM_IRQ_LOWEST_OFFSET + 12)
-
-#define BSP_CPM_IRQ_PARALLEL_IO_PC10	(BSP_CPM_IRQ_LOWEST_OFFSET + 14)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC11	(BSP_CPM_IRQ_LOWEST_OFFSET + 15)
-#define BSP_CPM_I2C			(BSP_CPM_IRQ_LOWEST_OFFSET + 16)
-#define BSP_CPM_RISC_TIMER_TABLE	(BSP_CPM_IRQ_LOWEST_OFFSET + 17)
-#define BSP_CPM_IRQ_TIMER_2		(BSP_CPM_IRQ_LOWEST_OFFSET + 18)
-
-#define BSP_CPM_IDMA2			(BSP_CPM_IRQ_LOWEST_OFFSET + 20)
-#define BSP_CPM_IDMA1			(BSP_CPM_IRQ_LOWEST_OFFSET + 21)
-#define BSP_CPM_SDMA_CHANNEL_BUS_ERR	(BSP_CPM_IRQ_LOWEST_OFFSET + 22)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC12	(BSP_CPM_IRQ_LOWEST_OFFSET + 23)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC13	(BSP_CPM_IRQ_LOWEST_OFFSET + 24)
-#define BSP_CPM_IRQ_TIMER_1		(BSP_CPM_IRQ_LOWEST_OFFSET + 25)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC14	(BSP_CPM_IRQ_LOWEST_OFFSET + 26)
-#define BSP_CPM_IRQ_SCC4		(BSP_CPM_IRQ_LOWEST_OFFSET + 27)
-#define BSP_CPM_IRQ_SCC3		(BSP_CPM_IRQ_LOWEST_OFFSET + 28)
-#define BSP_CPM_IRQ_SCC2		(BSP_CPM_IRQ_LOWEST_OFFSET + 29)
-#define BSP_CPM_IRQ_SCC1		(BSP_CPM_IRQ_LOWEST_OFFSET + 30)
-#define BSP_CPM_IRQ_PARALLEL_IO_PC15	(BSP_CPM_IRQ_LOWEST_OFFSET + 31)
-    /*
-     * Some Processor exception handled as rtems IRQ symbolic name definition
-     */
-#define BSP_DECREMENTER			BSP_PROCESSOR_IRQ_LOWEST_OFFSET
-
-
-#define CPM_INTERRUPT
-
-/*-------------------------------------------------------------------------+
-| Function Prototypes.
-+--------------------------------------------------------------------------*/
-/*
- * ------------------------ PPC SIU Mngt Routines -------
- */
-
-/*
- * function to disable a particular irq at 8259 level. After calling
- * this function, even if the device asserts the interrupt line it will
- * not be propagated further to the processor
- */
-int BSP_irq_disable_at_siu        (const rtems_irq_number irqLine);
-/*
- * function to enable a particular irq at 8259 level. After calling
- * this function, if the device asserts the interrupt line it will
- * be propagated further to the processor
- */
-int BSP_irq_enable_at_siu		(const rtems_irq_number irqLine);
-/*
- * function to acknoledge a particular irq at 8259 level. After calling
- * this function, if a device asserts an enabled interrupt line it will
- * be propagated further to the processor. Mainly usefull for people
- * writting raw handlers as this is automagically done for rtems managed
- * handlers.
- */
-int BSP_irq_ack_at_siu              	(const rtems_irq_number irqLine);
-/*
- * function to check if a particular irq is enabled at 8259 level. After calling
- */
-int BSP_irq_enabled_at_siu     	(const rtems_irq_number irqLine);
-
-extern void BSP_rtems_irq_mng_init(unsigned cpuId);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
-#endif
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_asm.S
deleted file mode 100644
index 1a67196b0a..0000000000
--- a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_asm.S
+++ /dev/null
@@ -1,433 +0,0 @@
-/*===============================================================*\
-| Project: RTEMS TQM8xx BSP                                       |
-+-----------------------------------------------------------------+
-| This file has been adapted to MPC8xx by                         |
-|    Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>         |
-|                    Copyright (c) 2008                           |
-|                    Embedded Brains GmbH                         |
-|                    Obere Lagerstr. 30                           |
-|                    D-82178 Puchheim                             |
-|                    Germany                                      |
-|                    rtems@embedded-brains.de                     |
-|                                                                 |
-| See the other copyright notice below for the original parts.    |
-+-----------------------------------------------------------------+
-| The license and distribution terms for this file may be         |
-| found in the file LICENSE in this distribution or at            |
-|                                                                 |
-| http://www.rtems.com/license/LICENSE.                           |
-|                                                                 |
-+-----------------------------------------------------------------+
-| this file contains the console driver                           |
-\*===============================================================*/
-/* derived from: generic MPC83xx BSP */
-/*
- *  This file contains the assembly code for the PowerPC
- *  IRQ veneers for RTEMS.
- *
- *  The license and distribution terms for this file may be
- *  found in found in the file LICENSE in this distribution or at
- *  http://www.rtems.com/license/LICENSE.
- *
- *  Modified to support the MCP750.
- *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
- *
- *  Till Straumann <strauman@slac.stanford.edu>, 2003/7:
- *    - store isr nesting level in _ISR_Nest_level rather than
- *      SPRG0 - RTEMS relies on that variable.
- *  Till Straumann <strauman@slac.stanford.edu>, 2005/4:
- *    - DONT enable FP across user ISR since fpregs are never saved!!
- *
- * $Id$
- */
-
-#include <rtems/asm.h>
-#include <rtems/score/cpu.h>
-#include <bsp/vectors.h>
-#include <libcpu/raw_exception.h>
-
-#define SYNC \
-	sync; \
-	isync
-
-	.text
-	.p2align 5
-
-	PUBLIC_VAR(decrementer_exception_vector_prolog_code)
-
-SYM (decrementer_exception_vector_prolog_code):
-	/*
-	 * let room for exception frame
-	 */
-	stwu    r1, - (EXCEPTION_FRAME_END)(r1)
-	stw	r4, GPR4_OFFSET(r1)
-#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
-	/*
-	 * save link register
-	 */
-	mflr	r4
-	stw	r4,  EXC_LR_OFFSET(r1)
-	/*
-	 * make link register contain shared_raw_irq_code_entry
-	 * address
-	 */
-	lis	r4,shared_raw_irq_code_entry@h
-	ori	r4,r4,shared_raw_irq_code_entry@l
-	mtlr	r4
-
-	li	r4, ASM_DEC_VECTOR
-	blr
-#else
-	li	r4, ASM_DEC_VECTOR
-	ba	shared_raw_irq_code_entry
-#endif
-
-	PUBLIC_VAR (decrementer_exception_vector_prolog_code_size)
-
-	decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code
-
-	PUBLIC_VAR(external_exception_vector_prolog_code)
-
-SYM (external_exception_vector_prolog_code):
-	/*
-	 * let room for exception frame
-	 */
-	stwu    r1, - (EXCEPTION_FRAME_END)(r1)
-	stw	r4, GPR4_OFFSET(r1)
-#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
-	/*
-	 * save link register
-	 */
-	mflr	r4
-	stw	r4,  EXC_LR_OFFSET(r1)
-	/*
-	 * make link register contain shared_raw_irq_code_entry
-	 * address
-	 */
-	lis	r4,shared_raw_irq_code_entry@h
-	ori	r4,r4,shared_raw_irq_code_entry@l
-	mtlr	r4
-
-	li	r4, ASM_EXT_VECTOR
-	blr
-#else
-	li	r4, ASM_EXT_VECTOR
-	ba	shared_raw_irq_code_entry
-#endif
-
-	PUBLIC_VAR (external_exception_vector_prolog_code_size)
-
-	external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code
-
-	PUBLIC_VAR(shared_raw_irq_code_entry)
-	PUBLIC_VAR(C_dispatch_irq_handler)
-
-	.p2align 5
-SYM (shared_raw_irq_code_entry):
-	/*
-	 * Entry conditions :
-	 *	Registers already saved : R1, R4
-	 *	R1  :	points to a location with enough room for the
-	 *	        interrupt frame
-	 *	R4  :	vector number
-	 */
-	/*
-	 * Save SRR0/SRR1 As soon As possible as it is the minimal needed
-	 * to reenable exception processing
-	 */
-	stw	r0, GPR0_OFFSET(r1)
-	stw	r2, GPR2_OFFSET(r1)
-	stw	r3, GPR3_OFFSET(r1)
-
-	mfsrr0  r0
-	mfsrr1  r2
-	mfmsr	r3
-
-	stw	r0, SRR0_FRAME_OFFSET(r1)
-	stw	r2, SRR1_FRAME_OFFSET(r1)
-	/*
-	 * Enable data and instruction address translation, exception recovery
-     *
-     * also, on CPUs with FP, enable FP so that FP context can be
-     * saved and restored (using FP instructions)
-	 */
-	ori     r3, r3, MSR_RI | MSR_IR | MSR_DR
-	mtmsr   r3
-	SYNC
-	/*
-	 * Push C scratch registers on the current stack. It may
-	 * actually be the thread stack or the interrupt stack.
-	 * Anyway we have to make it in order to be able to call C/C++
-	 * functions. Depending on the nesting interrupt level, we will
-	 * switch to the right stack later.
-	 */
-	stw	r5, GPR5_OFFSET(r1)
-	stw	r6, GPR6_OFFSET(r1)
-	stw	r7, GPR7_OFFSET(r1)
-	stw	r8, GPR8_OFFSET(r1)
-	stw	r9, GPR9_OFFSET(r1)
-	stw	r10, GPR10_OFFSET(r1)
-	stw	r11, GPR11_OFFSET(r1)
-	stw	r12, GPR12_OFFSET(r1)
-	stw	r13, GPR13_OFFSET(r1)
-
-	mfcr	r5
-	mfctr	r6
-	mfxer	r7
-#ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
-	mflr	r8
-#endif
-
-	stw	r5,  EXC_CR_OFFSET(r1)
-	stw	r6,  EXC_CTR_OFFSET(r1)
-	stw	r7,  EXC_XER_OFFSET(r1)
-#ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
-	stw	r8,  EXC_LR_OFFSET(r1)
-#endif
-
-	/*
-	 * Add some non volatile registers to store information
-	 * that will be used when returning from C handler
-	 */
-	stw	r14, GPR14_OFFSET(r1)
-	stw	r15, GPR15_OFFSET(r1)
-	/*
-	 * save current stack pointer location in R14
-	 */
-	addi	r14, r1, 0
-	/*
-	 * store part of _Thread_Dispatch_disable_level address in R15
-	 */
-	addis r15,0, _Thread_Dispatch_disable_level@ha
-#if BROKEN_ISR_NEST_LEVEL
-	/*
-	 * Get current nesting level in R2
-	 */
-	mfspr	r2, SPRG0
-#else
-	/*
-	 * Retrieve current nesting level from _ISR_Nest_level
-	 */
-	lis		r7, _ISR_Nest_level@ha
-	lwz		r2, _ISR_Nest_level@l(r7)
-#endif
-	/*
-	 * Check if stack switch is necessary
-	 */
-	cmpwi	r2,0
-	bne	nested
-	mfspr	r1, SPRG1
-
-nested:
-	/*
-	 * Start Incrementing nesting level in R2
-	 */
-	addi	r2,r2,1
-	/*
-	 * Start Incrementing _Thread_Dispatch_disable_level R4 = _Thread_Dispatch_disable_level
-	 */
-	lwz	r6,_Thread_Dispatch_disable_level@l(r15)
-#if BROKEN_ISR_NEST_LEVEL
-	/*
-	 * Store new nesting level in SPRG0
-	 */
-	mtspr	SPRG0, r2
-#else
-	/* store new nesting level in _ISR_Nest_level */
-	stw		r2, _ISR_Nest_level@l(r7)
-#endif
-
-	addi	r6, r6, 1
-	mfmsr	r5
-	/*
-	 * store new _Thread_Dispatch_disable_level value
-	 */
-	stw	r6, _Thread_Dispatch_disable_level@l(r15)
-	/*
-	 * We are now running on the interrupt stack. External and decrementer
-	 * exceptions are still disabled. I see no purpose trying to optimize
-	 * further assembler code.
-	 */
-	/*
-	 * Call C exception handler for decrementer Interrupt frame is passed just
-	 * in case...
-	 */
-	addi	r3, r14, 0x8
-	bl	C_dispatch_irq_handler /* C_dispatch_irq_handler(cpu_interrupt_frame* r3, vector r4) */
-	/*
-	 * start decrementing nesting level. Note : do not test result against 0
-	 * value as an easy exit condition because if interrupt nesting level > 1
-	 * then _Thread_Dispatch_disable_level > 1
-	 */
-#if BROKEN_ISR_NEST_LEVEL
-	mfspr	r2, SPRG0
-#else
-	lis		r7, _ISR_Nest_level@ha
-	lwz		r2, _ISR_Nest_level@l(r7)
-#endif
-	/*
-	 * start decrementing _Thread_Dispatch_disable_level
-	 */
-	lwz	r3,_Thread_Dispatch_disable_level@l(r15)
-	addi	r2, r2, -1	/* Continue decrementing nesting level */
-	addi	r3, r3, -1	/* Continue decrementing _Thread_Dispatch_disable_level */
-#if BROKEN_ISR_NEST_LEVEL
-	mtspr	SPRG0, r2	/* End decrementing nesting level */
-#else
-	stw		r2, _ISR_Nest_level@l(r7) /* End decrementing nesting level */
-#endif
-	stw	r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */
-	cmpwi	r3, 0
-	/*
-	 * switch back to original stack (done here just optimize registers
-	 * contention. Could have been done before...)
-	 */
-	addi	r1, r14, 0
-	bne	easy_exit /* if (_Thread_Dispatch_disable_level != 0) goto easy_exit */
-	/*
-	 * Here we are running again on the thread system stack.
-	 * We have interrupt nesting level = _Thread_Dispatch_disable_level = 0.
-	 * Interrupt are still disabled. Time to check if scheduler request to
-	 * do something with the current thread...
-	 */
-	addis	r4, 0, _Context_Switch_necessary@ha
-	lwz	r5, _Context_Switch_necessary@l(r4)
-	cmpwi	r5, 0
-	bne	switch
-
-	addis	r6, 0, _ISR_Signals_to_thread_executing@ha
-	lwz	r7, _ISR_Signals_to_thread_executing@l(r6)
-	cmpwi	r7, 0
-	li	r8, 0
-	beq	easy_exit
-	stw	r8, _ISR_Signals_to_thread_executing@l(r6)
-	/*
-	 * going to call _ThreadProcessSignalsFromIrq
-	 * Push a complete exception like frame...
-	 */
-	stmw	r16, GPR16_OFFSET(r1)
-	addi	r3, r1, 0x8
-        /*
-         * compute SP at exception entry
-         */
-        addi    r2, r1, EXCEPTION_FRAME_END
-        /*
-         * store it at the right place
-         */
-        stw     r2, GPR1_OFFSET(r1)
-	/*
-	 * Call High Level signal handling code
-	 */
-	bl	_ThreadProcessSignalsFromIrq
-	/*
-	 * start restoring exception like frame
-	 */
-	lwz	r31,  EXC_CTR_OFFSET(r1)
-	lwz	r30,  EXC_XER_OFFSET(r1)
-	lwz	r29,  EXC_CR_OFFSET(r1)
-	lwz	r28,  EXC_LR_OFFSET(r1)
-
-	mtctr	r31
-	mtxer	r30
-	mtcr	r29
-	mtlr	r28
-
-	lmw	r4, GPR4_OFFSET(r1)
-	lwz	r2, GPR2_OFFSET(r1)
-	lwz	r0, GPR0_OFFSET(r1)
-
-	/*
-	 * Disable data and instruction translation. Make path non recoverable...
-	 */
-	mfmsr	r3
-	xori	r3, r3, MSR_RI | MSR_IR | MSR_DR
-	mtmsr   r3
-	SYNC
-	/*
-	 * Restore rfi related settings
-	 */
-
-	lwz	r3, SRR1_FRAME_OFFSET(r1)
-	mtsrr1	r3
-	lwz	r3, SRR0_FRAME_OFFSET(r1)
-	mtsrr0	r3
-
-	lwz	r3, GPR3_OFFSET(r1)
-	addi 	r1,r1, EXCEPTION_FRAME_END
-	SYNC
-	rfi
-
-switch:
-#if ( PPC_HAS_FPU != 0 )
-#if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
-#error missing include file???
-#endif
-	mfmsr  r4
-#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
-	/* if the executing thread has FP enabled propagate
-	 * this now so _Thread_Dispatch can save/restore the FPREGS
-	 * NOTE: it is *crucial* to disable the FPU across the
-	 *       user ISR [independent of using the 'deferred'
-	 *       strategy or not]. We don't save FP regs across
-	 *       the user ISR and hence we prefer an exception to
-	 *       be raised rather than experiencing corruption.
-	 */
-	lwz    r3, SRR1_FRAME_OFFSET(r1)
-	rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
-#else
-	ori    r4, r4, MSR_FP
-#endif
-	mtmsr  r4
-#endif
-	bl	SYM (_Thread_Dispatch)
-
-easy_exit:
-	/*
-	 * start restoring interrupt frame
-	 */
-	lwz	r3,  EXC_CTR_OFFSET(r1)
-	lwz	r4,  EXC_XER_OFFSET(r1)
-	lwz	r5,  EXC_CR_OFFSET(r1)
-	lwz	r6,  EXC_LR_OFFSET(r1)
-
-	mtctr	r3
-	mtxer	r4
-	mtcr	r5
-	mtlr	r6
-
-	lwz	r15, GPR15_OFFSET(r1)
-	lwz	r14, GPR14_OFFSET(r1)
-	lwz	r13, GPR13_OFFSET(r1)
-	lwz	r12, GPR12_OFFSET(r1)
-	lwz	r11, GPR11_OFFSET(r1)
-	lwz	r10, GPR10_OFFSET(r1)
-	lwz	r9, GPR9_OFFSET(r1)
-	lwz	r8, GPR8_OFFSET(r1)
-	lwz	r7, GPR7_OFFSET(r1)
-	lwz	r6, GPR6_OFFSET(r1)
-	lwz	r5, GPR5_OFFSET(r1)
-
-	/*
-	 * Disable nested exception processing, data and instruction
-	 * translation.
-	 */
-	mfmsr	r3
-	xori	r3, r3, MSR_RI | MSR_IR | MSR_DR
-	mtmsr   r3
-	SYNC
-	/*
-	 * Restore rfi related settings
-	 */
-
-	lwz	r4, SRR1_FRAME_OFFSET(r1)
-	lwz	r2, SRR0_FRAME_OFFSET(r1)
-	lwz	r3, GPR3_OFFSET(r1)
-	lwz	r0, GPR0_OFFSET(r1)
-
-	mtsrr1	r4
-	mtsrr0	r2
-	lwz	r4, GPR4_OFFSET(r1)
-	lwz	r2, GPR2_OFFSET(r1)
-	addi 	r1,r1, EXCEPTION_FRAME_END
-	SYNC
-	rfi
diff --git a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_init.c b/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_init.c
deleted file mode 100644
index 6ed06ccfeb..0000000000
--- a/c/src/lib/libbsp/powerpc/tqm8xx/irq/irq_init.c
+++ /dev/null
@@ -1,185 +0,0 @@
-/*===============================================================*\
-| Project: RTEMS TQM8xx BSP                                       |
-+-----------------------------------------------------------------+
-| This file has been adapted to MPC8xx by                         |
-|    Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>         |
-|                    Copyright (c) 2008                           |
-|                    Embedded Brains GmbH                         |
-|                    Obere Lagerstr. 30                           |
-|                    D-82178 Puchheim                             |
-|                    Germany                                      |
-|                    rtems@embedded-brains.de                     |
-|                                                                 |
-| See the other copyright notice below for the original parts.    |
-+-----------------------------------------------------------------+
-| The license and distribution terms for this file may be         |
-| found in the file LICENSE in this distribution or at            |
-|                                                                 |
-| http://www.rtems.com/license/LICENSE.                           |
-|                                                                 |
-+-----------------------------------------------------------------+
-| this file contains the console driver                           |
-\*===============================================================*/
-/* derived from: generic MPC83xx BSP */
-/* irq_init.c
- *
- *  This file contains the implementation of rtems initialization
- *  related to interrupt handling.
- *
- *  CopyRight (C) 2001 valette@crf.canon.fr
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.com/license/LICENSE.
- *
- *  $Id$
- */
-#include <bsp/irq.h>
-#include <bsp.h>
-#include <libcpu/raw_exception.h>
-#include <bsp/8xx_immap.h>
-#include <bsp/mpc8xx.h>
-
-extern unsigned int external_exception_vector_prolog_code_size;
-extern void external_exception_vector_prolog_code();
-extern unsigned int decrementer_exception_vector_prolog_code_size;
-extern void decrementer_exception_vector_prolog_code();
-
-volatile unsigned int ppc_cached_irq_mask;
-
-/*
- * default on/off function
- */
-static void nop_func1(void *unused){}
-static void nop_func2(){}
-
-/*
- * default isOn function
- */
-static int not_connected() {return 0;}
-/*
- * default possible isOn function
- */
-static int connected() {return 1;}
-
-static rtems_irq_connect_data     	rtemsIrq[BSP_IRQ_NUMBER];
-static rtems_irq_global_settings     	initial_config;
-static rtems_irq_connect_data     	defaultIrq = {
-  /* vectorIdex,	 hdl		, handle	, on		, off		, isOn */
-  0, 			 nop_func1	, 0		, nop_func2	, nop_func2	, not_connected
-};
-static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={
-  /*
-   * actual rpiorities for interrupt :
-   *	0   means that only current interrupt is masked
-   *	255 means all other interrupts are masked
-   */
-  /*
-   * SIU interrupts.
-   */
-  7,7, 6,6, 5,5, 4,4, 3,3, 2,2, 1,1, 0,0,
-  /*
-   * CPM Interrupts
-   */
-  0,  1,  2,  3,  4,  5,  6,  7,  8,  9,  10, 11, 12, 13, 14, 15,
-  16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-  /*
-   * Processor exceptions handled as interrupts
-   */
-  0
-};
-
-void BSP_SIU_irq_init()
-{
-  /*
-   * In theory we should initialize two registers at least :
-   * SIMASK, SIEL. SIMASK is reset at 0 value meaning no interrupt. But
-   * we should take care that a monitor may have restoreed to another value.
-   * If someone find a reasonnable value for SIEL, AND THE NEED TO CHANGE IT
-   * please feel free to add it here.
-   */
-  ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = 0;
-  ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = 0xffff0000;
-  ppc_cached_irq_mask = 0;
-  ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel = ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel;
-}
-
-/*
- * Initialize CPM interrupt management
- */
-void
-BSP_CPM_irq_init(void)
-{
-  /*
-   * Initialize the CPM interrupt controller.
-   */
-  ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr =
-#ifdef mpc860
-    (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
-#else
-    (CICR_SCB_SCC2 | CICR_SCA_SCC1) |
-#endif
-    ((BSP_CPM_INTERRUPT/2) << 13) | CICR_HP_MASK;
-  ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0;
-
-  ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN;
-}
-
-void BSP_rtems_irq_mng_init(unsigned cpuId)
-{
-  rtems_raw_except_connect_data vectorDesc;
-  int i;
-
-  BSP_SIU_irq_init();
-  BSP_CPM_irq_init();
-  /*
-   * Initialize Rtems management interrupt table
-   */
-    /*
-     * re-init the rtemsIrq table
-     */
-    for (i = 0; i < BSP_IRQ_NUMBER; i++) {
-      rtemsIrq[i]      = defaultIrq;
-      rtemsIrq[i].name = i;
-    }
-    /*
-     * Init initial Interrupt management config
-     */
-    initial_config.irqNb 	= BSP_IRQ_NUMBER;
-    initial_config.defaultEntry = defaultIrq;
-    initial_config.irqHdlTbl	= rtemsIrq;
-    initial_config.irqBase	= BSP_LOWEST_OFFSET;
-    initial_config.irqPrioTbl	= irqPrioTable;
-
-    if (!BSP_rtems_irq_mngt_set(&initial_config)) {
-      /*
-       * put something here that will show the failure...
-       */
-      BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
-    }
-
-  /*
-   * We must connect the raw irq handler for the two
-   * expected interrupt sources : decrementer and external interrupts.
-   */
-    vectorDesc.exceptIndex 	=	ASM_DEC_VECTOR;
-    vectorDesc.hdl.vector	=	ASM_DEC_VECTOR;
-    vectorDesc.hdl.raw_hdl	=	decrementer_exception_vector_prolog_code;
-    vectorDesc.hdl.raw_hdl_size	=	(unsigned) &decrementer_exception_vector_prolog_code_size;
-    vectorDesc.on		=	nop_func2;
-    vectorDesc.off		=	nop_func2;
-    vectorDesc.isOn		=	connected;
-    if (!ppc_set_exception (&vectorDesc)) {
-      BSP_panic("Unable to initialize RTEMS decrementer raw exception\n");
-    }
-    vectorDesc.exceptIndex	=	ASM_EXT_VECTOR;
-    vectorDesc.hdl.vector	=	ASM_EXT_VECTOR;
-    vectorDesc.hdl.raw_hdl	=	external_exception_vector_prolog_code;
-    vectorDesc.hdl.raw_hdl_size	=	(unsigned) &external_exception_vector_prolog_code_size;
-    if (!ppc_set_exception (&vectorDesc)) {
-      BSP_panic("Unable to initialize RTEMS external raw exception\n");
-    }
-#ifdef TRACE_IRQ_INIT
-    printk("RTEMS IRQ management is now operationnal\n");
-#endif
-}