Remove (moved to libcpu).

3 files changed, 0 insertions, 723 deletions

diff --git a/c/src/lib/libbsp/powerpc/support/new_exception_processing/ChangeLog b/c/src/lib/libbsp/powerpc/support/new_exception_processing/ChangeLog
deleted file mode 100644
index a66df80cf1..0000000000
--- a/c/src/lib/libbsp/powerpc/support/new_exception_processing/ChangeLog
+++ /dev/null
@@ -1,169 +0,0 @@
-2005-02-14	Ralf Corsepius <ralf.corsepius@rtems.org>
-
-	* cpu.c, cpu_asm.S: #include <rtems/powerpc/powerpc.h>.
-
-2005-02-11	Ralf Corsepius <ralf.corsepius@rtems.org>
-
-	* Makefile.am, configure.ac: Remove (Unused).
-
-2005-01-07	Ralf Corsepius <ralf.corsepius@rtems.org>
-
-	* Makefile.am: Eliminate CFLAGS_OPTIMIZE_V.
-
-2005-01-02	Ralf Corsepius <ralf.corsepius@rtems.org>
-
-	* Makefile.am: Remove build-variant support.
-
-2004-09-24	Ralf Corsepius <ralf_corsepius@rtems.org>
-
-	* configure.ac: Require automake > 1.9.
-
-2004-04-01	Ralf Corsepius <ralf_corsepius@rtems.org>
-
-	* cpu_asm.S: Include <rtems/asm.h> instead of <asm.h>.
-
-2004-03-31	Ralf Corsepius <ralf_corsepius@rtems.org>
-
-	* cpu.c: Convert to using c99 fixed size types.
-
-2004-01-30	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: Add RTEMS_PROG_CCAS.
-	* Makefile.am: Use automake compilation rules.
-
-2003-12-12	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Use mkdir_p. Remove dirs from PRE/TMPINSTALL_FILES.
-
-2003-12-12	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: Require automake >= 1.8, autoconf >= 2.59.
-
-2003-12-02	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Remove include_rtems_score_HEADERS.
-	Reformat for preinstallation dirstamp support.
-
-2003-12-02	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Remove all-local: $(ARCH).
-
-2003-10-22	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: Remove RTEMS_CANONICAL_HOST.
-
-2003-10-21	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: Remove RTEMS_CHECK_CPU.
-
-2003-09-04	Joel Sherrill <joel@OARcorp.com>
-
-	* cpu.c, cpu_asm.S: URL for license changed.
-
-2003-08-18	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Reflect having moved aclocal/.
-
-2003-08-16	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Reflect having moved automake/.
-
-2003-08-11	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: Use rtems-bugs@rtems.com as bug report email address.
-
-2003-03-18  Till Straumann <strauman@slac.stanford.edu>
-
-	PR 356/bsps
-	* cpu.c: This patch makes RTEMS/PowerPC eabi compliant.
-
-2003-03-06	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: Remove AC_CONFIG_AUX_DIR.
-
-2003-02-11	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: AM_INIT_AUTOMAKE([1.7.2]).
-
-2003-02-11	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac: AC_PREREQ(2.57).
-
-2002-12-17	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Don't include @RTEMS_BSP@.cfg.
-	* configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP.
-
-2002-11-01	Joel Sherrill <joel@OARcorp.com>
-
-	* cpu.c: Currently only the mpc8260 BSP supports interrupt nesting.
-	NOTE: These needs to be generalized as the patch is applied to other
-	BSPs.
-
-2002-10-21	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* .cvsignore: Reformat.
-	Add autom4te*cache.
-	Remove autom4te.cache.
-
-2002-08-11	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Use .$(OBJEXT) instead of .o.
-
-2001-05-14	Till Straumann <strauman@slac.stanford.edu>
-
-	* cpu.c: Per PR211 fix
-	saving/restoring floating point context.  The fpsave and fprestore
-	routines are only used in a executing context which _is_ fp and hence
-	has the FPU enabled. The current behavior required the FPU always to
-	be on which is very dangerous if lazy context switching is used.  
-	[Joel Note: Some ports explicitly enabled the FPU in the FP save and
-	restore routines to avoid this.]
-
-	The patch also makes sure (on powerpc only) that the FPU is disabled
-	for integer tasks. Note that this is crucial if deferred fp context
-	switching is used. Otherwise, fp context corruption may go undetected!
-	Also note that even tasks which merely push/pop FP registers to/from
-	the stack without modifying them still MUST be FP tasks - otherwise
-	(if lazy FP context switching is used), FP register corruption (of
-	other, FP, tasks may occur)!
-
-	Furthermore, (on PPC) by default, lazy FP context save/restore
-	is _disabled_.
-
-2002-04-18	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* rtems/score/cpu.h: Removed.
-	* Makefile.am: Reflect changes above.
-
-2001-04-03	Joel Sherrill <joel@OARcorp.com>
-
-	* Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
-	* rtems/score/cpu.h: Account for name change.
-
-2002-03-27	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* configure.ac:
-	AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS).
-	AM_INIT_AUTOMAKE([no-define foreign 1.6]).
-	* Makefile.am: Remove AUTOMAKE_OPTIONS.
-
-2001-11-28	Joel Sherrill <joel@OARcorp.com>,
-
-	This was tracked as PR91.
-	* rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
-	is used to specify if the port uses the standard macro for this (FALSE).
-	A TRUE setting indicates the port provides its own implementation.
-	* rtems/score/c_isr.inl: Deleted and contents merged into cpu.c.
-	* cpu.c: Received contents of c_isr.inl.
-	* Makefile.am: Deleted reference to c_isr.inl.
-
-2001-11-26      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* .cvsignore: Add aclocal.m4, autom4te.*, config.*, configure.
-
-2001-11-21	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Preinstall c_isr.inl (HACK).
-	* ChangeLog: New file.
-
diff --git a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c
deleted file mode 100644
index dbbf8a55c7..0000000000
--- a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- *  PowerPC CPU Dependent Source
- *
- *  Author:	Andrew Bray <andy@i-cubed.co.uk>
- *
- *  COPYRIGHT (c) 1995 by i-cubed ltd.
- *
- *  To anyone who acknowledges that this file is provided "AS IS"
- *  without any express or implied warranty:
- *      permission to use, copy, modify, and distribute this file
- *      for any purpose is hereby granted without fee, provided that
- *      the above copyright notice and this notice appears in all
- *      copies, and that the name of i-cubed limited not be used in
- *      advertising or publicity pertaining to distribution of the
- *      software without specific, written prior permission.
- *      i-cubed limited makes no representations about the suitability
- *      of this software for any purpose.
- *
- *  Derived from c/src/exec/cpu/no_cpu/cpu.c:
- *
- *  COPYRIGHT (c) 1989-1997.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be found in
- *  the file LICENSE in this distribution or at
- *  http://www.rtems.com/license/LICENSE.
- *
- *  $Id$
- */
-
-#include <rtems/system.h>
-#include <rtems/score/isr.h>
-#include <rtems/score/context.h>
-#include <rtems/score/thread.h>
-#include <rtems/score/interr.h>
-#include <rtems/powerpc/powerpc.h>
-
-/*  _CPU_Initialize
- *
- *  This routine performs processor dependent initialization.
- *
- *  INPUT PARAMETERS:
- *    cpu_table       - CPU table to initialize
- *    thread_dispatch - address of disptaching routine
- */
-
-void _CPU_Initialize(
-  rtems_cpu_table  *cpu_table,
-  void      (*thread_dispatch)      /* ignored on this CPU */
-)
-{
-  _CPU_Table = *cpu_table;
-
-  { unsigned hasFixed = 0;
-  /* assert that our BSP has fixed PR288 */
-  __asm__ __volatile__ ("mfspr %0, %2":"=r"(hasFixed):"0"(hasFixed),"i"(SPRG0));
-  if ( PPC_BSP_HAS_FIXED_PR288 != hasFixed ) {
-    BSP_panic("This BSP needs to fix PR#288");
-  }
-  }
-}
-
-/*PAGE
- *
- *  _CPU_Context_Initialize
- */
-
-void _CPU_Context_Initialize(
-  Context_Control  *the_context,
-  uint32_t         *stack_base,
-  uint32_t          size,
-  uint32_t          new_level,
-  void             *entry_point,
-  boolean           is_fp
-)
-{
-  uint32_t   msr_value;
-  uint32_t   sp;
-
-  sp = (uint32_t)stack_base + size - CPU_MINIMUM_STACK_FRAME_SIZE;
-
-  sp &= ~(CPU_STACK_ALIGNMENT-1);
-
-  *((uint32_t*)sp) = 0;
-  the_context->gpr1 = sp;
-
-  _CPU_MSR_GET( msr_value );
-
-  if (!(new_level & CPU_MODES_INTERRUPT_MASK)) {
-    msr_value |= MSR_EE;
-  }
-  else {
-    msr_value &= ~MSR_EE;
-  }
-
-  the_context->msr = msr_value;
-
-  /*
-   *  The FP bit of the MSR should only be enabled if this is a floating
-   *  point task.  Unfortunately, the vfprintf_r routine in newlib
-   *  ends up pushing a floating point register regardless of whether or
-   *  not a floating point number is being printed.  Serious restructuring
-   *  of vfprintf.c will be required to avoid this behavior.  At this
-   *  time (7 July 1997), this restructuring is not being done.
-   */
-
-  /* Till Straumann: For deferred FPContext save/restore, make sure integer
-   *                 tasks have no FPU access in order to catch violations.
-   *                 Otherwise, the FP registers may be corrupted.
-   *				 Since we set the_contex->msr using our current MSR,
-   *				 we must make sure MSR_FP is off if (!is_fp)...
-   */
-#if defined(CPU_USE_DEFERRED_FP_SWITCH) && (CPU_USE_DEFERRED_FP_SWITCH==TRUE)
-  if ( is_fp )
-#endif
-    the_context->msr |= PPC_MSR_FP;
-#if defined(CPU_USE_DEFERRED_FP_SWITCH) && (CPU_USE_DEFERRED_FP_SWITCH==TRUE)
-  else
-	the_context->msr &= ~PPC_MSR_FP;
-#endif
-
-  the_context->pc = (uint32_t)entry_point;
-
-#if (PPC_ABI == PPC_ABI_SVR4)
-  { unsigned    r13 = 0;
-    asm volatile ("mr %0, 13" : "=r" ((r13)));
-
-    the_context->gpr13 = r13;
-  }
-#elif (PPC_ABI == PPC_ABI_EABI)
-  { uint32_t    r2 = 0;
-    unsigned    r13 = 0;
-    asm volatile ("mr %0,2; mr %1,13" : "=r" ((r2)), "=r" ((r13)));
-
-    the_context->gpr2 = r2;
-    the_context->gpr13 = r13;
-  }
-#else
-#error unsupported PPC_ABI
-#endif
-}
-
-/*PAGE
- *
- *  _CPU_Install_interrupt_stack
- */
-
-void _CPU_Install_interrupt_stack( void )
-{
-}
diff --git a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu_asm.S b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu_asm.S
deleted file mode 100644
index f4cb804eff..0000000000
--- a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu_asm.S
+++ /dev/null
@@ -1,404 +0,0 @@
-
-/*  cpu_asm.s	1.1 - 95/12/04
- *
- *  This file contains the assembly code for the PowerPC implementation
- *  of RTEMS.
- *
- *  Author:	Andrew Bray <andy@i-cubed.co.uk>
- *
- *  COPYRIGHT (c) 1995 by i-cubed ltd.
- *
- *  To anyone who acknowledges that this file is provided "AS IS"
- *  without any express or implied warranty:
- *      permission to use, copy, modify, and distribute this file
- *      for any purpose is hereby granted without fee, provided that
- *      the above copyright notice and this notice appears in all
- *      copies, and that the name of i-cubed limited not be used in
- *      advertising or publicity pertaining to distribution of the
- *      software without specific, written prior permission.
- *      i-cubed limited makes no representations about the suitability
- *      of this software for any purpose.
- *
- *  Derived from c/src/exec/cpu/no_cpu/cpu_asm.c:
- *
- *  COPYRIGHT (c) 1989-1997.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may in
- *  the file LICENSE in this distribution or at
- *  http://www.rtems.com/license/LICENSE.
- *
- *  $Id$
- */
-
-#include <rtems/asm.h>
-#include <rtems/powerpc/powerpc.h>
-
-/*
- * Offsets for various Contexts
- */
-	.set	GP_1, 0
-	.set	GP_2, (GP_1 + 4)
-	.set	GP_13, (GP_2 + 4)
-	.set	GP_14, (GP_13 + 4)
-
-	.set	GP_15, (GP_14 + 4)
-	.set	GP_16, (GP_15 + 4)
-	.set	GP_17, (GP_16 + 4)
-	.set	GP_18, (GP_17 + 4)
-
-	.set	GP_19, (GP_18 + 4)
-	.set	GP_20, (GP_19 + 4)
-	.set	GP_21, (GP_20 + 4)
-	.set	GP_22, (GP_21 + 4)
-
-	.set	GP_23, (GP_22 + 4)
-	.set	GP_24, (GP_23 + 4)
-	.set	GP_25, (GP_24 + 4)
-	.set	GP_26, (GP_25 + 4)
-
-	.set	GP_27, (GP_26 + 4)
-	.set	GP_28, (GP_27 + 4)
-	.set	GP_29, (GP_28 + 4)
-	.set	GP_30, (GP_29 + 4)
-
-	.set	GP_31, (GP_30 + 4)
-	.set	GP_CR, (GP_31 + 4)
-	.set	GP_PC, (GP_CR + 4)
-	.set	GP_MSR, (GP_PC + 4)
-
-#if (PPC_HAS_DOUBLE==1)
-	.set	FP_SIZE,	8
-#define	LDF	lfd
-#define	STF	stfd
-#else
-	.set	FP_SIZE,	4
-#define	LDF	lfs
-#define	STF	stfs
-#endif
-
-	.set	FP_0, 0
-	.set	FP_1, (FP_0 + FP_SIZE)
-	.set	FP_2, (FP_1 + FP_SIZE)
-	.set	FP_3, (FP_2 + FP_SIZE)
-	.set	FP_4, (FP_3 + FP_SIZE)
-	.set	FP_5, (FP_4 + FP_SIZE)
-	.set	FP_6, (FP_5 + FP_SIZE)
-	.set	FP_7, (FP_6 + FP_SIZE)
-	.set	FP_8, (FP_7 + FP_SIZE)
-	.set	FP_9, (FP_8 + FP_SIZE)
-	.set	FP_10, (FP_9 + FP_SIZE)
-	.set	FP_11, (FP_10 + FP_SIZE)
-	.set	FP_12, (FP_11 + FP_SIZE)
-	.set	FP_13, (FP_12 + FP_SIZE)
-	.set	FP_14, (FP_13 + FP_SIZE)
-	.set	FP_15, (FP_14 + FP_SIZE)
-	.set	FP_16, (FP_15 + FP_SIZE)
-	.set	FP_17, (FP_16 + FP_SIZE)
-	.set	FP_18, (FP_17 + FP_SIZE)
-	.set	FP_19, (FP_18 + FP_SIZE)
-	.set	FP_20, (FP_19 + FP_SIZE)
-	.set	FP_21, (FP_20 + FP_SIZE)
-	.set	FP_22, (FP_21 + FP_SIZE)
-	.set	FP_23, (FP_22 + FP_SIZE)
-	.set	FP_24, (FP_23 + FP_SIZE)
-	.set	FP_25, (FP_24 + FP_SIZE)
-	.set	FP_26, (FP_25 + FP_SIZE)
-	.set	FP_27, (FP_26 + FP_SIZE)
-	.set	FP_28, (FP_27 + FP_SIZE)
-	.set	FP_29, (FP_28 + FP_SIZE)
-	.set	FP_30, (FP_29 + FP_SIZE)
-	.set	FP_31, (FP_30 + FP_SIZE)
-	.set	FP_FPSCR, (FP_31 + FP_SIZE)
-
-	.set	IP_LINK, 0
-	.set	IP_0, (IP_LINK + 8)
-	.set	IP_2, (IP_0 + 4)
-
-	.set	IP_3, (IP_2 + 4)
-	.set	IP_4, (IP_3 + 4)
-	.set	IP_5, (IP_4 + 4)
-	.set	IP_6, (IP_5 + 4)
-
-	.set	IP_7, (IP_6 + 4)
-	.set	IP_8, (IP_7 + 4)
-	.set	IP_9, (IP_8 + 4)
-	.set	IP_10, (IP_9 + 4)
-
-	.set	IP_11, (IP_10 + 4)
-	.set	IP_12, (IP_11 + 4)
-	.set	IP_13, (IP_12 + 4)
-	.set	IP_28, (IP_13 + 4)
-
-	.set	IP_29, (IP_28 + 4)
-	.set	IP_30, (IP_29 + 4)
-	.set	IP_31, (IP_30 + 4)
-	.set	IP_CR, (IP_31 + 4)
-
-	.set	IP_CTR, (IP_CR + 4)
-	.set	IP_XER, (IP_CTR + 4)
-	.set	IP_LR, (IP_XER + 4)
-	.set	IP_PC, (IP_LR + 4)
-
-	.set	IP_MSR, (IP_PC + 4)
-	.set	IP_END, (IP_MSR + 16)
-
-	BEGIN_CODE
-/*
- *  _CPU_Context_save_fp_context
- *
- *  This routine is responsible for saving the FP context
- *  at *fp_context_ptr.  If the point to load the FP context
- *  from is changed then the pointer is modified by this routine.
- *
- *  Sometimes a macro implementation of this is in cpu.h which dereferences
- *  the ** and a similarly named routine in this file is passed something
- *  like a (Context_Control_fp *).  The general rule on making this decision
- *  is to avoid writing assembly language.
- */
-
-	ALIGN (PPC_CACHE_ALIGNMENT, PPC_CACHE_ALIGN_POWER)
-	PUBLIC_PROC (_CPU_Context_save_fp)
-PROC (_CPU_Context_save_fp):
-#if (PPC_HAS_FPU == 1)
-	lwz	r3, 0(r3)
-	STF	f0, FP_0(r3)
-	STF	f1, FP_1(r3)
-	STF	f2, FP_2(r3)
-	STF	f3, FP_3(r3)
-	STF	f4, FP_4(r3)
-	STF	f5, FP_5(r3)
-	STF	f6, FP_6(r3)
-	STF	f7, FP_7(r3)
-	STF	f8, FP_8(r3)
-	STF	f9, FP_9(r3)
-	STF	f10, FP_10(r3)
-	STF	f11, FP_11(r3)
-	STF	f12, FP_12(r3)
-	STF	f13, FP_13(r3)
-	STF	f14, FP_14(r3)
-	STF	f15, FP_15(r3)
-	STF	f16, FP_16(r3)
-	STF	f17, FP_17(r3)
-	STF	f18, FP_18(r3)
-	STF	f19, FP_19(r3)
-	STF	f20, FP_20(r3)
-	STF	f21, FP_21(r3)
-	STF	f22, FP_22(r3)
-	STF	f23, FP_23(r3)
-	STF	f24, FP_24(r3)
-	STF	f25, FP_25(r3)
-	STF	f26, FP_26(r3)
-	STF	f27, FP_27(r3)
-	STF	f28, FP_28(r3)
-	STF	f29, FP_29(r3)
-	STF	f30, FP_30(r3)
-	STF	f31, FP_31(r3)
-	mffs	f2
-	STF	f2, FP_FPSCR(r3)
-#endif
-	blr
-
-/*
- *  _CPU_Context_restore_fp_context
- *
- *  This routine is responsible for restoring the FP context
- *  at *fp_context_ptr.  If the point to load the FP context
- *  from is changed then the pointer is modified by this routine.
- *
- *  Sometimes a macro implementation of this is in cpu.h which dereferences
- *  the ** and a similarly named routine in this file is passed something
- *  like a (Context_Control_fp *).  The general rule on making this decision
- *  is to avoid writing assembly language.
- */
-
-	ALIGN (PPC_CACHE_ALIGNMENT, PPC_CACHE_ALIGN_POWER)
-	PUBLIC_PROC (_CPU_Context_restore_fp)
-PROC (_CPU_Context_restore_fp):
-#if (PPC_HAS_FPU == 1)
-	lwz	r3, 0(r3)
-	LDF	f2, FP_FPSCR(r3)
-	mtfsf	255, f2
-	LDF	f0, FP_0(r3)
-	LDF	f1, FP_1(r3)
-	LDF	f2, FP_2(r3)
-	LDF	f3, FP_3(r3)
-	LDF	f4, FP_4(r3)
-	LDF	f5, FP_5(r3)
-	LDF	f6, FP_6(r3)
-	LDF	f7, FP_7(r3)
-	LDF	f8, FP_8(r3)
-	LDF	f9, FP_9(r3)
-	LDF	f10, FP_10(r3)
-	LDF	f11, FP_11(r3)
-	LDF	f12, FP_12(r3)
-	LDF	f13, FP_13(r3)
-	LDF	f14, FP_14(r3)
-	LDF	f15, FP_15(r3)
-	LDF	f16, FP_16(r3)
-	LDF	f17, FP_17(r3)
-	LDF	f18, FP_18(r3)
-	LDF	f19, FP_19(r3)
-	LDF	f20, FP_20(r3)
-	LDF	f21, FP_21(r3)
-	LDF	f22, FP_22(r3)
-	LDF	f23, FP_23(r3)
-	LDF	f24, FP_24(r3)
-	LDF	f25, FP_25(r3)
-	LDF	f26, FP_26(r3)
-	LDF	f27, FP_27(r3)
-	LDF	f28, FP_28(r3)
-	LDF	f29, FP_29(r3)
-	LDF	f30, FP_30(r3)
-	LDF	f31, FP_31(r3)
-#endif
-	blr
-
-/*  _CPU_Context_switch
- *
- *  This routine performs a normal non-FP context switch.
- */
-	ALIGN (PPC_CACHE_ALIGNMENT, PPC_CACHE_ALIGN_POWER)
-	PUBLIC_PROC (_CPU_Context_switch)
-PROC (_CPU_Context_switch):
-	sync
-	isync
-	/* This assumes that all the registers are in the given order */
-	li	r5, 32
-	addi	r3,r3,-4
-#if ( PPC_USE_DATA_CACHE )
-	dcbz	r5, r3
-#endif
-	stw	r1, GP_1+4(r3)
-	stw	r2, GP_2+4(r3)
-#if (PPC_USE_MULTIPLE == 1)
-	addi	r3, r3, GP_18+4
-#if ( PPC_USE_DATA_CACHE )
-	dcbz	r5, r3
-#endif
-	stmw	r13, GP_13-GP_18(r3)
-#else
-	stw	r13, GP_13+4(r3)
-	stw	r14, GP_14+4(r3)
-	stw	r15, GP_15+4(r3)
-	stw	r16, GP_16+4(r3)
-	stw	r17, GP_17+4(r3)
-	stwu	r18, GP_18+4(r3)
-#if ( PPC_USE_DATA_CACHE )
-	dcbz	r5, r3
-#endif
-	stw	r19, GP_19-GP_18(r3)
-	stw	r20, GP_20-GP_18(r3)
-	stw	r21, GP_21-GP_18(r3)
-	stw	r22, GP_22-GP_18(r3)
-	stw	r23, GP_23-GP_18(r3)
-	stw	r24, GP_24-GP_18(r3)
-	stw	r25, GP_25-GP_18(r3)
-	stw	r26, GP_26-GP_18(r3)
-	stw	r27, GP_27-GP_18(r3)
-	stw	r28, GP_28-GP_18(r3)
-	stw	r29, GP_29-GP_18(r3)
-	stw	r30, GP_30-GP_18(r3)
-	stw	r31, GP_31-GP_18(r3)
-#endif
-#if ( PPC_USE_DATA_CACHE )
-	dcbt	r0, r4
-#endif
-	mfcr	r6
-	stw	r6, GP_CR-GP_18(r3)
-	mflr	r7
-	stw	r7, GP_PC-GP_18(r3)
-	mfmsr	r8
-	stw	r8, GP_MSR-GP_18(r3)
-
-#if ( PPC_USE_DATA_CACHE )
-	dcbt	r5, r4
-#endif
-	lwz	r1, GP_1(r4)
-	lwz	r2, GP_2(r4)
-#if (PPC_USE_MULTIPLE == 1)
-	addi	r4, r4, GP_19
-#if ( PPC_USE_DATA_CACHE )
-	dcbt	r5, r4
-#endif
-	lmw	r13, GP_13-GP_19(r4)
-#else
-	lwz	r13, GP_13(r4)
-	lwz	r14, GP_14(r4)
-	lwz	r15, GP_15(r4)
-	lwz	r16, GP_16(r4)
-	lwz	r17, GP_17(r4)
-	lwz	r18, GP_18(r4)
-	lwzu	r19, GP_19(r4)
-#if ( PPC_USE_DATA_CACHE )
-	dcbt	r5, r4
-#endif
-	lwz	r20, GP_20-GP_19(r4)
-	lwz	r21, GP_21-GP_19(r4)
-	lwz	r22, GP_22-GP_19(r4)
-	lwz	r23, GP_23-GP_19(r4)
-	lwz	r24, GP_24-GP_19(r4)
-	lwz	r25, GP_25-GP_19(r4)
-	lwz	r26, GP_26-GP_19(r4)
-	lwz	r27, GP_27-GP_19(r4)
-	lwz	r28, GP_28-GP_19(r4)
-	lwz	r29, GP_29-GP_19(r4)
-	lwz	r30, GP_30-GP_19(r4)
-	lwz	r31, GP_31-GP_19(r4)
-#endif
-	lwz	r6, GP_CR-GP_19(r4)
-	lwz	r7, GP_PC-GP_19(r4)
-	lwz	r8, GP_MSR-GP_19(r4)
-	mtcrf	255, r6
-	mtlr	r7
-	mtmsr	r8
-
-	blr
-
-/*
- *  _CPU_Context_restore
- *
- *  This routine is generallu used only to restart self in an
- *  efficient manner.  It may simply be a label in _CPU_Context_switch.
- *
- *  NOTE: May be unnecessary to reload some registers.
- */
-/*
- * ACB: Don't worry about cache optimisation here - this is not THAT critical.
- */
-	ALIGN (PPC_CACHE_ALIGNMENT, PPC_CACHE_ALIGN_POWER)
-	PUBLIC_PROC (_CPU_Context_restore)
-PROC (_CPU_Context_restore):
-	lwz	r5, GP_CR(r3)
-	lwz	r6, GP_PC(r3)
-	lwz	r7, GP_MSR(r3)
-	mtcrf	255, r5
-	mtlr	r6
-	mtmsr	r7
-	lwz	r1, GP_1(r3)
-	lwz	r2, GP_2(r3)
-#if (PPC_USE_MULTIPLE == 1)
-	lmw	r13, GP_13(r3)
-#else
-	lwz	r13, GP_13(r3)
-	lwz	r14, GP_14(r3)
-	lwz	r15, GP_15(r3)
-	lwz	r16, GP_16(r3)
-	lwz	r17, GP_17(r3)
-	lwz	r18, GP_18(r3)
-	lwz	r19, GP_19(r3)
-	lwz	r20, GP_20(r3)
-	lwz	r21, GP_21(r3)
-	lwz	r22, GP_22(r3)
-	lwz	r23, GP_23(r3)
-	lwz	r24, GP_24(r3)
-	lwz	r25, GP_25(r3)
-	lwz	r26, GP_26(r3)
-	lwz	r27, GP_27(r3)
-	lwz	r28, GP_28(r3)
-	lwz	r29, GP_29(r3)
-	lwz	r30, GP_30(r3)
-	lwz	r31, GP_31(r3)
-#endif
-
-	blr