diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2003-07-23 17:40:02 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2003-07-23 17:40:02 +0000 |
commit | 129b4a792b980632ebfc24641538d533bf853e27 (patch) | |
tree | 956fe2b3102c5bdf3c46a9675a628211d6888dbf /c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c | |
parent | 2003-07-18 Till Straumann <strauman@slac.stanford.edu> (diff) | |
download | rtems-129b4a792b980632ebfc24641538d533bf853e27.tar.bz2 |
2003-07-18 Till Straumann <strauman@slac.stanford.edu>
PR 288/rtems
* support/new_exception_processing/cpu.c: _ISR_Nest_level is now
properly maintained and does not reside in SPRG0.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c')
-rw-r--r-- | c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c | 32 |
1 files changed, 8 insertions, 24 deletions
diff --git a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c index 9dcd1b4da2..289ce61b56 100644 --- a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c +++ b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c @@ -50,6 +50,14 @@ void _CPU_Initialize( ) { _CPU_Table = *cpu_table; + + { unsigned hasFixed = 0; + /* assert that our BSP has fixed PR288 */ + __asm__ __volatile__ ("mfspr %0, %2":"=r"(hasFixed):"0"(hasFixed),"i"(SPRG0)); + if ( PPC_BSP_HAS_FIXED_PR288 != hasFixed ) { + BSP_panic("This BSP needs to fix PR#288"); + } + } } /*PAGE @@ -143,27 +151,3 @@ void _CPU_Install_interrupt_stack( void ) { } -/*PAGE - * - * This is the PowerPC specific implementation of the routine which - * returns TRUE if an interrupt is in progress. - */ - -boolean _ISR_Is_in_progress( void ) -{ - /* - * Until the patch on PR288 is in all new exception BSPs, this is - * the safest thing to do. - */ -#ifdef mpc8260 - return (_ISR_Nest_level != 0); -#else - register unsigned int isr_nesting_level; - /* - * Move from special purpose register 0 (mfspr SPRG0, r3) - */ - asm volatile ("mfspr %0, 272" : "=r" (isr_nesting_level)); - return isr_nesting_level; -#endif -} - |