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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-02-12 10:31:38 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-02-14 10:28:29 +0100 |
| commit | 24bf11eca11947d961cc9bb5f7d92dabff169e93 (patch) | |
| tree | b28f3aa8a21df91e8feaf324613aa76460559837 /c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c | |
| parent | bsps/arm: Fix Cortex-A9 MPCore nanoseconds handler (diff) | |
| download | rtems-24bf11eca11947d961cc9bb5f7d92dabff169e93.tar.bz2 | |
score: Add CPU counter support
Add a CPU counter interface to allow access to a free-running counter.
It is useful to measure short time intervals. This can be used for
example to enable profiling of critical low-level functions.
Add two busy wait functions rtems_counter_delay_ticks() and
rtems_counter_delay_nanoseconds() implemented via the CPU counter.
Diffstat (limited to 'c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c')
| -rw-r--r-- | c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c b/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c index 46e34128c7..38c85d4eba 100644 --- a/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c @@ -24,6 +24,7 @@ #warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). #include <rtems/bspIo.h> +#include <rtems/counter.h> #include <rtems/powerpc/powerpc.h> #include <libcpu/cpuIdent.h> @@ -108,6 +109,7 @@ void bsp_start(void) bsp_clock_speed = BSP_CLOCK_HZ; /* for SCI baud rate generator */ bsp_timer_least_valid = 0; bsp_timer_average_overhead = 0; + rtems_counter_initialize_converter(BSP_CRYSTAL_HZ / 4); /* * Initalize RTEMS IRQ system |